959 resultados para Printed circuit board


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A chip shooter machine for electronic component assembly has a movable feeder carrier, a movable X–Y table carrying a printed circuit board (PCB), and a rotary turret with multiple assembly heads. This paper presents a hybrid genetic algorithm (HGA) to optimize the sequence of component placements and the arrangement of component types to feeders simultaneously for a chip shooter machine, that is, the component scheduling problem. The objective of the problem is to minimize the total assembly time. The GA developed in the paper hybridizes different search heuristics including the nearest-neighbor heuristic, the 2-opt heuristic, and an iterated swap procedure, which is a new improved heuristic. Compared with the results obtained by other researchers, the performance of the HGA is superior in terms of the assembly time. Scope and purpose When assembling the surface mount components on a PCB, it is necessary to obtain the optimal sequence of component placements and the best arrangement of component types to feeders simultaneously in order to minimize the total assembly time. Since it is very difficult to obtain the optimality, a GA hybridized with several search heuristics is developed. The type of machines being studied is the chip shooter machine. This paper compares the algorithm with a simple GA. It shows that the performance of the algorithm is superior to that of the simple GA in terms of the total assembly time.

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A chip shooter machine in printed circuit board (PCB) assembly has three movable mechanisms: an X-Y table carrying a PCB, a feeder carrier with several feeders holding components and a rotary turret with multiple assembly heads to pick up and place components. In order to get the minimal placement or assembly time for a PCB on the machine, all the components on the board should be placed in a perfect sequence, and the components should be set up on a right feeder, or feeders since two feeders can hold the same type of components, and additionally, the assembly head should retrieve or pick up a component from a right feeder. The entire problem is very complicated, and this paper presents a genetic algorithm approach to tackle it.

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In printed circuit board (PCB) assembly, the efficiency of the component placement process is dependent on two interrelated issues: the sequence of component placement, that is, the component sequencing problem, and the assignment of component types to feeders of the placement machine, that is, the feeder arrangement problem. In cases where some components with the same type are assigned to more than one feeder, the component retrieval problem should also be considered. Due to their inseparable relationship, a hybrid genetic algorithm is adopted to solve these three problems simultaneously for a type of PCB placement machines called the sequential pick-and-place (PAP) machine in this paper. The objective is to minimise the total distance travelled by the placement head for assembling all components on a PCB. Besides, the algorithm is compared with the methods proposed by other researchers in order to examine its effectiveness and efficiency.

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A chip shooter machine for electronic components assembly has a movable feeder carrier holding components, a movable X-Y table carrying a printed circuit board (PCB), and a rotary turret having multiple assembly heads. This paper presents a hybrid genetic algorithm to optimize the sequence of component placements for a chip shooter machine. The objective of the problem is to minimize the total traveling distance of the X-Y table or the board. The genetic algorithm developed in the paper hybridizes the nearest neighbor heuristic, and an iterated swap procedure, which is a new improved heuristic. We have compared the performance of the hybrid genetic algorithm with that of the approach proposed by other researchers and have demonstrated our algorithm is superior in terms of the distance traveled by the X-Y table or the board.

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This paper presents a hybrid genetic algorithm to optimize the sequence of component placements on a printed circuit board and the arrangement of component types to feeders simultaneously for a pick-and-place machine with multiple stationary feeders, a fixed board table and a movable placement head. The objective of the problem is to minimize the total travelling distance, or the travelling time, of the placement head. The genetic algorithm developed in the paper hybrisizes different search heuristics including the nearest neighbor heuristic, the 2-opt heuristic, and an iterated swap procedure, which is a new improving heuristic. Compared with the results obtained by other researchers, the performance of the hybrid genetic algorithm is superior to others in terms of the distance travelled by the placement head.

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Using a wide range of operational research (OR) optimization examples, Applied Operational Research with SAS demonstrates how the OR procedures in SAS work. The book is one of the first to extensively cover the application of SAS procedures to OR problems, such as single criterion optimization, project management decisions, printed circuit board assembly, and multiple criteria decision making. The text begins with the algorithms and methods for linear programming, integer linear programming, and goal programming models. It then describes the principles of several OR procedures in SAS. Subsequent chapters explain how to use these procedures to solve various types of OR problems. Each of these chapters describes the concept of an OR problem, presents an example of the problem, and discusses the specific procedure and its macros for the optimal solution of the problem. The macros include data handling, model building, and report writing. While primarily designed for SAS users in OR and marketing analytics, the book can also be used by readers interested in mathematical modeling techniques. By formulating the OR problems as mathematical models, the authors show how SAS can solve a variety of optimization problems.

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This research is motivated by a practical application observed at a printed circuit board (PCB) manufacturing facility. After assembly, the PCBs (or jobs) are tested in environmental stress screening (ESS) chambers (or batch processing machines) to detect early failures. Several PCBs can be simultaneously tested as long as the total size of all the PCBs in the batch does not violate the chamber capacity. PCBs from different production lines arrive dynamically to a queue in front of a set of identical ESS chambers, where they are grouped into batches for testing. Each line delivers PCBs that vary in size and require different testing (or processing) times. Once a batch is formed, its processing time is the longest processing time among the PCBs in the batch, and its ready time is given by the PCB arriving last to the batch. ESS chambers are expensive and a bottleneck. Consequently, its makespan has to be minimized. ^ A mixed-integer formulation is proposed for the problem under study and compared to a formulation recently published. The proposed formulation is better in terms of the number of decision variables, linear constraints and run time. A procedure to compute the lower bound is proposed. For sparse problems (i.e. when job ready times are dispersed widely), the lower bounds are close to optimum. ^ The problem under study is NP-hard. Consequently, five heuristics, two metaheuristics (i.e. simulated annealing (SA) and greedy randomized adaptive search procedure (GRASP)), and a decomposition approach (i.e. column generation) are proposed—especially to solve problem instances which require prohibitively long run times when a commercial solver is used. Extensive experimental study was conducted to evaluate the different solution approaches based on the solution quality and run time. ^ The decomposition approach improved the lower bounds (or linear relaxation solution) of the mixed-integer formulation. At least one of the proposed heuristic outperforms the Modified Delay heuristic from the literature. For sparse problems, almost all the heuristics report a solution close to optimum. GRASP outperforms SA at a higher computational cost. The proposed approaches are viable to implement as the run time is very short. ^

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The performance of a compact, wearable Conformal Strongly Coupled Magnetic Resonance (CSCMR) system is studied when the antenna is in the air and is worn on a user’s arm. The wireless powering system consists of the receiver and load elements designed on a printed circuit board that is attached to a polyester fabric band. The wearable antenna achieves high efficiency, has a small volume, and can be easily printed on substrates. Although the user effect on mobile terminal antennas has been studied in detail, absorption losses in wearable antennas have not been widely investigated. Our results show that efficiency of the antenna in free space is 70% and on a user’s arm is 50%. Human tissue in the close proximity of our wearable Conformal SCMR caused a decrease in radiated efficiency and total efficiency. This undesired degradation in antenna efficiency might be attributed to body loss and absorption losses. Our findings can be used as a reference for future studies on wearable devices and their applications, such as health and sports monitoring.

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This thesis presents the achievements and scientific work conducted using a previously designed and fabricated 64 x 64-pixel ion camera with the use of a 0.35 μm CMOS technology. We used an array of Ion Sensitive Field Effect Transistors (ISFETs) to monitor and measure chemical and biochemical reactions in real time. The area of our observation was a 4.2 x 4.3 mm silicon chip while the actual ISFET array covered an area of 715.8 x 715.8 μm consisting of 4096 ISFET pixels in total with a 1 μm separation space among them. The ion sensitive layer, the locus where all reactions took place was a silicon nitride layer, the final top layer of the austriamicrosystems 0.35 μm CMOS technology used. Our final measurements presented an average sensitivity of 30 mV/pH. With the addition of extra layers we were able to monitor a 65 mV voltage difference during our experiments with glucose and hexokinase, whereas a difference of 85 mV was detected for a similar glucose reaction mentioned in literature, and a 55 mV voltage difference while performing photosynthesis experiments with a biofilm made from cyanobacteria, whereas a voltage difference of 33.7 mV was detected as presented in literature for a similar cyanobacterial species using voltamemtric methods for detection. To monitor our experiments PXIe-6358 measurement cards were used and measurements were controlled by LabVIEW software. The chip was packaged and encapsulated using a PGA-100 chip carrier and a two-component commercial epoxy. Printed circuit board (PCB) has also been previously designed to provide interface between the chip and the measurement cards.

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Dissertação (mestrado)—Universidade de Brasília, Faculdade UnB Gama, Programa de Pós-graduação em Integridade de Materiais da Engenharia, 2015.

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We present the circuit board integration of a self-healing mechanism to repair open faults. The electric field driven mechanism physically restores fractured interconnects in electronic circuits and has the ability to solve mazes. The repair is performed by conductive particles dispersed in an insulating fluid. We demonstrate the integration of the healing module onto printed circuit boards and the ability of maze solving. We model and perform experiments on the influence of the geometry of conductive particles as well as the terminal impedances of the route on the healing efficiency. The typical heal rate is 10 mu m/s with healed route having mean resistance of 8 k Omega across a 200 micron gap and depending on the materials and concentrations used. (C) 2015 AIP Publishing LLC.

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This paper provides an overview of the rationale behind the significant interest in polymer-based on-board optical links together with a brief review of recently reported work addressing certain challenges in this field. Polymer-based optical links have garnered considerable research attention due to their important functional attributes and compelling cost-benefit advantages in on-board optoelectronic systems as they can be cost-effectively integrated on conventional printed circuit boards. To date, significant work on the polymer materials, their fabrication process and their integration on standard board substrates have enabled the demonstration of numerous high-speed on-board optical links. However, to be deployed in real-world systems, these optoelectronic printed circuit boards (OE PCBs) must also be cost-effective. Here, recent advances in the integration process focusing on simple direct end-fire coupling schemes and the use of low-cost FR4 PCB substrates are presented. Performance of two proof-of-principle 10 Gb/s systems based on this integration method are summarised while work in realising more complex yet compact planar optical components is outlined. © 2011 IEEE.

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Optical interconnects are increasingly considered for use in high-performance electronic systems. Multimode polymer waveguides are a promising technology for the formation of optical backplane as they enable cost-effective integration of optical links onto standard printed circuit boards. In this paper, two different types of polymer waveguide-based optical backplanes are presented. The first one implements a passive shuffle architecture enabling non-blocking on-board optical interconnection between different cards/modules, while the second one deploys a regenerative bus architecture allowing the interconnection of an arbitrary number of electrical cards over a common optical bus. The polymer materials and the multimode waveguide components used to form the optical backplanes are presented, while details of the interconnection architectures and design of the backplanes are described. Proof-of-principle demonstrators fabricated onto low-cost FR4 substrates, including a 10-card 1 Tb/s-capacity passive shuffle router and 4-channel 3-card polymeric bus modules, are reported and their optical performance characteristics are presented. Low-loss, low-crosstalk on-board interconnection is achieved and error-free (BER10 12) 10 Gb/s communication between different card/module interfaces is demonstrated in both polymeric backplane systems. © 2012 IEEE.

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Optical interconnects are increasingly considered for use in high-performance electronic systems. Multimode polymer waveguides are a promising technology for the formation of optical backplanes as they enable cost-effective integration of optical links onto standard printed circuit boards. In this paper, we present a 40 Gb/s optical backplane demonstrator based on the use of polymer multimode waveguides and a regenerative shared bus architecture. The system allows bus extension by cascading multiple polymeric bus modules through 3R regenerator units enabling the connection of an arbitrary number of electrical cards onto the bus. The proof-ofprinciple demonstrator reported here is formed with low-cost, commercially-available active devices and electronic components mounted on conventional FR4 substrates and achieves error-free 4×10 Gb/s optical interconnection between any two card interfaces on the bus. © 2013 IEEE.

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Multimode polymer waveguides are an attractive transmission medium for board-level optical links as they provide high bandwidth, relaxed alignment tolerances, and can be directly integrated onto conventional printed circuit boards. However, the performance of multimode waveguide components depends on the launch conditions at the component input, complicating their use in topologies that require the concatenation of multiple multimode components. This paper presents key polymer components for a multichannel optical bus and reports their performance under different launch conditions, enabling useful rules that can be used to design complex interconnection topologies to be derived. The components studied are multimode signal splitters and combiners, 90°-crossings, S-bends, and 90°-bends. By varying the width of the splitter arms, a splitting ratio between 1% and 95% is achieved from the 1 × 2 splitters, while low-loss signal combining is demonstrated with the waveguide combiners. It is shown that a 3 dB improvement in the combiner excess loss can be achieved by increasing the bus width by 50 μm. The worst-case insertion loss of 50 × 100 μm waveguide crossings is measured to be 0.1 dB/crossing. An empirical method is proposed and used to estimate the insertion losses of on-board optical paths of a polymeric four-channel optical bus module. Good agreement is achieved between the predicted and measured values. Although the components and empirical method have been tailored for use in a multichannel optical bus architecture, they can be used for any on-board optical interconnection topology. © 1983-2012 IEEE.