918 resultados para MESTRADO EM ARQUITETURA


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The field of education is very rich and allows us to research in various aspects. The area of chemical education has been growing more and more, and an important aspect that has been researching this area is about the learning difficulties of students. The approach of the themes atomic structure and chemical bonds are developed in high school and have many problems that are often brought to higher education becoming an obstacle to the advancement of learning. It is necessary for these initial themes - the atomic structure and chemical bonds - are well understood by the student to the other contents of Chemistry will be understood more easily. This paper aims to describe, analyze errors and difficulties presented in the assessments of the discipline Atomic and Molecular Architecture, the students of the degree course in Chemistry - EAD, with respect to the contents of " Atomic Structure and Chemical Bonding ", by of the assessments made by the students and the Virtual Learning Environment (VLE), taking into account the activities , discussion forum and access to materials . AVA allows obtaining reports which were used to analyze regarding access / participation to assess their contribution to learning and its relation to the final result (pass / fail). It was observed that the most frequent errors in the assessments are related to the early part of the chemistry that is the understanding of atomic structure and evolution models. Students who accessed the extra material and participated in the activities and forums were students who achieved success in the course. Ie, the difficulties were emerging and the use of available teaching strategies, students could minimize such difficulties, making their performance in activities and assessments were better. Was also observed by attending the AVA, the discipline began with a large withdrawal from the page access as well as the frequency of face- evidence from observation in Listing presence of classroom assessments

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The increase of applications complexity has demanded hardware even more flexible and able to achieve higher performance. Traditional hardware solutions have not been successful in providing these applications constraints. General purpose processors have inherent flexibility, since they perform several tasks, however, they can not reach high performance when compared to application-specific devices. Moreover, since application-specific devices perform only few tasks, they achieve high performance, although they have less flexibility. Reconfigurable architectures emerged as an alternative to traditional approaches and have become an area of rising interest over the last decades. The purpose of this new paradigm is to modify the device s behavior according to the application. Thus, it is possible to balance flexibility and performance and also to attend the applications constraints. This work presents the design and implementation of a coarse grained hybrid reconfigurable architecture to stream-based applications. The architecture, named RoSA, consists of a reconfigurable logic attached to a processor. Its goal is to exploit the instruction level parallelism from intensive data-flow applications to accelerate the application s execution on the reconfigurable logic. The instruction level parallelism extraction is done at compile time, thus, this work also presents an optimization phase to the RoSA architecture to be included in the GCC compiler. To design the architecture, this work also presents a methodology based on hardware reuse of datapaths, named RoSE. RoSE aims to visualize the reconfigurable units through reusability levels, which provides area saving and datapath simplification. The architecture presented was implemented in hardware description language (VHDL). It was validated through simulations and prototyping. To characterize performance analysis some benchmarks were used and they demonstrated a speedup of 11x on the execution of some applications

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Conselho Nacional de Desenvolvimento Científico e Tecnológico

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It is increasingly common use of a single computer system using different devices - personal computers, telephones cellular and others - and software platforms - systems graphical user interfaces, Web and other systems. Depending on the technologies involved, different software architectures may be employed. For example, in Web systems, it utilizes architecture client-server - usually extended in three layers. In systems with graphical interfaces, it is common architecture with the style MVC. The use of architectures with different styles hinders the interoperability of systems with multiple platforms. Another aggravating is that often the user interface in each of the devices have structure, appearance and behaviour different on each device, which leads to a low usability. Finally, the user interfaces specific to each of the devices involved, with distinct features and technologies is a job that needs to be done individually and not allow scalability. This study sought to address some of these problems by presenting a reference architecture platform-independent and that allows the user interface can be built from an abstract specification described in the language in the specification of the user interface, the MML. This solution is designed to offer greater interoperability between different platforms, greater consistency between the user interfaces and greater flexibility and scalability for the incorporation of new devices

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Middleware platforms have been widely used as an underlying infrastructure to the development of distributed applications. They provide distribution and heterogeneity transparency and a set of services that ease the construction of distributed applications. Nowadays, the middlewares accommodate an increasing variety of requirements to satisfy distinct application domains. This broad range of application requirements increases the complexity of the middleware, due to the introduction of many cross-cutting concerns in the architecture, which are not properly modularized by traditional programming techniques, resulting in a tangling and spread of theses concerns in the middleware code. The presence of these cross-cutting concerns limits the middleware scalability and aspect-oriented paradigm has been used successfully to improve the modularity, extensibility and customization capabilities of middleware. This work presents AO-OiL, an aspect-oriented (AO) middleware architecture, based on the AO middleware reference architecture. This middleware follows the philosophy that the middleware functionalities must be driven by the application requirements. AO-OiL consists in an AO refactoring of the OiL (Orb in Lua) middleware in order to separate basic and crosscutting concerns. The proposed architecture was implemented in Lua and RE-AspectLua. To evaluate the refactoring impact in the middleware architecture, this paper presents a comparative analysis of performance between AO-OiL and OiL

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Nowadays several electronics devices support digital videos. Some examples of these devices are cellphones, digital cameras, video cameras and digital televisions. However, raw videos present a huge amount of data, millions of bits, for their representation as the way they were captured. To store them in its primary form it would be necessary a huge amount of disk space and a huge bandwidth to allow the transmission of these data. The video compression becomes essential to make possible information storage and transmission. Motion Estimation is a technique used in the video coder that explores the temporal redundancy present in video sequences to reduce the amount of data necessary to represent the information. This work presents a hardware architecture of a motion estimation module for high resolution videos according to H.264/AVC standard. The H.264/AVC is the most advanced video coder standard, with several new features which allow it to achieve high compression rates. The architecture presented in this work was developed to provide a high data reuse. The data reuse schema adopted reduces the bandwidth required to execute motion estimation. The motion estimation is the task responsible for the largest share of the gains obtained with the H.264/AVC standard so this module is essential for final video coder performance. This work is included in Rede H.264 project which aims to develop Brazilian technology for Brazilian System of Digital Television

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There is a need for multi-agent system designers in determining the quality of systems in the earliest phases of the development process. The architectures of the agents are also part of the design of these systems, and therefore also need to have their quality evaluated. Motivated by the important role that emotions play in our daily lives, embodied agents researchers have aimed to create agents capable of producing affective and natural interaction with users that produces a beneficial or desirable result. For this, several studies proposing architectures of agents with emotions arose without the accompaniment of appropriate methods for the assessment of these architectures. The objective of this study is to propose a methodology for evaluating architectures emotional agents, which evaluates the quality attributes of the design of architectures, in addition to evaluation of human-computer interaction, the effects on the subjective experience of users of applications that implement it. The methodology is based on a model of well-defined metrics. In assessing the quality of architectural design, the attributes assessed are: extensibility, modularity and complexity. In assessing the effects on users' subjective experience, which involves the implementation of the architecture in an application and we suggest to be the domain of computer games, the metrics are: enjoyment, felt support, warm, caring, trust, cooperation, intelligence, interestingness, naturalness of emotional reactions, believabiliy, reducing of frustration and likeability, and the average time and average attempts. We experimented with this approach and evaluate five architectures emotional agents: BDIE, DETT, Camurra-Coglio, EBDI, Emotional-BDI. Two of the architectures, BDIE and EBDI, were implemented in a version of the game Minesweeper and evaluated for human-computer interaction. In the results, DETT stood out with the best architectural design. Users who have played the version of the game with emotional agents performed better than those who played without agents. In assessing the subjective experience of users, the differences between the architectures were insignificant

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The tracking between models of the requirements and architecture activities is a strategy that aims to prevent loss of information, reducing the gap between these two initial activities of the software life cycle. In the context of Software Product Lines (SPL), it is important to have this support, which allows the correspondence between this two activities, with management of variability. In order to address this issue, this paper presents a process of bidirectional mapping, defining transformation rules between elements of a goaloriented requirements model (described in PL-AOVgraph) and elements of an architectural description (defined in PL-AspectualACME). These mapping rules are evaluated using a case study: the GingaForAll LPS. To automate this transformation, we developed the MaRiPLA tool (Mapping Requirements to Product Line Architecture), through MDD techniques (Modeldriven Development), including Atlas Transformation Language (ATL) with specification of Ecore metamodels jointly with Xtext , a DSL definition framework, and Acceleo, a code generation tool, in Eclipse environment. Finally, the generated models are evaluated based on quality attributes such as variability, derivability, reusability, correctness, traceability, completeness, evolvability and maintainability, extracted from the CAFÉ Quality Model

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In the world we are constantly performing everyday actions. Two of these actions are frequent and of great importance: classify (sort by classes) and take decision. When we encounter problems with a relatively high degree of complexity, we tend to seek other opinions, usually from people who have some knowledge or even to the extent possible, are experts in the problem domain in question in order to help us in the decision-making process. Both the classification process as the process of decision making, we are guided by consideration of the characteristics involved in the specific problem. The characterization of a set of objects is part of the decision making process in general. In Machine Learning this classification happens through a learning algorithm and the characterization is applied to databases. The classification algorithms can be employed individually or by machine committees. The choice of the best methods to be used in the construction of a committee is a very arduous task. In this work, it will be investigated meta-learning techniques in selecting the best configuration parameters of homogeneous committees for applications in various classification problems. These parameters are: the base classifier, the architecture and the size of this architecture. We investigated nine types of inductors candidates for based classifier, two methods of generation of architecture and nine medium-sized groups for architecture. Dimensionality reduction techniques have been applied to metabases looking for improvement. Five classifiers methods are investigated as meta-learners in the process of choosing the best parameters of a homogeneous committee.

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The increasing complexity of integrated circuits has boosted the development of communications architectures like Networks-on-Chip (NoCs), as an architecture; alternative for interconnection of Systems-on-Chip (SoC). Networks-on-Chip complain for component reuse, parallelism and scalability, enhancing reusability in projects of dedicated applications. In the literature, lots of proposals have been made, suggesting different configurations for networks-on-chip architectures. Among all networks-on-chip considered, the architecture of IPNoSys is a non conventional one, since it allows the execution of operations, while the communication process is performed. This study aims to evaluate the execution of data-flow based applications on IPNoSys, focusing on their adaptation against the design constraints. Data-flow based applications are characterized by the flowing of continuous stream of data, on which operations are executed. We expect that these type of applications can be improved when running on IPNoSys, because they have a programming model similar to the execution model of this network. By observing the behavior of these applications when running on IPNoSys, were performed changes in the execution model of the network IPNoSys, allowing the implementation of an instruction level parallelism. For these purposes, analysis of the implementations of dataflow applications were performed and compared

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Os sensores inteligentes são dispositivos que se diferenciam dos sensores comuns por apresentar capacidade de processamento sobre os dados monitorados. Eles tipicamente são compostos por uma fonte de alimentação, transdutores (sensores e atuadores), memória, processador e transceptor. De acordo com o padrão IEEE 1451 um sensor inteligente pode ser dividido em módulos TIM e NCAP que devem se comunicar através de uma interface padronizada chamada TII. O módulo NCAP é a parte do sensor inteligente que comporta o processador. Portanto, ele é o responsável por atribuir a característica de inteligência ao sensor. Existem várias abordagens que podem ser utilizadas para o desenvolvimento desse módulo, dentre elas se destacam aquelas que utilizam microcontroladores de baixo custo e/ou FPGA. Este trabalho aborda o desenvolvimento de uma arquitetura hardware/software para um módulo NCAP segundo o padrão IEEE 1451.1. A infra-estrutura de hardware é composta por um driver de interface RS-232, uma memória RAM de 512kB, uma interface TII, o processador embarcado NIOS II e um simulador do módulo TIM. Para integração dos componentes de hardware é utilizada ferramenta de integração automática SOPC Builder. A infra-estrutura de software é composta pelo padrão IEEE 1451.1 e pela aplicação especí ca do NCAP que simula o monitoramento de pressão e temperatura em poços de petróleo com o objetivo de detectar vazamento. O módulo proposto é embarcado em uma FPGA e para a sua prototipação é usada a placa DE2 da Altera que contém a FPGA Cyclone II EP2C35F672C6. O processador embarcado NIOS II é utilizado para dar suporte à infra-estrutura de software do NCAP que é desenvolvido na linguagem C e se baseia no padrão IEEE 1451.1. A descrição do comportamento da infra-estrutura de hardware é feita utilizando a linguagem VHDL

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A complex depositional history, related to Atlantic rifting, demonstrates the geological evolution during the late Jurassic and early Neocomian periods in the Araripe Basin NE Brazil. Based on outcrop, seismic and remote sensing data, a new model of the tectono-stratigraphic evolution of the section that covers the stages Dom João, Rio da Serra and Aratu (Brejo Santo, Missão Velha and Abaiara formations) is presented in this paper. In the stratigraphic section studied, ten sedimentary facies genetically linked to nine architectural elements were described, representing depositional systems associated with fluvial, aeolian and deltaic environments. Based on the relationship between the rates of creation of accommodation space and sediment influx (A / S) it was possible to associate these depositional systems with High and Low accommodation system tracks. These system tracks represent two tectono-sequences, separated by regional unconformities. The Tectono-sequence I, which includes lithotypes from the Brejo Santo Formation and is related to the pre-rift stage, is bounded at the base by the Paleozoic unconformity. This unit represents only a High Accommodation System Track, composed by a succession of pelitic levels interbedded with sandstones and limestones, from a large fluvial floodplain origin, developed under arid climatic conditions. The Tectono-sequence II, separated from the underlying unit by an erosional unconformity, is related to the rift stage, and is composed by the Missão Velha and Abaiara Formation lithotypes. Changes in depositional style that reflect variations in the A / S ratio, and the presence of hydroplastic deformation bands, make it possible to divide this tectonosequence into two internal sequences. Sequence IIA, which includes the lower portion of the Missão Velha Formation and sequence IIB, is composed by the upper section of the Missão Velha and Abaiara Formations The Sequence IIA below, composed only by the Low Accommodation System Track, includes crossbedding sandstones interbedded with massive mudstones, which are interpreted as deposits of sandy gravel beds wandering rivers. Sequence IIB, above, is more complex, showing a basal Low Accommodation System Track and a High Accommodation System Track at the top, separated by an expansion surface. The lower System Track, related to the upper portion of the Missão Velha Formation, is composed by a series of amalgamated channels, separated by erosion surfaces, interpreted as deposits of a belt of braided channels. The High Accommodation System Track, correlated with the Abaiara Unit, is marked by a significant increase in the A / S, resulting in the progradation of a system of braided river deltas with aeolic influence. Regarding tectonic evolution, the stratigraphic study indicates that the Tectonosequence Rift in the Araripe basin was developed in two phases: first characterized by a beginning of rifting, related to Sequence IIA, followed by a phase of syndepositional deformation, represented by sequence IIB. The first phase was not influenced by the development of large faults, but was influenced by a sharp and continuous decrease of accommodation space that permitted a change in depositional patterns, establishing a new depositional architecture. In turn, the stage of syndepositional deformation allowed for the generation of enough accommodation space for the preservation of fluvial-lacustrine deposits and conditioned the progradation of a braided river-dominated delta system.

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The Rio do Peixe Basin is located in the border of Paraíba and Ceará states, immediately to the north of the Patos shear zone, encompassing an area of 1,315 km2. This is one of the main basins of eocretaceous age in Northeast Brazil, associated to the rifting event that shaped the present continental margin. The basin can be divided into four sub-basins, corresponding to Pombal, Sousa, Brejo das Freiras and Icozinho half-grabens. This dissertation was based on the analysis and interpretation of remote sensing products, field stratigraphic and structural data, and seismic sections and gravity data. Field work detailed the lithofacies characterization of the three formations previously recognised in the basin, Antenor Navarro, Sousa and Rio Piranhas. Unlike the classical vertical stacking, field relations and seismostratigraphic analysis highlighted the interdigitation and lateral equivalency between these units. On bio/chrono-stratigraphic and tectonic grounds, they correlate with the Rift Tectonosequence of neocomian age. The Antenor Navarro Formation rests overlies the crystalline basement in non conformity. It comprises lithofacies originated by a braided fluvial system system, dominated by immature, coarse and conglomeratic sandstones, and polymict conglomerates at the base. Its exposures occur in the different halfgrabens, along its flexural margins. Paleocurrent data indicate source areas in the basement to the north/NW, or input along strike ramps. The Sousa Formation is composed by fine-grained sandstones, siltites and reddish, locally grey-greenish to reddish laminated shales presenting wavy marks, mudcracks and, sometimes, carbonate beds. This formation shows major influence of a fluvial, floodplain system, with seismostratigraphic evidence of lacustrine facies at subsurface. Its distribution occupies the central part of the Sousa and Brejo das Freiras half-grabens, which constitute the main depocenters of the basin. Paleocurrent analysis shows that sediment transport was also from north/NW to south/SE

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Pós-graduação em Artes - IA

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Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)