Integration of roof-top solar photovoltaic systems into the low voltage distribution network

The advancement in solar photovoltaic (PV) technology, the cost and efficiency of PVs have encouraged users worldwide to adopt more and more PVs as it is free from greenhouse gas emissions and unlimited in nature. Integration of roof-top solar PV systems is currently emerging rapidly in Australia as the governments are giving attractive incentives and encouraging households to build a sustainable climate-friendly society for the future. The key major barriers to the integration of roof-top solar PV systems are the uncertainties in the performance of the low voltage distribution network due to the intermittent nature of solar PV sources. In this paper, a model was developed to investigate the potential technical impacts of integrating roof-top solar PV systems into the low voltage distribution network in a subtropical climate. The results show that integration of roof-top solar PV in the customer premises causes uncertainties such as voltage fluctuations, phase unbalance, distribution transformer overloading, reactive power compensation, and harmonic injections that detract the overall power quality of the typical distribution network. © 2014 AIP Publishing LLC.

Low voltage and variable-pressure scanning electron microscopy of fractured composites

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Low voltage analog synthesizer of orthogonal signals: A current-mode approach

An analog synthesizer of orthogonal signals for digital CMOS technology and 3V supply voltage is presented. The adaptive architecture accomplishes the synthesis of mutually orthogonal signal, such as trigonometric and polynomial basis. Experimental results using 0.35 mu m AMS CMOS process are presented for generation of the cosine and Legendre basis.

Low voltage analog synthesizer of orthogonal signals using current mode techniques

An analog synthesizer of orthogonal signals for digital CMOS technology and 3V supply voltage is presented. The adaptive architecture accomplishes the synthesis of mutually orthogonal signal, such as trigonometric and polynomial basis. Simulation results using 0.35 mu m AMS CMOS process are presented for generation of the cosine and Legendre basis.

Low-voltage varistor based on (Sn,Ti)O-2 ceramics

A description is given of the nonohmic behavior obtained in (SnxTi1-x)O-2-based systems. A matrix founded on (SnxTi1-x)O-2-based systems doped with Nb2O5 leads to a low-voltage varistor system with nonlinear coefficient values of similar to9. The presence of the back-to-back Schottky-type barrier is observed based on the voltage dependence of the capacitance. When doped with CoO, the (SnxTi1-x)O(2)(.)based system presents higher nonlinear coefficient values (>30) than does the SnO2-based varistor system.

A low-voltage wide-swing programmable-gain current amplifier

A CMOS low-voltage, wide-swing continuous-time current amplifier is presented. Exhibiting an open-loop architecture, the circuit is composed of transresistance and transconductance stages built upon triode-operating transistors. In addition to an extended dynamic range, the current gain can be programmed within good accuracy by a rapport involving only transistor geometries and tuning biases. Low temperature-drift on gain setting is then expected.In accordance with a 0.35 mum n-well CMOS fabrication process and a single 1.1 V-supply, a balanced current-amplifier is designed for a programmable gain-range of 6 - 34 dB and optimized with respect to dynamic range. Simulated results from PSPICE and Bsim3v3 models indicate, for a 100 muA(pp)-output current, a THD of 0.96 and 1.87% at 1 KHz and 100 KHz, respectively. Input noise is 120 pArootHz @ 10 Hz, with S/N = 63.2 dB @ 1%-THD. At maximum gain, total quiescent consumption is 334 muW. Measurements from a prototyped amplifier reveal a gain-interval of 4.8-33.1 dB and a maximum current swing of 120 muA(pp). The current-amplifier bandwidth is above 1 MHz.

PROCESSING AND CHARACTERIZATION OF LOW-VOLTAGE VARISTORS

ZnO seed particles and Cr2O3 were used in this study to control the microstructure of ZnO varistors. The seed particles were prepared by adding 1.0 mol % BaO to ZnO. The powder was then calcined at 800-degrees-C for 2 h, pressed into pellets and sintered at 1400-degrees-C for 8 h. The sintered ZnO was ground and the BaO eliminated by washing in water. The remaining ZnO powder was classified into a size fraction ranging from 38 to 149 mum. The addition of a small amount (1 weight %) ZnO seed grains produces varistors with low breakdown voltages (7.6 V/mm) and an alpha coefficient of approximately 10. The addition of Cr2O3 stabilizes the spinel phase yielding a more homogeneous microstructure, but degraded electrical behaviour of the ZnO varistor.

A low-voltage programmable-gain CMOS amplifier with very-low temperature-drift

A new topology for a LVLP variable-gain CMOS amplifier is presented. Input- and load-stage are built around triode-transconductors so that voltage-gain is fully defined by a linear relationship involving only device-geometries and biases. Excellent gain-accuracy, temperature-insensitivity; and wide range of programmability, are thus achieved. Moreover, adaptative biasing improves the common-mode voltage stability upon gain-adjusting. As an example, a 0-40dB programmablegain audio-amplifier is designed. Its performance is supported by a range of simulations. For VDD=1.8V and 20dB-nominal gain, one has Av=19.97dB, f3db=770KHz and quiescent dissipation of 378μW. Over temperatures from -25°C to 125°C, the 0. ldB-bandwidth is 52KHz. Dynamic-range is optimized to 57.2dB and 42.6dB for gains of 20dB and 40dB, respectively. THD figures correspond to -60.6dB@Vout= 1Vpp and -79.7dB@Vout= 0.5 Vpp. A nearly constant bandwidth for different gains is also attained.

A low-voltage triode-MOSFET four-quadrant multiplier with optimized current-efficiency

A low-voltage, low-power four-quadrant analog multiplier with optimized current-efficiency is presented. Its core corresponds to a pseudodifferential cascode, gain-boosting triode-transconductor. According to a low-voltage 1.2μm CMOS n-well process, operand differential-amplitudes are 1.0Vpp and 0.32Vpp for a 1.3V-supply. Common-mode voltages are properly chosen to maximize current-efficiency to 58%. Total quiescent dissipation is 260μW. A range of PSPICE simulation supports theoretical analysis. Excellent linearity is observed on dc characteristic. Assuming a ±0.5% mismatch on (W/L) and VTH THD at full-scale is 0.93% and 1.42%, for output frequencies of 1MHz and 10MHz, respectively.

A low-voltage programmable-gain current-mode amplifier

A CMOS low-voltage, wide-band continuous-time current amplifier is presented. Based on an open-loop topology, the circuit is composed by transresistance and transconductance stages built around triode-operating transistors. In addition to an extended dynamic range, the amplifier gain can be programmed within good accuracy by the rapport between the aspect-ratio of such transistors and tuning biases Vxand Vy. A balanced current-amplifier according to a single I. IV-supply and a 0.35μm fabrication process is designed. Simulated results from PSPiCE and Bsm3v3 models indicate a programmable gain within the range 20-34dB and a minimum break-frequency of IMHz @CL=IpF. For a 200 μApp-level, THD is 0.8% and 0.9% at IKHz and 100KHz, respectively. Input noise is 405pA√Hz @20dB-gain, which gives a SNR of 66dB @1MHz-bandwidth. Maximum quiescent power consumption is 56μ W. © 2002 IEEE.

An active leakage-injection scheme applied to low-voltage SRAMs

An active leakage-injection scheme (ALIS) for low-voltage (LV) high-density (HD) SRAMs is presented. By means of a feedback loop comprising a servo-amplifier and a common-drain MOSFET, a current matching the respective bit-line leakage is injected onto the line during precharge and sensing, preventing the respective capacitances from erroneous discharges. The technique is able to handle leakages up to hundreds of μA at high operating temperatures. Since no additional timing is required, read-out operations are performed at no speed penalty. A simplified 256×1bit array was designed in accordance with a 0.35 CMOS process and 1.2V-supply. A range of PSPICE simulation attests the efficacy of ALIS. With an extra power consumption of 242 μW, a 200 μA-leakage @125°C, corresponding to 13.6 times the cell current, is compensated.

A low-voltage low-sensitivity sinusoidal VCO for DPLL realizations

A quasi-sinusoidal linearly tunable OTA-C VCO built with triode-region transconductors is presented. Oscillation upon power-on is ensured by RHP poles associated with gate-drain capacitances of OTA input devices. Since the OTA nonlinearity stabilizes the amplitude, the oscillation frequency f0 is first-order independent of VDD, making the VCO adequate to mixed-mode designs. A range of simulations attests the theoretical analysis. As part of a DPLL, the VCO was prototyped on a 0.8μm CMOS process, occupying an area of 0.15mm2. Nominal f0 is 1MHz, with K VCo=8.4KHz/mV. Measured sensitivity to VDD is below 2.17, while phase noise is -86dBc at 100-KHz offset. The feasibility of the VCO for higher frequencies is verified by a redesign based on a 0.35μm CMOS process and VDD=3.3V, with a linear frequency-span of l3.2MHz - 61.5MHz.

Contribution of distributed generators to the harmonic distortion in low voltage power network

In the last 20 years immense efforts have been made to utilize renewable energy sources for electric power generation. This paper investigates some aspects of integration of the distributed generators into the low voltage distribution network. An assessment of impact of the distributed generators on the voltage and current harmonic distortion in the low voltage network is performed. Results obtained from a case study, using real-life low voltage network, are presented and discussed.

Improved low-voltage-ride-through capability of fixed-speed wind turbines using decentralised control of STATCOM with energy storage system

The design and implementation of a new control scheme for reactive power compensation, voltage regulation and transient stability enhancement for wind turbines equipped with fixed-speed induction generators (IGs) in large interconnected power systems is presented in this study. The low-voltage-ride-through (LVRT) capability is provided by extending the range of the operation of the controlled system to include typical post-fault conditions. A systematic procedure is proposed to design decentralised multi-variable controllers for large interconnected power systems using the linear quadratic (LQ) output-feedback control design method and the controller design procedure is formulated as an optimisation problem involving rank-constrained linear matrix inequality (LMI). In this study, it is shown that a static synchronous compensator (STATCOM) with energy storage system (ESS), controlled via robust control technique, is an effective device for improving the LVRT capability of fixed-speed wind turbines.

Space charge and dielectric response measurements to assess insulation aging of low-voltage cables used in nuclear power plants

The current design life of nuclear power plant (NPP) could potentially be extended to 80 years. During this extended plant life, all safety and operationally relevant Instrumentation & Control (I&C) systems are required to meet their designed performance requirements to ensure safe and reliable operation of the NPP, both during normal operation and subsequent to design base events. This in turn requires an adequate and documented qualification and aging management program. It is known that electrical insulation of I&C cables used in safety related circuits can degrade during their life, due to the aging effect of environmental stresses, such as temperature, radiation, vibration, etc., particularly if located in the containment area of the NPP. Thus several condition monitoring techniques are required to assess the state of the insulation. Such techniques can be used to establish a residual lifetime, based on the relationship between condition indicators and ageing stresses, hence, to support a preventive and effective maintenance program. The object of this thesis is to investigate potential electrical aging indicators (diagnostic markers) testing various I&C cable insulations subjected to an accelerated multi-stress (thermal and radiation) aging.