Estudo de transistores de tunelamento induzido por efeito de campo (TFET) construídos em nanofio.

Esse trabalho de mestrado teve como estudo o transistor Túnel-FET (TFET) fabricado em estrutura de nanofio de silício. Este estudo foi feito de forma teórica (simulação numérica) e experimental. Foram estudadas as principais características digitais e analógicas do dispositivo e seu potencial para uso em circuitos integrados avançados para a próxima década. A análise foi feita através da extração experimental e estudo dos principais parâmetros do dispositivo, tais como inclinação de sublimiar, transcondutância (gm), condutância de saída (gd), ganho intrínseco de tensão (AV) e eficiência do transistor. As medidas experimentais foram comparadas com os resultados obtidos pela simulação. Através do uso de diferentes parâmetros de ajuste e modelos de simulação, justificou-se o comportamento do dispositivo observado experimentalmente. Durante a execução deste trabalho estudou-se a influência da escolha do material de fonte no desempenho do dispositivo, bem como o impacto do diâmetro do nanofio nos principais parâmetros analógicos do transistor. Os dispositivos compostos por fonte de SiGe apresentaram valores maiores de gm e gd do que aqueles compostos por fonte de silício. A diferença percentual entre os valores de transcondutância para os diferentes materiais de fonte variou de 43% a 96%, sendo dependente do método utilizado para comparação, e a diferença percentual entre os valores de condutância de saída variou de 38% a 91%. Observou-se também uma degradação no valor de AV com a redução do diâmetro do nanofio. O ganho calculado a partir das medidas experimentais para o dispositivo com diâmetro de 50 nm é aproximadamente 45% menor do que o correspondente ao diâmetro de 110 nm. Adicionalmente estudou-se o impacto do diâmetro considerando diferentes polarizações de porta (VG) e concluiu-se que os TFETs apresentam melhor desempenho para baixos valores de VG (houve uma redução de aproximadamente 88% no valor de AV com o aumento da tensão de porta de 1,25 V para 1,9 V). A sobreposição entre porta e fonte e o perfil de dopantes na junção de tunelamento também foram analisados a fim de compreender qual combinação dessas características resultariam em um melhor desempenho do dispositivo. Observou-se que os melhores resultados estavam associados a um alinhamento entre o eletrodo de porta e a junção entre fonte e canal e a um perfil abrupto de dopantes na junção. Por fim comparou-se a tecnologia MOS com o TFET, obtendo-se como resultado um maior valor de AV (maior do que 40 dB) para o TFET.

Noise in gallium nitride-based quantum well structures used for nanometer devices in the frequency range 1 Hz--3 Mhz and temperature range 77K--324K

Electronic noise has been investigated in AlxGa1−x N/GaN Modulation-Doped Field Effect Transistors (MODFETs) of submicron dimensions, grown for us by MBE (Molecular Beam Epitaxy) techniques at Virginia Commonwealth University by Dr. H. Morkoç and coworkers. Some 20 devices were grown on a GaN substrate, four of which have leads bonded to source (S), drain (D), and gate (G) pads, respectively. Conduction takes place in the quasi-2D layer of the junction (xy plane) which is perpendicular to the quantum well (z-direction) of average triangular width ∼3 nm. A non-doped intrinsic buffer layer of ∼5 nm separates the Si-doped donors in the AlxGa1−xN layer from the 2D-transistor plane, which affords a very high electron mobility, thus enabling high-speed devices. Since all contacts (S, D, and G) must reach through the AlxGa1−xN layer to connect internally to the 2D plane, parallel conduction through this layer is a feature of all modulation-doped devices. While the shunting effect may account for no more than a few percent of the current IDS, it is responsible for most excess noise, over and above thermal noise of the device. ^ The excess noise has been analyzed as a sum of Lorentzian spectra and 1/f noise. The Lorentzian noise has been ascribed to trapping of the carriers in the AlxGa1−xN layer. A detailed, multitrapping generation-recombination noise theory is presented, which shows that an exponential relationship exists for the time constants obtained from the spectral components as a function of 1/kT. The trap depths have been obtained from Arrhenius plots of log (τT2) vs. 1000/T. Comparison with previous noise results for GaAs devices shows that: (a) many more trapping levels are present in these nitride-based devices; (b) the traps are deeper (farther below the conduction band) than for GaAs. Furthermore, the magnitude of the noise is strongly dependent on the level of depletion of the AlxGa1−xN donor layer, which can be altered by a negative or positive gate bias VGS. ^ Altogether, these frontier nitride-based devices are promising for bluish light optoelectronic devices and lasers; however, the noise, though well understood, indicates that the purity of the constituent layers should be greatly improved for future technological applications. ^

Organic functionalisation, doping and characterisation of semiconductor surfaces for future CMOS device applications

Organic Functionalisation, Doping and Characterisation of Semiconductor Surfaces for Future CMOS Device Applications Semiconductor materials have long been the driving force for the advancement of technology since their inception in the mid-20th century. Traditionally, micro-electronic devices based upon these materials have scaled down in size and doubled in transistor density in accordance with the well-known Moore’s law, enabling consumer products with outstanding computational power at lower costs and with smaller footprints. According to the International Technology Roadmap for Semiconductors (ITRS), the scaling of metal-oxide-semiconductor field-effect transistors (MOSFETs) is proceeding at a rapid pace and will reach sub-10 nm dimensions in the coming years. This scaling presents many challenges, not only in terms of metrology but also in terms of the material preparation especially with respect to doping, leading to the moniker “More-than-Moore”. Current transistor technologies are based on the use of semiconductor junctions formed by the introduction of dopant atoms into the material using various methodologies and at device sizes below 10 nm, high concentration gradients become a necessity. Doping, the controlled and purposeful addition of impurities to a semiconductor, is one of the most important steps in the material preparation with uniform and confined doping to form ultra-shallow junctions at source and drain extension regions being one of the key enablers for the continued scaling of devices. Monolayer doping has shown promise to satisfy the need to conformally dope at such small feature sizes. Monolayer doping (MLD) has been shown to satisfy the requirements for extended defect-free, conformal and controllable doping on many materials ranging from the traditional silicon and germanium devices to emerging replacement materials such as III-V compounds This thesis aims to investigate the potential of monolayer doping to complement or replace conventional doping technologies currently in use in CMOS fabrication facilities across the world.

Electrical characterization of electronic circuits produced by inkjet printing

Dissertação de Mestrado, Engenharia Electrónica e Telecomunicações, Faculdade de Ciências e Tecnologia, Universidade do Algarve, 2014

Detection of explosive vapors using organic thin-film transistors

Field effect transistors (FETs) based on organic materials were investigated as sensors for detecting 2,4,6-trinitrotoluene (TNT) vapors. Several FET devices were fabricated using two types of semiconducting organic materials, solution processed polymers deposited by spin coating and, oligomers (or small molecules) deposited by vacuum sublimation. When vapors of nitroaromatic compounds bind to thin films of organic materials which form the transistor channel, the conductivity of the thin film increases and changes the transistor electrical characteristic. The use of the amplifying properties of the transistor represents a major advantage over conventional techniques based on simple changes of resistance in polymers frequently used in electronic noses.

Trapezoidal cross-sectional influence on FinFET threshold voltage and corner effects

Fin field effect transistors (FinFETS) are silicon-on-insulator (SOI) transistors with three-dimensional structures. As a result of some fabrication-process limitations (as nonideal anisotropic overetch) some FinFETs have inclined surfaces, which results in trapezoidal cross sections instead of rectangular sections, as expected. This geometric alteration results in some device issues, like carrier profile, threshold voltage, and corner effects. This work analyzes these consequences based on three-dimensional numeric simulation of several dual-gate and triple-gate FinFETs. The simulation results show that the threshold voltage depends on the sidewall inclination angle and that this dependence varies according to the body doping level. The corner effects also depend on the inclination angle and doping level. (C) 2008 The Electrochemical Society.

Mimicking nanoribbon behavior using a graphene layer on SiC

We propose a natural way to create quantum-confined regions in graphene in a system that allows large-scale device integration. We show, using first-principles calculations, that a single graphene layer on a trenched region of [000 (1) over bar] SiC mimics (i) the energy bands around the Fermi level and (ii) the magnetic properties of free-standing graphene nanoribbons. Depending on the trench direction, either zigzag or armchair nanoribbons are mimicked. This behavior occurs because a single graphene layer over a SiC surface loses the graphenelike properties, which are restored solely over the trenches, providing in this way a confined strip region.

Theoretical investigation of atomic and electronic structures of Ga(2)O(3)(ZnO)(6)

Transparent conducting oxides (TCO) are widely used in technological applications ranging from photovoltaics to thin-film transparent field-effect transistors. In this work we report a first-principles investigation, based on density-functional theory, of the atomic and electronic properties of Ga(2)O(3)(ZnO)(6) (GZO(6)), which is a promising candidate to be used as host oxide for wide band gap TCO applications. We identify a low-energy configuration for the coherent distribution of the Ga and Zn atoms in the cation positions within the experimentally reported orthorhombic GZO(6) structure. Four Ga atoms are located in four-fold sites, while the remaining 12 Ga atoms in the unit cell form four shared Ga agglomerates (a motif of four atoms). The Zn atoms are distributed in the remaining cation sites with effective coordination numbers from 3.90 to 4.50. Furthermore, we identify the natural formation of twin-boundaries in GZO(6), which can explain the zigzag modulations observed experimentally by high-resolution transmission electron microscopy in GZO(n) (n=9). Due to the intrinsic twin-boundary formation, polarity inversion in the ZnO tetrahedrons is present which is facilitated by the formation of the Ga agglomerates. Our analysis shows that the formation of fourfold Ga sites and Ga agglomerates are stabilized by the electronic octet rule, while the distribution of Ga atoms and the formation of the twin-boundary help alleviate excess strain. Finally we identify that the electronic properties of GZO(6) are essentially determined by the electronic properties of ZnO, i.e., there are slight changes in the band gap and optical absorption properties.

Low-frequency noise and static analysis of the impact of the TiN metal gate thicknesses on n- and p-channel MuGFETs

The impact of the titanium nitride (TIN) gate electrode thickness has been investigated in n and p channel SOI multiple gate field effect transistors (MuGFETs) through low frequency noise charge pumping and static measurements as well as capacitance-voltage curves The results suggest that a thicker TIN metal gate electrode gives rise to a higher EOT a lower mobility and a higher interface trap density The devices have also been studied for different back gate biases where the GIFBE onset occurs at lower front-gate voltage for thinner TIN metal gate thickness and at higher V(GF) In addition it is demonstrated that post deposition nitridation of the MOCVD HfSiO gate dielectric exhibits an unexpected trend with TIN gate electrode thickness where a continuous variation of EOT and an increase on the degradation of the interface quality are observed (C) 2010 Elsevier Ltd All rights reserved

Probing Individual Quantum Dots: Noise in Self-Assembled Systems

In this work we explore the noise characteristics in lithographically-defined two terminal devices containing self-assembled InAs/InP quantum dots. The experimental ensemble of InAs dots show random telegraph noise (RTN) with tuneable relative amplitude-up to 150%-in well defined temperature and source-drain applied voltage ranges. Our numerical simulation indicates that the RTN signature correlates with a very low number of quantum dots acting as effective charge storage centres in the structure for a given applied voltage. The modulation in relative amplitude variation can thus be associated to the altered electrostatic potential profile around such centres and enhanced carrier scattering provided by a charged dot.

Thin titanium oxide films deposited by e-beam evaporation with additional rapid thermal oxidation and annealing for ISFET applications

Titanium oxide (TiO(2)) has been extensively applied in the medical area due to its proved biocompatibility with human cells [1]. This work presents the characterization of titanium oxide thin films as a potential dielectric to be applied in ion sensitive field-effect transistors. The films were obtained by rapid thermal oxidation and annealing (at 300, 600, 960 and 1200 degrees C) of thin titanium films of different thicknesses (5 nm, 10 nm and 20 nm) deposited by e-beam evaporation on silicon wafers. These films were analyzed as-deposited and after annealing in forming gas for 25 min by Ellipsometry, Fourier Transform Infrared Spectroscopy (FTIR), Raman Spectroscopy (RAMAN), Atomic Force Microscopy (AFM), Rutherford Backscattering Spectroscopy (RBS) and Ti-K edge X-ray Absorption Near Edge Structure (XANES). Thin film thickness, roughness, surface grain sizes, refractive indexes and oxygen concentration depend on the oxidation and annealing temperature. Structural characterization showed mainly presence of the crystalline rutile phase, however, other oxides such Ti(2)O(3), an interfacial SiO(2) layer between the dielectric and the substrate and the anatase crystalline phase of TiO(2) films were also identified. Electrical characteristics were obtained by means of I-V and C-V measured curves of Al/Si/TiO(x)/Al capacitors. These curves showed that the films had high dielectric constants between 12 and 33, interface charge density of about 10(10)/cm(2) and leakage current density between 1 and 10(-4) A/cm(2). Field-effect transistors were fabricated in order to analyze I(D) x V(DS) and log I(D) x Bias curves. Early voltage value of -1629 V, R(OUT) value of 215 M Omega and slope of 100 mV/dec were determined for the 20 nm TiO(x) film thermally treated at 960 degrees C. (C) 2009 Elsevier B.V. All rights reserved.

KDP/PEDOT: PSS mixture as a new alternative in the fabrication of pressure sensing devices

In this work we studied the mixture of poly(3,4-ethylenedioxythiophene): poly(styrenesulfonate) (PEDOT:PSS), a commercial polymer, with monobasic potassium phosphate (KDP), a piezoelectric salt, as a possible novel material in the fabrication of a low cost, easy-to-make,flexible pressure sensing device. The mixture between KDP and PEDOT: PSS was painted in a flexible polyester substrate and dried. Afterwards, I x V curves were carried out. The samples containing KDP presented higher values of current in smaller voltages than the PEDOT: PSS without KDP. This can mean a change in the chain arrays. Other results showed that the material responds to directly applied pressure to the sample that can be useful to sensors fabrication. (c) 2008 Elsevier B.V. All rights reserved.

Phototransistor with nanocrystalline Si/amorphous Si bilayer channel

We report a field-effect phototransistor with a channel comprising a thin nanocrystalline silicon transport layer and a thicker hydrogenated amorphous silicon absorption layer. The semiconductor and dielectric layers were deposited by radio-frequency plasma enhanced chemical vapor deposition. The phototransistor with channel length of 24 microns and photosensitive area of 1.4 mm(2) shows an off-current of about 1 pA, and high photoconductive gain in the subthreshold region. Measurements of the quantum efficiency at different incident light intensities and biasing conditions, along with spectral-response characteristics, and threshold voltage stability characterization demonstrate the feasibility of the phototransistor for low light level detection.

Overexpression of tumour-associated carbohydrate antigen sialyl-Tn in advanced bladder tumours

Little is known on the expression of the tumour-associated carbohydrate antigen sialyl-Tn (STn), in bladder cancer. We report here that 75% of the high-grade bladder tumours, presenting elevated proliferation rates and high risk of recurrence/progression expressed STn. However, it was mainly found in non-proliferative areas of the tumour, namely in cells invading the basal and muscle layers. STn was also found in tumour-adjacent mucosa, which suggests its dependence on a field effect of the tumour. Furthermore, it was not expressed by the normal urothelium, demonstrating the cancer-specific nature of this antigen. STn expression correlated with that of sialyltransferase ST6GalNAc.I, its major biosynthetic enzyme. The stable expression of ST6GalNAc.I in the bladder cancer cell line MCR induced STn expression and a concomitant increase of cell motility and invasive capability. Altogether, these results indicate for the first time a link between STn expression and malignancy in bladder cancer. Hence, therapies targeting STn may constitute new treatment approaches for these tumours.

Reconfigurable antenna for mobile terminal

Trabalho Final de Mestrado para obtenção do grau de Mestrado em Engenharia Electrónica e Telecomunicações