Novel architecture to facilitate disassembly and reuse of electronic components and sub-assemblies

This paper advances the proposition that in many electronic products, the partitioning scheme adopted and the interconnection system used to interconnect the sub-assemblies or components are intimately related to the economic benefits, and hence the attractiveness, of reuse of these items. An architecture has been developed in which the residual values of the connectors, components and sub-assemblies are maximized, and opportunities for take-back and reuse of redundant items are greatly enhanced. The system described also offers significant manufacturing cost benefits in terms of ease of assembly, compactness and robustness.

FPGA, physics-based modeling of IGBT and pin diode for hardware co-simulation of complex power electronic converters and systems

This paper presents the steps and the challenges for implementing analytical, physics-based models for the insulated gate bipolar transistor (IGBT) and the PIN diode in hardware and more specifically in field programmable gate arrays (FPGAs). The models can be utilised in hardware co-simulation of complex power electronic converters and entire power systems in order to reduce the simulation time without compromising the accuracy of results. Such a co-simulation allows reliable prediction of the system's performance as well as accurate investigation of the power devices' behaviour during operation. Ultimately, this will allow application-specific optimisation of the devices' structure, circuit topologies as well as enhancement of the control and/or protection schemes.