Influence of coiling in stress relaxation of prestressing steel wires

The possible deleterious effects of coiling and long-time storage of coiled wires on the stress relaxation behaviour of prestressing steel wires has been checked by means of experimental work and a simple analytical model. The results show that if the requirements of Standards are fulfilled (minimum coiling diameters) these effects can be neglected. However, some other factors like previous residual stresses, long-time storage or storage at high temperatures, can trigger or emphasise this damage to the material. In the authors’ opinion it is recommendable to control the final curvature of the wires after uncoiling prior to prestressing, as required in some Standards.

NDT for concrete under accelerated freeze/thaw tests and surface scaling

Freezing of water or salt solution in concrete pores is a main cause for severe damage and significant reduction of the service life. Most of the freeze-thaw (F-T) accelerated tests measure the scaling of concrete by weighting. This paper presents complementary procedures based on the use of strain gages and ultrasonic pulse velocity (UPV) for measuring the deterioration of concrete due to freezing and thawing. These non-destructive testing (NDT) procedures are applied to two types of concretes, one susceptible to F-T damage and the other does not. The results show a good correlation between scaling and the measurements obtained with NDT. Showing NDT the advantage to detect before the damage and to perform continuous measurement

Bond Modelling of prestressed concrete during the prestressing force release

This paper presents an analytical model for simulating the bond between steel and concrete, in precast prestressed concrete elements, during the prestressing force release. The model establishes a relationship between bond stress, steel and concrete stress and slip in such concrete structures. This relationship allows us to evaluate the bond stress in the transmission zone, where bond stress is not constant, along the whole prestressing force release process. The model is validated with the results of a series of tests and is extended to evaluate the transmission length. This capability has been checked by comparing the transmission length predicted by the model and one measured experimentally in a series of tests.

Toward Multi-Scale Object-Based Data Fusion

This paper proposes a new methodology for object based 2-D data fu- sion, with a multiscale character. This methodology is intended to be use in agriculture, specifically in the characterization of the water status of different crops, so as to have an appropriate water management at a farm-holding scale. As a first approach to its evaluation, vegetation cover vigor data has been integrated with texture data. For this purpose, NDVI maps have been calculated using a multispectral image and Lacunarity maps from the panchromatic image. Preliminary results show this methodology is viable in the integration and management of large volumes of data, which characterize the behavior of agricultural covers at farm-holding scale.

A waypoint-based mission planner for a farmland coverage with an aerial robot - a precision farming tool

Remote sensing (RS) with aerial robots is becoming more usual in every day time in Precision Agriculture (PA) practices, do to their advantages over conventional methods. Usually, available commercial platforms providing off-the-shelf waypoint navigation are adopted to perform visual surveys over crop fields, with the purpose to acquire specific image samples. The way in which a waypoint list is computed and dispatched to the aerial robot when mapping non empty agricultural workspaces has not been yet discussed. In this paper we propose an offline mission planner approach that computes an efficient coverage path subject to some constraints by decomposing the environment approximately into cells. Therefore, the aim of this work is contributing with a feasible waypoints-based tool to support PA practices

Multiscale object-based classification of satellite images merging multispectral information with panchromatic textural features

Once admitted the advantages of object-based classification compared to pixel-based classification; the need of simple and affordable methods to define and characterize objects to be classified, appears. This paper presents a new methodology for the identification and characterization of objects at different scales, through the integration of spectral information provided by the multispectral image, and textural information from the corresponding panchromatic image. In this way, it has defined a set of objects that yields a simplified representation of the information contained in the two source images. These objects can be characterized by different attributes that allow discriminating between different spectral&textural patterns. This methodology facilitates information processing, from a conceptual and computational point of view. Thus the vectors of attributes defined can be used directly as training pattern input for certain classifiers, as for example artificial neural networks. Growing Cell Structures have been used to classify the merged information.

Bio-inspired FPGA Architecture for Self-Calibration of an Image Compression Core based on Wavelet Transforms in Embedded Systems

A generic bio-inspired adaptive architecture for image compression suitable to be implemented in embedded systems is presented. The architecture allows the system to be tuned during its calibration phase. An evolutionary algorithm is responsible of making the system evolve towards the required performance. A prototype has been implemented in a Xilinx Virtex-5 FPGA featuring an adaptive wavelet transform core directed at improving image compression for specific types of images. An Evolution Strategy has been chosen as the search algorithm and its typical genetic operators adapted to allow for a hardware friendly implementation. HW/SW partitioning issues are also considered after a high level description of the algorithm is profiled which validates the proposed resource allocation in the device fabric. To check the robustness of the system and its adaptation capabilities, different types of images have been selected as validation patterns. A direct application of such a system is its deployment in an unknown environment during design time, letting the calibration phase adjust the system parameters so that it performs efcient image compression. Also, this prototype implementation may serve as an accelerator for the automatic design of evolved transform coefficients which are later on synthesized and implemented in a non-adaptive system in the final implementation device, whether it is a HW or SW based computing device. The architecture has been built in a modular way so that it can be easily extended to adapt other types of image processing cores. Details on this pluggable component point of view are also given in the paper.

Cost and energy efficient reconfigurable embedded platform using Spartan-6 FPGAs

Modern FPGAs with run-time reconfiguration allow the implementation of complex systems offering both the flexibility of software-based solutions combined with the performance of hardware. This combination of characteristics, together with the development of new specific methodologies, make feasible to reach new points of the system design space, and make embedded systems built on these platforms acquire more and more importance. However, the practical exploitation of this technique in fields that traditionally have relied on resource restricted embedded systems, is mainly limited by strict power consumption requirements, the cost and the high dependence of DPR techniques with the specific features of the device technology underneath. In this work, we tackle the previously reported problems, designing a reconfigurable platform based on the low-cost and low-power consuming Spartan-6 FPGA family. The full process to develop the platform will be detailed in the paper from scratch. In addition, the implementation of the reconfiguration mechanism, including two profiles, is reported. The first profile is a low-area and low-speed reconfiguration engine based mainly on software functions running on the embedded processor, while the other one is a hardware version of the same engine, implemented in the FPGA logic. This reconfiguration hardware block has been originally designed to the Virtex-5 family, and its porting process will be also described in this work, facing the interoperability problem among different families.

Area-delay Trade-offs of Texture Decompressors for a Graphics Processing Unit

Graphics Processing Units have become a booster for the microelectronics industry. However, due to intellectual property issues, there is a serious lack of information on implementation details of the hardware architecture that is behind GPUs. For instance, the way texture is handled and decompressed in a GPU to reduce bandwidth usage has never been dealt with in depth from a hardware point of view. This work addresses a comparative study on the hardware implementation of different texture decompression algorithms for both conventional (PCs and video game consoles) and mobile platforms. Circuit synthesis is performed targeting both a reconfigurable hardware platform and a 90nm standard cell library. Area-delay trade-offs have been extensively analyzed, which allows us to compare the complexity of decompressors and thus determine suitability of algorithms for systems with limited hardware resources.