999 resultados para Hardware Transactional Memory


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This article examines John Sommerfield’s 1936 novel, May Day, a work that experiments with multiple perspectives, voices and modes. The article examines the formal experiments of the novel in order to bring into focus contemporary debates around the aesthetics of socialist realism, the politics of Popular Front anti-fascism and the relationship between writers on the left and the legacies of literary modernism. The article suggests that while leftist writers’ appropriations of modernist techniques have been noted by critics, there has been a tendency to assume that such approaches were in contravention of the aesthetics of socialist realism. Socialist realism is shown to be more a fluid and disputed concept than such readings suppose, and Sommerfield’s adaptations of modernist textual strategies are interpreted as key components of a political aesthetic directed towards the problems of alienation and social fragmentation.

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Pesticide exposure during brain development could represent an important risk factor for the onset of neurodegenerative diseases. Previous studies investigated the effect of permethrin (PERM) administered at 34 mg/kg, a dose close to the no observable adverse effect level (NOAEL) from post natal day (PND) 6 to PND 21 in rats. Despite the PERM dose did not elicited overt signs of toxicity (i.e. normal body weight gain curve), it was able to induce striatal neurodegeneration (dopamine and Nurr1 reduction, and lipid peroxidation increase). The present study was designed to characterize the cognitive deficits in the current animal model. When during late adulthood PERM treated rats were tested for spatial working memory performances in a T-maze-rewarded alternation task they took longer to choose for the correct arm in comparison to age matched controls. No differences between groups were found in anxiety-like state, locomotor activity, feeding behavior and spatial orientation task. Our findings showing a selective effect of PERM treatment on the T-maze task point to an involvement of frontal cortico-striatal circuitry rather than to a role for the hippocampus. The predominant disturbances concern the dopamine (DA) depletion in the striatum and, the serotonin (5-HT) and noradrenaline (NE) unbalance together with a hypometabolic state in the medial prefrontal cortex area. In the hippocampus, an increase of NE and a decrease of DA were observed in PERM treated rats as compared to controls. The concentration of the most representative marker for pyrethroid exposure (3-phenoxybenzoic acid) measured in the urine of rodents 12 h after the last treatment was 41.50 µ/L and it was completely eliminated after 96 h.

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Relatório do Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia de Electrónica e Telecomunicações

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The use of multicores is becoming widespread inthe field of embedded systems, many of which have real-time requirements. Hence, ensuring that real-time applications meet their timing constraints is a pre-requisite before deploying them on these systems. This necessitates the consideration of the impact of the contention due to shared lowlevel hardware resources like the front-side bus (FSB) on the Worst-CaseExecution Time (WCET) of the tasks. Towards this aim, this paper proposes a method to determine an upper bound on the number of bus requests that tasks executing on a core can generate in a given time interval. We show that our method yields tighter upper bounds in comparison with the state of-the-art. We then apply our method to compute the extra contention delay incurred by tasks, when they are co-scheduled on different cores and access the shared main memory, using a shared bus, access to which is granted using a round-robin arbitration (RR) protocol.

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Contention on the memory bus in COTS based multicore systems is becoming a major determining factor of the execution time of a task. Analyzing this extra execution time is non-trivial because (i) bus arbitration protocols in such systems are often undocumented and (ii) the times when the memory bus is requested to be used are not explicitly controlled by the operating system scheduler; they are instead a result of cache misses. We present a method for finding an upper bound on the extra execution time of a task due to contention on the memory bus in COTS based multicore systems. This method makes no assumptions on the bus arbitration protocol (other than assuming that it is work-conserving).

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Dissertação para obtenção do grau de Mestre em Engenharia de Eletrónica e Computadores

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Mestrado em Engenharia Informática, Área de Especialização em Tecnologias do Conhecimento e da Decisão

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The last decade has witnessed a major shift towards the deployment of embedded applications on multi-core platforms. However, real-time applications have not been able to fully benefit from this transition, as the computational gains offered by multi-cores are often offset by performance degradation due to shared resources, such as main memory. To efficiently use multi-core platforms for real-time systems, it is hence essential to tightly bound the interference when accessing shared resources. Although there has been much recent work in this area, a remaining key problem is to address the diversity of memory arbiters in the analysis to make it applicable to a wide range of systems. This work handles diverse arbiters by proposing a general framework to compute the maximum interference caused by the shared memory bus and its impact on the execution time of the tasks running on the cores, considering different bus arbiters. Our novel approach clearly demarcates the arbiter-dependent and independent stages in the analysis of these upper bounds. The arbiter-dependent phase takes the arbiter and the task memory-traffic pattern as inputs and produces a model of the availability of the bus to a given task. Then, based on the availability of the bus, the arbiter-independent phase determines the worst-case request-release scenario that maximizes the interference experienced by the tasks due to the contention for the bus. We show that the framework addresses the diversity problem by applying it to a memory bus shared by a fixed-priority arbiter, a time-division multiplexing (TDM) arbiter, and an unspecified work-conserving arbiter using applications from the MediaBench test suite. We also experimentally evaluate the quality of the analysis by comparison with a state-of-the-art TDM analysis approach and consistently showing a considerable reduction in maximum interference.

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This paper analyzes several natural and man-made complex phenomena in the perspective of dynamical systems. Such phenomena are often characterized by the absence of a characteristic length-scale, long range correlations and persistent memory, which are features also associated to fractional order systems. For each system, the output, interpreted as a manifestation of the system dynamics, is analyzed by means of the Fourier transform. The amplitude spectrum is approximated by a power law function and the parameters are interpreted as an underlying signature of the system dynamics. The complex systems under analysis are then compared in a global perspective in order to unveil and visualize hidden relationships among them.