Characterization of the physicochemical, antimicrobial, and drug release properties of thermoresponsive hydrogel copolymers designed for medical device applications

In this study, a series of hydrogels was synthesized by free radical polymerization, namely poly(2-(hydroxyethyl) methacrylate) (pHEMA), poly(4-(hydroxybutyl)methacrylate) (pHBMA), poly(6-(hydroxyhexyl)methacrylate) (pHHMA), and copolymers composed of N-isopropylacrylamide (NIPAA), methacrylic acid (MA), NIPAA, and the above monomers. The surface, mechanical, and swelling properties (at 20 and 37 degrees C, pH 6) of the polymers were determined using dynamic contact angle analysis, tensile analysis, and thermogravimetry, respectively. The T-g and lower critical solution temperatures (LCST) were determined using modulated DSC and oscillatory rheometry, respectively. Drug loading of the hydrogels with chlorhexidine diacetate was performed by immersion in a drug solution at 20 degrees C (

6-T SRAM cell design with nanoscale double-gate SOI MOSFETs: impact of source/drain engineering and circuit topology

The impact of source/drain engineering on the performance of a six-transistor (6-T) static random access memory (SRAM) cell, based on 22 nm double-gate (DG) SOI MOSFETs, has been analyzed using mixed-mode simulation, for three different circuit topologies for low voltage operation. The trade-offs associated with the various conflicting requirements relating to read/write/standby operations have been evaluated comprehensively in terms of eight performance metrics, namely retention noise margin, static noise margin, static voltage/current noise margin, write-ability current, write trip voltage/current and leakage current. Optimal design parameters with gate-underlap architecture have been identified to enhance the overall SRAM performance, and the influence of parasitic source/drain resistance and supply voltage scaling has been investigated. A gate-underlap device designed with a spacer-to-straggle (s/sigma) ratio in the range 2-3 yields improved SRAM performance metrics, regardless of circuit topology. An optimal two word-line double-gate SOI 6-T SRAM cell design exhibits a high SNM similar to 162 mV, I-wr similar to 35 mu A and low I-leak similar to 70 pA at V-DD = 0.6 V, while maintaining SNM similar to 30% V-DD over the supply voltage (V-DD) range of 0.4-0.9 V.