The Polish Competition Authority Submits a Draft Amendment to the Polish Competition Act: Revolution or Fine-Tuning?

This piece highlights and offers a brief analysis of the most important of the
proposed changes to Polish competition law. The draft proposal envisages introduction of, inter alia, financial penalties for individuals, two-stage merger review process, important changes to the leniency program (including introduction of leniency plus), as well as such new tools as remedies and settlements.

Electrical characterisation of liquid crystals at millimetre wavelengths using frequency selective surfaces

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The accurate measurement of the permittivity, loss tangent and dielectric anisotropy DC bias dependence for two different liquid crystal (LC) materials in the frequency range 140-165 GHz is described. The electrical characteristics are obtained by curve fitting computed transmission coefficients to the experimental spectral response of a new class of electronically reconfigurable frequency selective surface. The periodic structure is designed to yield bandpass filter characteristics with and without an applied bias control voltage in order to measure the tunability of the LC material which is inserted in a 705 µm-thick cavity.

SiGe V Band Wide Tuning-Range VCO and Frequency Divider for Phase Locked Loop

A V-band wide tuning-range VCO and high frequency divide-by-8 frequency divider using Infineon 0.35 µm SiGe HBT process are presented in this paper. An LC impedance peaking technique is introduced in the Miller divider to increase the sensitivity and operation frequency range of the frequency divider. Two static frequency dividers implemented using current mode logic are used to realize dividing by 4 in the circuit. The wide tuning range VCO operates from 51.9 to 64.1 GHz i.e. 20.3% frequency tuning range. The measured phase noise at the frequency divider output stage is around -98.5 dBc at 1 MHz. The circuit consumes 200mW and operates from a 3.5Vdc supply, and occupies 0.6×0.8 mm2 die area.

SMART Arm with outcome-triggered electrical stimulation:a pilot randomized clinical trial

The SMART (SensoriMotor Active Rehabilitation Training) Arm is a nonrobotic device designed to allow stroke survivors with severe paresis to practice reaching. It can be used with or without outcome-triggered electrical stimulation (OT-stim) to augment movement. The aim of this study was to evaluate the efficacy of SMART Arm training when used with or without OT-stim, in addition to usual care, as compared with usual care alone during inpatient rehabilitation.

Synchronized phasor measurement on the All-Ireland electrical network

Variations in the phase angle difference between a remote 11kV connected wind farm and the centre of Belfast during a typical working day are investigated in the paper. The results obtained using phasor measurement units (PMUs) are compared with the data generated using a PSS/E simulator configured to model the N.Ireland network. The study investigates the effect of changes in the load demand and the wind farm output power on the phase angles at various locations on the network. The paper finally describes how a major system disturbance on the All-Ireland network was monitored and analysed using PMUs located at Queen's University, Belfast and University College Dublin. ©2007 IEEE.

Tuning non-Markovianity by spin-dynamics control

We study the interplay between forgetful and memory-keeping evolution enforced on a two-level system by a multi-spin environment whose elements are coupled to local bosonic baths. Contrarily to the expectation that any non-Markovian effect would be buried by the forgetful mechanism induced by the spin-bath coupling, one can actually induce a full Markovian-to-non-Markovian transition of the two-level system's dynamics, controllable by parameters such as the mismatch between the energy of the two-level system and of the spin environment. For a symmetric coupling, the amount of non-Markovianity surprisingly grows with the number of decoherence channels. DOI: 10.1103/PhysRevA.87.022317

Characterization of physio-chemical processes and hydration kinetics in concretes containing supplementary cementitious materials using electrical property measurements

The current study monitors both the short- and long-term hydration characteristics of concrete using discretized conductivity measurements from initial gauging, through setting and hardening, the latter comprising both the curing and post-curing periods. In particular, attention is directed to the near-surface concrete as it is this zone which protects the steel from the external environment and has a major influence on durability, performance and service-life. A wide range of concrete mixes is studied comprising both plain Portland cement concretes and concretes containing fly-ash and ground granulated blast furnace slag. The parameter normalised conductivity was used to identify four distinct stages in the hydration process and highlight the influence of supplementary cementitious materials (SCM) on hydration and hydration kinetics. A relationship has been presented to account for the temporal decrease in conductivity, post 10-days hydration. The testing procedure and methodology presented lend itself to in-situ monitoring of reinforced concrete structures. (c) 2013 Elsevier Ltd. All rights reserved.

Electrical conductivity and glass formation in nitrile-functionalized pyrrolidinium bis(trifluoromethylsulfonyl)imide ionic liquids: chain length and odd–even effects of the alkyl spacer between the pyrrolidinium ring and the nitrile group

The electrical conductivity of a series of pyrrolidinium bis(trifluoromethylsulfonyl)imide ionic liquids, functionalized with a nitrile (cyano) group at the end of an alkyl chain attached to the cation, was studied in the temperature range between 173 K and 393 K. The glass formation of the ionic liquids is influenced by the length of the alkyl spacer separating the nitrile function from the pyrrolidinium ring. The electrical conductivity and the viscosity do not show a monotonic dependence on the alkyl spacer length, but rather an odd-even effect. An explanation for this behavior is given, including the potential energy landscape picture for the glass transition.

Stability of 71 degrees stripe domains in epitaxial BiFeO3 films upon repeated electrical switching

The 71 degrees stripe domain patterns of epitaxial BiFeO3 thin films are frequently being explored to achieve new functional properties, dissimilar from the BiFeO3 bulk properties. We show that in-plane switching and out-of-plane switching of these domains behave very differently. In the in-plane configuration the domains are very stable, whereas in the out-of-plane configuration the domains change their size and patterns, depending on the applied switching voltage frequency.

System level DSP synthesis using voltage overscaling, unequal error protection & adaptive quality tuning

In this paper, we propose a system level design approach considering voltage over-scaling (VOS) that achieves error resiliency using unequal error protection of different computation elements, while incurring minor quality degradation. Depending on user specifications and severity of process variations/channel noise, the degree of VOS in each block of the system is adaptively tuned to ensure minimum system power while providing "just-the-right" amount of quality and robustness. This is achieved, by taking into consideration system level interactions and ensuring that under any change of operating conditions only the "lesscrucial" computations, that contribute less to block/system output quality, are affected. The design methodology applied to a DCT/IDCT system shows large power benefits (up to 69%) at reasonable image quality while tolerating errors induced by varying operating conditions (VOS, process variations, channel noise). Interestingly, the proposed IDCT scheme conceals channel noise at scaled voltages. ©2009 IEEE.

Significance Driven Computation: A Voltage-Scalable, Variation-Aware, Quality-Tuning Motion Estimator

In this paper we present a design methodology for algorithm/architecture co-design of a voltage-scalable, process variation aware motion estimator based on significance driven computation. The fundamental premise of our approach lies in the fact that all computations are not equally significant in shaping the output response of video systems. We use a statistical technique to intelligently identify these significant/not-so-significant computations at the algorithmic level and subsequently change the underlying architecture such that the significant computations are computed in an error free manner under voltage over-scaling. Furthermore, our design includes an adaptive quality compensation (AQC) block which "tunes" the algorithm and architecture depending on the magnitude of voltage over-scaling and severity of process variations. Simulation results show average power savings of similar to 33% for the proposed architecture when compared to conventional implementation in the 90 nm CMOS technology. The maximum output quality loss in terms of Peak Signal to Noise Ratio (PSNR) was similar to 1 dB without incurring any throughput penalty.

Shortening design time through multiplatform simulations with a portable OpenCL golden-model: the LDPC decoder case

Hardware designers and engineers typically need to explore a multi-parametric design space in order to find the best configuration for their designs using simulations that can take weeks to months to complete. For example, designers of special purpose chips need to explore parameters such as the optimal bitwidth and data representation. This is the case for the development of complex algorithms such as Low-Density Parity-Check (LDPC) decoders used in modern communication systems. Currently, high-performance computing offers a wide set of acceleration options, that range from multicore CPUs to graphics processing units (GPUs) and FPGAs. Depending on the simulation requirements, the ideal architecture to use can vary. In this paper we propose a new design flow based on OpenCL, a unified multiplatform programming model, which accelerates LDPC decoding simulations, thereby significantly reducing architectural exploration and design time. OpenCL-based parallel kernels are used without modifications or code tuning on multicore CPUs, GPUs and FPGAs. We use SOpenCL (Silicon to OpenCL), a tool that automatically converts OpenCL kernels to RTL for mapping the simulations into FPGAs. To the best of our knowledge, this is the first time that a single, unmodified OpenCL code is used to target those three different platforms. We show that, depending on the design parameters to be explored in the simulation, on the dimension and phase of the design, the GPU or the FPGA may suit different purposes more conveniently, providing different acceleration factors. For example, although simulations can typically execute more than 3x faster on FPGAs than on GPUs, the overhead of circuit synthesis often outweighs the benefits of FPGA-accelerated execution.