Performance and variability trade-off with gate-to-source/drain overlap length

The impact of gate-to-source/drain overlap length on performance and variability of 65 nm CMOS is presented. The device and circuit variability is investigated as a function of three significant process parameters, namely gate length, gate oxide thickness, and halo dose. The comparison is made with three different values of gate-to-source/drain overlap length namely 5 nm, 0 nm, and -5 nm and at two different leakage currents of 10 nA and 100 nA. The Worst-Case-Analysis approach is used to study the inverter delay fluctuations at the process corners. The drive current of the device for device robustness and stage delay of an inverter for circuit robustness are taken as performance metrics. The design trade-off between performance and variability is demonstrated both at the device level and circuit level. It is shown that larger overlap length leads to better performance, while smaller overlap length results in better variability. Performance trades with variability as overlap length is varied. An optimal value of overlap length of 0 nm is recommended at 65 nm gate length, for a reasonable combination of performance and variability.

Evaluation of mechanical losses in a linear motor pressure wave generator

A moving magnet linear motor compressor or pressure wave generator (PWG) of 2 cc swept volume with dual opposed piston configuration has been developed to operate miniature pulse tube coolers. Prelimnary experiments yielded only a no-load cold end temperature of 180 K. Auxiliary tests and the interpretation of detailed modeling of a PWG suggest that much of the PV power has been lost in the form of blow-by at piston seals due to large and non-optimum clearance seal gap between piston and cylinder. The results of experimental parameters simulated using Sage provide the optimum seal gap value for maximizing the delivered PV power.