Amorphous oxide semiconductor TFTs for displays and imaging

© 2013 IEEE. This paper reviews the mechanisms underlying visible light detection based on phototransistors fabricated using amorphous oxide semiconductor technology. Although this family of materials is perceived to be optically transparent, the presence of oxygen deficiency defects, such as vacancies, located at subgap states, and their ionization under illumination, gives rise to absorption of blue and green photons. At higher energies, we have the usual band-to-band absorption. In particular, the oxygen defects remain ionized even after illumination ceases, leading to persistent photoconductivity, which can limit the frame-rate of active matrix imaging arrays. However, the persistence in photoconductivity can be overcome through deployment of a gate pulsing scheme enabling realistic frame rates for advanced applications such as sensor-embedded display for touch-free interaction.

Top down scale-up of semiconducting nanostructures for large area electronics

In this paper, we present a study on electrical and optical characteristics of n-type tin-oxide nanowires integrated based on top-down scale-up strategy. Through a combination of contact printing and plasma based back-channel passivation, we have achieved stable electrical characteristics with standard deviation in mobility and threshold voltage of 9.1% and 25%, respectively, for a large area of 1× 1 cm2 area. Through use of contact printing, high alignment of nanowires was achieved thus minimizing the number of nanowire-nanowire junctions, which serve to limit carrier transport in the channel. In addition, persistent photoconductivity has been observed, which we attribute to oxygen vacancy ionization and subsequent elimination using a gate pulse driving scheme. © 2014 IEEE.

Study of high performance re-timing using a 40 Gb/s hybrid-integrated mach-zehnder all-optical regenerator

We experimentally show that a hybrid-integrated Mach-Zehnder switch with a high performance gate profile allows retiming of optical signals with an accuracy of 500-700fs even if the input timing jitter is increased to 3ps. © 2004 Optical Society of America.

Ni(Pt)-silicide contacts on CMOS devices: Impact of substrate nature and Pt concentration on the phase formation

Ni silicides used as contacts in source/drain and gate of advanced CMOS devices were analyzed by atom probe tomography (APT) at atomic scale. These measurements were performed on 45 nm nMOS after standard self-aligned silicide (salicide) process using Ni(5 at.% Pt) alloy. After the first annealing (RTA1), δ-Ni2Si was the only phase formed on gate and source/drain while, after the second annealing (RTA2), two different Ni silicides have been formed: NiSi on the gate and δ-Ni2Si on the source and drain. This difference between source/drain and gate regions in nMOS devices has been related to the Si substrate nature (poly or mono-crystalline) and to the size of the contact. In fact, NiSi seems to have difficulties to nucleate in the narrow source/drain contact on mono-crystalline Si. The results have been compared to analysis performed on 28 nm nMOS where the Pt concentration is higher (10 at.% Pt). In this case, θ-Ni2Si is the first phase to form after RTA1 and NiSi is then formed at the same time on source (or drain) and gate after RTA2. The absence of the formation of NiSi from δ-Ni 2Si/Si(1 0 0) interface compared to θ-Ni2Si/Si(1 0 0) interface could be related to the difference of the interface energies. The redistributions of As and Pt in different silicides and interfaces were measured and discussed. In particular, it has been evidenced that Pt redistributions obtained on both 45 and 28 nm MOS transistors correspond to respective Pt distributions measured on blanket wafers. © 2013 Elsevier B.V. All rights reserved.

Atom probe tomography for advanced metallization

In microelectronics, the increase in complexity and the reduction of devices dimensions make essential the development of new characterization tools and methodologies. Indeed advanced characterization methods with very high spatial resolution are needed to analyze the redistribution at the nanoscale in devices and interconnections. The atom probe tomography has become an essential analysis to study materials at the nanometer scale. This instrument is the only analytical microscope capable to produce 3D maps of the distribution of the chemical species with an atomic resolution inside a material. This technique has benefit from several instrumental improvements during last years. In particular, the use of laser for the analysis of semiconductors and insulating materials offers new perspectives for characterization. The capability of APT to map out elements at the atomic scale with high sensitivity in devices meets the characterization requirements of semiconductor devices such as the determination of elemental distributions for each device region. In this paper, several examples will show how APT can be used to characterize and understand materials and process for advanced metallization. The possibilities and performances of APT (chemical analysis of all the elements, atomic resolution, planes determination, crystallographic information...) will be described as well as some of its limitations (sample preparation, complex evaporation, detection limit, ...). The examples illustrate different aspect of metallization: dopant profiling and clustering, metallic impurities segregation on dislocation, silicide formation and alloying, high K/metal gate optimization, SiGe quantum dots, as well as analysis of transistors and nanowires. © 2013 Elsevier B.V. All rights reserved.

Dopant compensation in HfO2 and other high K oxides

The theory of doping limits in semiconductors and insulators is applied to the case of wide gap oxides, crystalline, or amorphous, and used to explain that impurities do not in general give rise to gap states or a doping response. Instead, the system tends to form defect complexes or undergo symmetry-lowering reconstructions to expel gap states out of the band gap. The model is applied to impurities, such as trivalent metals, carbon, N, P, and B, in HfO2, the main gate dielectric used in field effect transistors. © 2014 AIP Publishing LLC.

Fourier spectrum based extraction of an equivalent trap state density in indium gallium zinc oxide transistors

Segregating the dynamics of gate bias induced threshold voltage shift, and in particular, charge trapping in thin film transistors (TFTs) based on time constants provides insight into the different mechanisms underlying TFTs instability. In this Letter we develop a representation of the time constants and model the magnitude of charge trapped in the form of an equivalent density of created trap states. This representation is extracted from the Fourier spectrum of the dynamics of charge trapping. Using amorphous In-Ga-Zn-O TFTs as an example, the charge trapping was modeled within an energy range of ΔEt 0.3 eV and with a density of state distribution as Dt(Et-j)=Dt0exp(-ΔEt/ kT)with Dt0 = 5.02 × 1011 cm-2 eV-1. Such a model is useful for developing simulation tools for circuit design. © 2014 AIP Publishing LLC.

Compact Reconfigurable Binary-Decision-Diagram Logic Circuit on a GaAs Nanowire Network

We describe a reconfigurable binary-decision-diagram logic circuit based on Shannon's expansion of Boolean logic function and its graphical representation on a semiconductor nanowire network. The circuit is reconfigured by using programmable switches that electrically connect and disconnect a small number of branches. This circuit has a compact structure with a small number of devices compared with the conventional look-up table architecture. A variable Boolean logic circuit was fabricated on an etched GaAs nanowire network having hexagonal topology with Schottky wrap gates and SiN-based programmable switches, and its correct logic operation together with dynamic reconfiguration was demonstrated.

Rashba electron transport in one-dimensional quantum waveguides

The properties of Rashba wave function in the planar one-dimensional waveguide are studied, and the following results are obtained. Due to the Rashba effect, the plane waves of electron with the energy E divide into two kinds of waves with the wave vectors k(1)=k(0)+k(delta) and k(2)=k(0)-k(delta), where k(delta) is proportional to the Rashba coefficient, and their spin orientations are +pi/2 (spin up) and -pi/2 (spin down) with respect to the circuit, respectively. If there is gate or ferromagnetic contact in the circuit, the Rashba wave function becomes standing wave form exp(+/- ik(delta)l)sin[k(0)(l-L)], where L is the position coordinate of the gate or contact. Unlike the electron without considering the spin, the phase of the Rashba plane or standing wave function depends on the direction angle theta of the circuit. The travel velocity of the Rashba waves with the wave vector k(1) or k(2) are the same hk(0)/m*. The boundary conditions of the Rashba wave functions at the intersection of circuits are given from the continuity of wave functions and the conservation of current density. Using the boundary conditions of Rashba wave functions we study the transmission and reflection probabilities of Rashba electron moving in several structures, and find the interference effects of the two Rashba waves with different wave vectors caused by ferromagnetic contact or the gate. Lastly we derive the general theory of multiple branches structure. The theory can be used to design various spin polarized devices.

Tuning of the two electron states in quantum rings through the spin-orbit interaction

The effect of the Coulomb interaction on the energy spectrum and anisotropic distribution of two electron states in a quantum ring in the presence of Rashba spin-orbit interaction (RSOI) and Dresselhaus SOI (DSOI) is investigated in the presence of a perpendicular magnetic field. We find that the interplay between the RSOI and DSOI makes the single quantum ring behaves like a laterally coupled quantum dot and the interdot coupling can be tuned by changing the strengths of the SOIs. The interplay can lead to singlet-triplet state mixing and anticrossing behavior when the singlet and triplet states meet with increasing magnetic field. The two electron ground state displays a bar-bell-like spatial anisotropic distribution in a quantum ring at a specific crystallographic direction, i.e., [110] or [1 (1) over bar0], which can be switched by reversing the direction of the perpendicular electric field. The ground state exhibits a singlet-triplet state transition with increasing magnetic field and strengths of RSOI and DSOI. An anisotropic electron distribution is predicted which can be detected through the measurement of its optical properties.

Direct detection of the relative strength of Rashba and Dresselhaus spin-orbit interaction: Utilizing the SU(2) symmetry

We propose a simple method to detect the relative strength of Rashba and Dresselhaus spin-orbit interactions in quantum wells (QWs) without relying on the directional-dependent physical quantities. This method utilizes the two different critical gate voltages that leading to the remarkable signals of SU(2) symmetry, which happens to reflect the intrinsic-structure-inversion asymmetry of the QW. We support our proposal by the numerical calculation of in-plane relaxation times based on the self-consistent eight-band Kane model. We find that the two different critical gate voltages leading to the maximum spin-relaxation times [one effect of the SU(2) symmetry] can simply determine the ratio of the coefficients of Rashba and Dresselhaus terms. Our proposal can also be generalized to extract the relative strengths of the spin-orbit interactions in quantum-wire and quantum-dot structures.

Quantum tunneling through planar p-n junctions in HgTe quantum wells

We demonstrate that a p-n junction created electrically in HgTe quantum wells with inverted band structure exhibits interesting intraband and interband tunneling processes. We find a perfect intraband transmission for electrons injected perpendicularly to the interface of the p-n junction. The opacity and transparency of electrons through the p-n junction can be tuned by changing the incidence angle, the Fermi energy and the strength of the Rashba spin-orbit interaction (RSOI). The occurrence of a conductance plateau due to the formation of topological edge states in a quasi-one-dimensional (Q1D) p-n junction can be switched on and off by tuning the gate voltage. The spin orientation can be substantially rotated when the samples exhibit a moderately strong RSOI.

Growth and fabrication of AlGaN/GaN HEMT based on Si(111) substrates by MOCVD

AlGaN/GaN high electron mobility transistor (HEMT) hetero-structures were grown on the 2-in Si (1 1 1) substrate using metal-organic chemical vapor deposition (MOCVD). Low-temperature (LT) AlN layers were inserted to relieve the tension stress during the growth of GaN epilayers. The grown AlGaN/GaN HEMT samples exhibited a maximum crack-free area of 8 mm x 5 mm, XRD GaN (0 0 0 2) full-width at half-maximum (FWHM) of 661 arcsec and surface roughness of 0.377 nm. The device with a gate length of 1.4 mu m and a gate width of 60 mu m demonstrated maximum drain current density of 304 mA/mm, transconductance of 124 mS/mm and reverse gate leakage current of 0.76 mu A/mm at the gate voltage of -10 V. (C) 2008 Published by Elsevier Ltd.

A low-cost CMOS programmable temperature

A novel uncalibrated CMOS programmable temperature switch with high temperature accuracy is presented. Its threshold temperature T-th can be programmed by adjusting the ratios of width and length of the transistors. The operating principles of the temperature switch circuit is theoretically explained. A floating gate neural MOS circuit is designed to compensate automatically the threshold temperature T-th variation that results form the process tolerance. The switch circuit is implemented in a standard 0.35 mu m CMOS process. The temperature switch can be programmed to perform the switch operation at 16 different threshold temperature T(th)s from 45-120 degrees C with a 5 degrees C increment. The measurement shows a good consistency in the threshold temperatures. The chip core area is 0.04 mm(2) and power consumption is 3.1 mu A at 3.3V power supply. The advantages of the temperature switch are low power consumption, the programmable threshold temperature and the controllable hysteresis.

Multiple valley couplings in nanometer Si metal-oxide-semiconductor field-effect transistors

We investigate the couplings between different energy band valleys in a metal-oxide-semiconductor field-effect transistor (MOSFET) device using self-consistent calculations of million-atom Schrodinger-Poisson equations. Atomistic empirical pseudopotentials are used to describe the device Hamiltonian and the underlying bulk band structure. The MOSFET device is under nonequilibrium condition with a source-drain bias up to 2 V and a gate potential close to the threshold potential. We find that all the intervalley couplings are small, with the coupling constants less than 3 meV. As a result, the system eigenstates derived from different bulk valleys can be calculated separately. This will significantly reduce the simulation time because the diagonalization of the Hamiltonian matrix scales as the third power of the total number of basis functions. (C) 2008 American Institute of Physics.