Investigation of organic xenobiotic transfers, partitioning and processing in air-soil-plant systems using a microcosm apparatus. Part II:comparing the fate of chlorobenzenes in grass planted soil

A microcosm system was used to investigate and compare transfers of 14C labeled-1,2-dichlorobenzene (DCB), 1,2,4-trichlorobenzene (TCB) and hexachlorobenzene (HCB) in an air-soil-plant system using single grass tillers planted into spiked soil. This study was the second phase of a development investigation for eventual study of a range of xenobiotic pollutants. Recoveries from the system were excellent at >90%. The predominant loss pathway for 14C labeled-1,2-DCB and 1,2,4-TCB was volatilisation with 85% and 76% volatilisation of parent compound and volatile metabolites over 5 weeks respectively. Most of the added label in the hexachlorobenzene spiked system remained in soil. Mineralisation was

IMPLEMENTATION OF SIGNAL PROCESSING FUNCTIONS USING 1-BIT SYSTOLIC ARRAYS.

The use of systolic arrays of 1-bit cells to implement a range of important signal processing functions is demonstrated. Two examples, a pipelined multiplier and a pipelined bit-slice transform circuit, are given. This approach has many important implications for silicon technology, and these are outlined.

DESIGNING VLSI SIGNAL PROCESSING CHIPS USING DATA DEPENDENCE GRAPHS.

The highly structured nature of many digital signal processing operations allows these to be directly implemented as regular VLSI circuits. This feature has been successfully exploited in the design of a number of commercial chips, some examples of which are described. While many of the architectures on which such chips are based were originally derived on heuristic basis, there is an increasing interest in the development of systematic design techniques for the direct mapping of computations onto regular VLSI arrays. The purpose of this paper is to show how the the technique proposed by Kung can be readily extended to the design of VLSI signal processing chips where the organisation of computations at the level of individual data bits is of paramount importance. The technique in question allows architectures to be derived using the projection and retiming of data dependence graphs.

BIT-LEVEL SYSTOLIC ARRAYS FOR SIGNAL AND IMAGE PROCESSING.

This paper describes the design and the architecture of a bit-level systolic array processor. The bit-level systolic array described is directly applicable to a wide range of image processing operations where high performance and throughput are essential. The architecture is illustrated by describing the operation of the correlator and convolver chips which are being developed. The advantage of the system is also discussed.

Architectural synthesis of an image processing algorithm using IRIS

Details are presented of the IRIS synthesis system for high-performance digital signal processing. This tool allows non-specialists to automatically derive VLSI circuit architectures from high-level, algorithmic representations, and provides a quick route to silicon implementation. The applicability of the system is demonstrated using the design example of a one-dimensional Discrete Cosine Transform circuit.

Programmable image processing chip

A new high performance, programmable image processing chip targeted at video and HDTV applications is described. This was initially developed for image small object recognition but has much broader functional application including 1D and 2D FIR filtering as well as neural network computation. The core of the circuit is made up of an array of twenty one multiplication-accumulation cells based on systolic architecture. Devices can be cascaded to increase the order of the filter both vertically and horizontally. The chip has been fabricated in a 0.6 µ, low power CMOS technology and operates on 10 bit input data at over 54 Megasamples per second. The introduction gives some background to the chip design and highlights that there are few other comparable devices. Section 2 gives a brief introduction to small object detection. The chip architecture and the chip design will be described in detail in the later sections.

Living is Information Processing: From Molecules to Global Systems

We extend the concept that life is an informational phenomenon, at every level of organisation, from molecules to the global ecological system. According to this thesis: (a) living is information processing, in which memory is maintained by both molecular states and ecological states as well as the more obvious nucleic acid coding; (b) this information processing has one overall function-to perpetuate itself; and (c) the processing method is filtration (cognition) of, and synthesis of, information at lower levels to appear at higher levels in complex systems (emergence). We show how information patterns, are united by the creation of mutual context, generating persistent consequences, to result in 'functional information'. This constructive process forms arbitrarily large complexes of information, the combined effects of which include the functions of life. Molecules and simple organisms have already been measured in terms of functional information content; we show how quantification may be extended to each level of organisation up to the ecological. In terms of a computer analogy, life is both the data and the program and its biochemical structure is the way the information is embodied. This idea supports the seamless integration of life at all scales with the physical universe. The innovation reported here is essentially to integrate these ideas, basing information on the 'general definition' of information, rather than simply the statistics of information, thereby explaining how functional information operates throughout life. © 2013 Springer Science+Business Media Dordrecht.

Catalytic conversion of sodium lignosulphonate to vanillin –engineering aspects. Part 1 Effect of processing conditionson vanillin yield and selectivity

The commercial production of vanillin from sodium lignosulfonate under highly alkaline conditions, catalyzed by Cu2+ at elevated temperature and pressures up to 10 bar, has been simulated in a 3-L stirred reactor. Initially, the process was operated in the presence of nitrogen in dead-end mode, and it was shown that vanillin and vanillic acid were formed by hydrolysis at temperatures of 120, 140, and 160 °C. At the two higher temperatures, the amount of vanillin produced was the same. Subsequently, experiments were conducted at the same elevated pressures and temperatures with addition of air or oxygen-enriched air once the temperature in the reactor had reached temperatures similar to those used when only hydrolysis occurred. In this case, the concentration of vanillin at 140 and 160 °C was equal to that due to hydrolysis, and the subsequent 2-fold increase was due to oxidation. In addition, both vanillic acid and acetovanillone (which has rarely been reported) were produced, as was hydrogen. Thus, for the first time, it has been shown that the production of vanillin (and other compounds) from sodium lignosulfonate at elevated temperatures involves hydrolysis and oxidation, with hydrolysis starting at just above 100 °C, that is, much lower than has previously been reported. Approximately 50% is produced by each mechanism. In addition, the orders of the reactions of the different steps were estimated, and the reaction mechanisms are discussed.