Architectural synthesis of an image processing algorithm using IRIS
| Data(s) |
01/01/1995
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|---|---|
| Resumo |
Details are presented of the IRIS synthesis system for high-performance digital signal processing. This tool allows non-specialists to automatically derive VLSI circuit architectures from high-level, algorithmic representations, and provides a quick route to silicon implementation. The applicability of the system is demonstrated using the design example of a one-dimensional Discrete Cosine Transform circuit. |
| Identificador | |
| Idioma(s) |
eng |
| Direitos |
info:eu-repo/semantics/restrictedAccess |
| Fonte |
Trainor , D W , Woods , R F & McCanny , J V 1995 , Architectural synthesis of an image processing algorithm using IRIS . in IEEE VLSI Signal Processing VIII, IEEE Signal Processing Soc. ed. T Nishitani, K Pahri . pp. 167-176 . |
| Tipo |
contributionToPeriodical |
