987 resultados para 090604 Microelectronics and Integrated Circuits


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This study aimed to evaluate laser fluorescence (LF) for monitoring the initial stage of subsurface de- and remineralization (<150 mu m depth). Ninety-six sound blocks of bovine enamel, selected according to surface hardness (SH) and LF were used in two experimental studies, in vitro and in situ. In vitro, blocks were exposed to a demineralizing solution, then remineralized by pH cycling for 6 days. In situ, 10 volunteers wore acrylic palatal appliances, each containing 4 dental enamel blocks that were demineralized for 14 days by exposure to 20% sucrose solution. Following this treatment, blocks were submitted to remineralization for 1 week with fluoride dentifrice (1,100 mu g F/g). In both experiments, SH and LH were measured after demineralization and after remineralization. Further, enamel blocks were selected after the demineralization/remineralization steps for measurement of cross-sectional hardness and integrated loss of subsurface hardness (Delta KHN). SH and Delta KHN showed significant differences among the phases in each study. LF values for sound, demineralized and remineralized enamel were: 5.2 +/- 1.1, 8.1 +/- 1.2 and 5.6 +/- 0.8, respectively, in the in vitro study, and 5.3 +/- 0.3, 16.5 +/- 4.7 and 6.5 +/- 2.5, respectively, in the in situ study, values for demineralized enamel being significantly higher than for sound and remineralized enamel in both studies. However, LF was correlated with Delta KHN only in situ. LF was capable of monitoring de- and remineralization in early lesions in situ, when bacteria are presumably present in the caries lesion body, but is not correlated with mineral changes in bacteria-free systems. Copyright (C) 2009 S. Karger AG, Basel

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Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

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Running exercises are frequently related to muscular injuries, which may be a result of muscular imbalance. The present study aimed to verify the effects of heavy-intensity continuous running exercise on the functional and conventional hamstrings: quadriceps ratios, and also in the knee flexors and extensors EMG activity in active non-athletic individuals. Sixteen active males performed maximal isokinetic concentric and eccentric knee flexions and extensions at 60 degrees s(-1) and 180 degrees s(-1). In another session, the same procedure was conducted after a continuous running exercise at 95% onset of blood lactate accumulation. Torque and electromyographic ratios were calculated from peak torque and integrated electromyographic activity (knee flexor and extensors). Creatine kinase was measured before and 24 h after running exercise. Eccentric torque (knee flexion and extension) decreased significantly after running only at 180 degrees s(-1) (p < 0.05). No differences were found for the conventional torque ratios (p > 0.05), however, the functional torque ratios at 180 degrees s(-1) decreased significantly after running (p < 0.05). No effects on the electromyographic activity and electronnyographic ratios were found (p > 0.05). Creatine kinase increased slightly 24 h after running (p < 0.05). Heavy-intensity continuous running exercise decreased knee flexor and extensor eccentric torque, and functional torque ratios under fast velocities (180 degrees s(-1)), probably as result of peripheral fatigue. (C) 2008 Elsevier Ltd. All rights reserved.

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Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

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This paper provides an insight to the trade-off between settling time and power consumption in regulated current mirrors as building parts in micropower current-switching D/A converters. The regulation-loop frequency characteristic is obtained and difficulties to impose a dominant-pole condition to the resulting 2nd-order system are evaluated. Raising pole frequencies in micropower circuits, while meeting consumption requirements, is basically limited by parasitic capacitances. For such cases, an alternative is to impose a twin-pole condition in which design constraints are somewhat relieved and settling slightly improved. Relationships between pole frequencies, transistor geometry and bias are established and design guidelines for regulated current mirrors founded. By placing loop-transistors in either weak or strong inversion, small (W/L) ratios are allowed and stray capacitances reduced. Simulated waveforms suggest a good agreement with theory. The proposed approach applied to the design of a micropower current-mode D/A converter improves both simulated and experimental settling performance.

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A CMOS low-voltage, wide-swing continuous-time current amplifier is presented. Exhibiting an open-loop architecture, the circuit is composed of transresistance and transconductance stages built upon triode-operating transistors. In addition to an extended dynamic range, the current gain can be programmed within good accuracy by a rapport involving only transistor geometries and tuning biases. Low temperature-drift on gain setting is then expected.In accordance with a 0.35 mum n-well CMOS fabrication process and a single 1.1 V-supply, a balanced current-amplifier is designed for a programmable gain-range of 6 - 34 dB and optimized with respect to dynamic range. Simulated results from PSPICE and Bsim3v3 models indicate, for a 100 muA(pp)-output current, a THD of 0.96 and 1.87% at 1 KHz and 100 KHz, respectively. Input noise is 120 pArootHz @ 10 Hz, with S/N = 63.2 dB @ 1%-THD. At maximum gain, total quiescent consumption is 334 muW. Measurements from a prototyped amplifier reveal a gain-interval of 4.8-33.1 dB and a maximum current swing of 120 muA(pp). The current-amplifier bandwidth is above 1 MHz.

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In this article, it is represented by state variables phase a transmission line which parameters are considered frequency independently and frequency dependent. It is analyzed what is the reasonable number of pi circuits and the number of blocks composed by parallel resistor and inductor in parallel for reduction of numerical oscillations. It is simulated the numerical routine with and without the effect of frequency in the longitudinal parameters. Initially, it is used state variables and pi circuits representing the transmission line composing a linear system which is solved by numerical routines based on the trapezoidal rule. The effect of frequency on the line is synthesized by resistors and inductors in parallel and this representation is analyzed in details. It is described transmission lines and the frequency influence in these lines through the state variables.

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Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

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A linearly-tunable ULV transconductor featuring excellent stability of the processed signal common-mode voltage upon tuning, critical for very-low voltage applications, is presented. Its employment to the synthesis of CMOS gm-C high-frequency and voiceband filters is discussed. SPICE data describe the filter characteristics. For a 1.3 V-supply, their nominal passband frequencies are 1.0 MHz and 3.78 KHz, respectively, with tuning rates of 12.52 KHz/mV and 0.16 KHz/m V, input-referred noise spectral density of 1.3 μV/Hz1/2 and 5.0μV/Hz1/2 and standby consumption of 0.87 mW and 11.8 μW. Large-signal distortion given by THD = 1% corresponds to a differential output-swing of 360 mVpp and 480 mVpp, respectively. Common-mode voltage deviation is less than 4 mV over tuning interval.

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This paper presents a high speed current mode CMOS comparator. The comparator was optimized for allows wide range input current 1mA, ±0.5uA resolution and has fast response. This circuit was implemented with 0.8μm CMOS n-well process with area of 120μm × 105μm and operates with 3.3V(±1.65V).

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A CMOS memory-cell for dynamic storage of analog data and suitable for LVLP applications is proposed. Information is memorized as the gate-voltage of input-transistor of a gain-boosting triode-transconductor. The enhanced output-resistance improves accuracy on reading out the sampled currents. Additionally, a four-quadrant multiplication between the input to regulation-amplifier of the transconductor and the stored voltage is provided. Designing complies with a low-voltage 1.2μm N-well CMOS fabrication process. For a 1.3V-supply, CCELL=3.6pF and sampling interval is 0.25μA≤ ISAMPLE ≤ 0.75μA. The specified retention time is 1.28ms and corresponds to a charge-variation of 1% due to junction leakage @75°C. A range of MR simulations confirm circuit performance. Absolute read-out error is below O.40% while the four-quadrant multiplier nonlinearity, at full-scale is 8.2%. Maximum stand-by consumption is 3.6μW/cell.

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A new topology for a LVLP variable-gain CMOS amplifier is presented. Input- and load-stage are built around triode-transconductors so that voltage-gain is fully defined by a linear relationship involving only device-geometries and biases. Excellent gain-accuracy, temperature-insensitivity; and wide range of programmability, are thus achieved. Moreover, adaptative biasing improves the common-mode voltage stability upon gain-adjusting. As an example, a 0-40dB programmablegain audio-amplifier is designed. Its performance is supported by a range of simulations. For VDD=1.8V and 20dB-nominal gain, one has Av=19.97dB, f3db=770KHz and quiescent dissipation of 378μW. Over temperatures from -25°C to 125°C, the 0. ldB-bandwidth is 52KHz. Dynamic-range is optimized to 57.2dB and 42.6dB for gains of 20dB and 40dB, respectively. THD figures correspond to -60.6dB@Vout= 1Vpp and -79.7dB@Vout= 0.5 Vpp. A nearly constant bandwidth for different gains is also attained.

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A low-voltage, low-power four-quadrant analog multiplier with optimized current-efficiency is presented. Its core corresponds to a pseudodifferential cascode, gain-boosting triode-transconductor. According to a low-voltage 1.2μm CMOS n-well process, operand differential-amplitudes are 1.0Vpp and 0.32Vpp for a 1.3V-supply. Common-mode voltages are properly chosen to maximize current-efficiency to 58%. Total quiescent dissipation is 260μW. A range of PSPICE simulation supports theoretical analysis. Excellent linearity is observed on dc characteristic. Assuming a ±0.5% mismatch on (W/L) and VTH THD at full-scale is 0.93% and 1.42%, for output frequencies of 1MHz and 10MHz, respectively.

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This paper describes a analog implementation of radial basis neural networks (RBNN) in BiCMOS technology. The RBNN uses a gaussian function obtained through the characteristic of the bipolar differential pair. The gaussian parameters (gain, center and width) is changed with programmable current source. Results obtained with PSPICE software is showed.

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A low-voltage, low-power OTA-C sinusoidal oscillator based on a triode-MOSFET transconductor is here discussed. The classical quadrature model is employed and the transconductor inherent nonlinear characteristic with input voltage is used as the amplitude-stabilization element. An external bias VTUNE linearly adjusts the oscillation frequency. According to a standard 0.8μm CMOS n-well process, a prototype was integrated, with an effective area of 0.28mm2. Experimental data validate the theoretical analysis. For a single 1.8V-supply and 100mV≤VTUNE≤250mV, the oscillation frequency fo ranges from 0.50MHz to 1.125MHz, with a nearly constant gain KVCO=4.16KHz/mV. Maximum output amplitude is 374mVpp @1.12MHz. THD is -41dB @321mVpp. Maximum average consumption is 355μW.