Calibrated Polarisation Tilt Angle Recovery for Wireless Communications

In this paper, we show how the polarisation state of a linearly polarised antenna can be recovered through the use of a three-term error correction model. The approach adopted is shown to be robust in situations where some multipath exists and where the sampling channels are imperfect with regard to both their amplitude and phase tracking. In particular, it has been shown that error of the measured polarisation tilt angle can be improved from 33% to 3% and below by applying the proposed calibration method. It is described how one can use a rotating dipole antenna as both the calibration standard and as the polarisation encoder, thus simplifying the physical arrangement of the transmitter. Experimental results are provided in order to show the utility of the approach, which could have a variety of applications including bandwidth conservative polarisation sub-modulation in advanced wireless communications systems.

Spectral Signature Secured Retrodirective Array

A novel retrodirective array (RDA) architecture is proposed which utilises a special case spectral signature embedded within the data payload as pilot signals. With the help of a pair of phase-locked-loop (PLL) based phase conjugators (PCs) the RDA’s response to other unwanted and/or unfriendly interrogating signals can be disabled, leading to enhanced secrecy performance directly in the wireless physical layer. The effectiveness of the proposed RDA system is experimentally demonstrated.

FPGA-based architecture for hyperspectral endmember extraction

Hyperspectral instruments have been incorporated in satellite missions, providing data of high spectral resolution of the Earth. This data can be used in remote sensing applications, such as, target detection, hazard prevention, and monitoring oil spills, among others. In most of these applications, one of the requirements of paramount importance is the ability to give real-time or near real-time response. Recently, onboard processing systems have emerged, in order to overcome the huge amount of data to transfer from the satellite to the ground station, and thus, avoiding delays between hyperspectral image acquisition and its interpretation. For this purpose, compact reconfigurable hardware modules, such as field programmable gate arrays (FPGAs) are widely used. This paper proposes a parallel FPGA-based architecture for endmember’s signature extraction. This method based on the Vertex Component Analysis (VCA) has several advantages, namely it is unsupervised, fully automatic, and it works without dimensionality reduction (DR) pre-processing step. The architecture has been designed for a low cost Xilinx Zynq board with a Zynq-7020 SoC FPGA based on the Artix-7 FPGA programmable logic and tested using real hyperspectral data sets collected by the NASA’s Airborne Visible Infra-Red Imaging Spectrometer (AVIRIS) over the Cuprite mining district in Nevada. Experimental results indicate that the proposed implementation can achieve real-time processing, while maintaining the methods accuracy, which indicate the potential of the proposed platform to implement high-performance, low cost embedded systems, opening new perspectives for onboard hyperspectral image processing.

Security through Obscurity: Layout Obfuscation of Digital Integrated Circuits using Don't Care Conditions

Contemporary integrated circuits are designed and manufactured in a globalized environment leading to concerns of piracy, overproduction and counterfeiting. One class of techniques to combat these threats is circuit obfuscation which seeks to modify the gate-level (or structural) description of a circuit without affecting its functionality in order to increase the complexity and cost of reverse engineering. Most of the existing circuit obfuscation methods are based on the insertion of additional logic (called “key gates”) or camouflaging existing gates in order to make it difficult for a malicious user to get the complete layout information without extensive computations to determine key-gate values. However, when the netlist or the circuit layout, although camouflaged, is available to the attacker, he/she can use advanced logic analysis and circuit simulation tools and Boolean SAT solvers to reveal the unknown gate-level information without exhaustively trying all the input vectors, thus bringing down the complexity of reverse engineering. To counter this problem, some ‘provably secure’ logic encryption algorithms that emphasize methodical selection of camouflaged gates have been proposed previously in literature [1,2,3]. The contribution of this paper is the creation and simulation of a new layout obfuscation method that uses don't care conditions. We also present proof-of-concept of a new functional or logic obfuscation technique that not only conceals, but modifies the circuit functionality in addition to the gate-level description, and can be implemented automatically during the design process. Our layout obfuscation technique utilizes don’t care conditions (namely, Observability and Satisfiability Don’t Cares) inherent in the circuit to camouflage selected gates and modify sub-circuit functionality while meeting the overall circuit specification. Here, camouflaging or obfuscating a gate means replacing the candidate gate by a 4X1 Multiplexer which can be configured to perform all possible 2-input/ 1-output functions as proposed by Bao et al. [4]. It is important to emphasize that our approach not only obfuscates but alters sub-circuit level functionality in an attempt to make IP piracy difficult. The choice of gates to obfuscate determines the effort required to reverse engineer or brute force the design. As such, we propose a method of camouflaged gate selection based on the intersection of output logic cones. By choosing these candidate gates methodically, the complexity of reverse engineering can be made exponential, thus making it computationally very expensive to determine the true circuit functionality. We propose several heuristic algorithms to maximize the RE complexity based on don’t care based obfuscation and methodical gate selection. Thus, the goal of protecting the design IP from malicious end-users is achieved. It also makes it significantly harder for rogue elements in the supply chain to use, copy or replicate the same design with a different logic. We analyze the reverse engineering complexity by applying our obfuscation algorithm on ISCAS-85 benchmarks. Our experimental results indicate that significant reverse engineering complexity can be achieved at minimal design overhead (average area overhead for the proposed layout obfuscation methods is 5.51% and average delay overhead is about 7.732%). We discuss the strengths and limitations of our approach and suggest directions that may lead to improved logic encryption algorithms in the future. References: [1] R. Chakraborty and S. Bhunia, “HARPOON: An Obfuscation-Based SoC Design Methodology for Hardware Protection,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 28, no. 10, pp. 1493–1502, 2009. [2] J. A. Roy, F. Koushanfar, and I. L. Markov, “EPIC: Ending Piracy of Integrated Circuits,” in 2008 Design, Automation and Test in Europe, 2008, pp. 1069–1074. [3] J. Rajendran, M. Sam, O. Sinanoglu, and R. Karri, “Security Analysis of Integrated Circuit Camouflaging,” ACM Conference on Computer Communications and Security, 2013. [4] Bao Liu, Wang, B., "Embedded reconfigurable logic for ASIC design obfuscation against supply chain attacks,"Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014 , vol., no., pp.1,6, 24-28 March 2014.

The Askaryan radio array

The Askar'yan Radio Array (ARA), a neutrino detector to be situated at the South Pole next to the IceCube detector, will be sensitive to ultrahigh-energy cosmic neutrinos above 0.1 EeV and will have the greatest sensitivity within the favored energy range from 0.1 EeV up to 10 EeV. Neutrinos of this energy are guaranteed by current observations of the GZK-cutoff by the HiRes and Pierre Auger Observatories. The detection method is based on Cherenkov emission by a neutrino induced cascade in the ice, coherent at radio wavelengths, which was predicted by Askar'yan in 1962 and verified in beam tests at SLAC in 2006. The detector is planned to consist of 37 stations with 16 antennas each, deployed at depths of up to 200 m under the ice surface. During the last two polar seasons (2010-2011, 2011-2012), a prototype station and a first detector station were successfully deployed and are taking data. These data have been and are currently being analyzed to study the ambient noise background and the radio frequency properties of the South Pole ice sheet. A worldwide collaboration is working on the planning, construction and data analysis of the detector array. This article will give a short report on the status of the ARA detector and show recent results from the recorded data. © 2013 AIP Publishing LLC.

POLYMER-NANOPARTICLE COMPOSITES FOR APPLICATIONS IN FLEXIBLE ELECTRONICS

The aim of this dissertation was to investigate flexible polymer-nanoparticle composites with unique magnetic and electrical properties. Toward this goal, two distinct projects were carried out. The first project explored the magneto-dielectric properties and morphology of flexible polymer-nanoparticle composites that possess high permeability (µ), high permittivity (ε) and minimal dielectric, and magnetic loss (tan δε, tan δµ). The main materials challenges were the synthesis of magnetic nanoparticle fillers displaying high saturation magnetization (Ms), limited coercivity, and their homogeneous dispersion in a polymeric matrix. Nanostructured magnetic fillers including polycrystalline iron core-shell nanoparticles, and constructively assembled superparamagnetic iron oxide nanoparticles were synthesized, and dispersed uniformly in an elastomer matrix to minimize conductive losses. The resulting composites have demonstrated promising permittivity (22.3), permeability (3), and sustained low dielectric (0.1), magnetic (0.4) loss for frequencies below 2 GHz. This study demonstrated nanocomposites with tunable magnetic resonance frequency, which can be used to develop compact and flexible radio frequency devices with high efficiency. The second project focused on fundamental research regarding methods for the design of highly conductive polymer-nanoparticle composites that can maintain high electrical conductivity under tensile strain exceeding 100%. We investigated a simple solution spraying method to fabricate stretchable conductors based on elastomeric block copolymer fibers and silver nanoparticles. Silver nanoparticles were assembled both in and around block copolymer fibers forming interconnected dual nanoparticle networks, resulting in both in-fiber conductive pathways and additional conductive pathways on the outer surface of the fibers. Stretchable composites with conductivity values reaching 9000 S/cm maintained 56% of their initial conductivity after 500 cycles at 100% strain. The developed manufacturing method in this research could pave the way towards direct deposition of flexible electronic devices on any shaped substrate. The electrical and electromechanical properties of these dual silver nanoparticle network composites make them promising materials for the future construction of stretchable circuitry for displays, solar cells, antennas, and strain and tactility sensors.

Operating infrastructure for an FPGA and ARM system

Advances in FPGA technology and higher processing capabilities requirements have pushed to the emerge of All Programmable Systems-on-Chip, which incorporate a hard designed processing system and a programmable logic that enable the development of specialized computer systems for a wide range of practical applications, including data and signal processing, high performance computing, embedded systems, among many others. To give place to an infrastructure that is capable of using the benefits of such a reconfigurable system, the main goal of the thesis is to implement an infrastructure composed of hardware, software and network resources, that incorporates the necessary services for the operation, management and interface of peripherals, that coompose the basic building blocks for the execution of applications. The project will be developed using a chip from the Zynq-7000 All Programmable Systems-on-Chip family.

Reuse and integration of specification logics: the hybridisation perspective

Hybridisation is a systematic process along which the characteristic features of hybrid logic, both at the syntactic and the semantic levels, are developed on top of an arbitrary logic framed as an institution. It also captures the construction of first-order encodings of such hybridised institutions into theories in first-order logic. The method was originally developed to build suitable logics for the specification of reconfigurable software systems on top of whatever logic is used to describe local requirements of each system’s configuration. Hybridisation has, however, a broader scope, providing a fresh example of yet another development in combining and reusing logics driven by a problem from Computer Science. This paper offers an overview of this method, proposes some new extensions, namely the introduction of full quantification leading to the specification of dynamic modalities, and exemplifies its potential through a didactical application. It is discussed how hybridisation can be successfully used in a formal specification course in which students progress from equational to hybrid specifications in a uniform setting, integrating paradigms, combining data and behaviour, and dealing appropriately with systems evolution and reconfiguration.

Múltiplas antenas como alternativa para aumentar a taxa de extração de chaves secretas em redes veiculares com desvanecimento lento

The communication in vehicular ad hoc networks (VANETs) is commonly divided in two scenarios, namely vehicle-to-vehicle (V2V) and vehicle-to-infrastructure (V2I). Aiming at establishing secure communication against eavesdroppers, recent works have proposed the exchange of secret keys based on the variation in received signal strength (RSS). However, the performance of such scheme depends on the channel variation rate, being more appropriate for scenarios where the channel varies rapidly, as is usually the case with V2V communication. In the communication V2I, the channel commonly undergoes slow fading. In this work we propose the use of multiple antennas in order to artificially generate a fast fading channel so that the extraction of secret keys out of the RSS becomes feasible in a V2I scenario. Numerical analysis shows that the proposed model can outperform, in terms of secret bit extraction rate, a frequency hopping-based method proposed in the literature.

Components and circuits for tunneling diode based high frequency sources

Terahertz (THz) technology has been generating a lot of interest because of the potential applications for systems working in this frequency range. However, to fully achieve this potential, effective and efficient ways of generating controlled signals in the terahertz range are required. Devices that exhibit negative differential resistance (NDR) in a region of their current-voltage (I-V ) characteristics have been used in circuits for the generation of radio frequency signals. Of all of these NDR devices, resonant tunneling diode (RTD) oscillators, with their ability to oscillate in the THz range are considered as one of the most promising solid-state sources for terahertz signal generation at room temperature. There are however limitations and challenges with these devices, from inherent low output power usually in the range of micro-watts (uW) for RTD oscillators when milli-watts (mW) are desired. At device level, parasitic oscillations caused by the biasing line inductance when the device is biased in the NDR region prevent accurate device characterisation, which in turn prevents device modelling for computer simulations. This thesis describes work on I-V characterisation of tunnel diode (TD) and RTD (fabricated by Dr. Jue Wang) devices, and the radio frequency (RF) characterisation and small signal modelling of RTDs. The thesis also describes the design and measurement of hybrid TD oscillators for higher output power and the design and measurement of a planar Yagi antenna (fabricated by Khalid Alharbi) for THz applications. To enable oscillation free current-voltage characterisation of tunnel diodes, a commonly employed method is the use of a suitable resistor connected across the device to make the total differential resistance in the NDR region positive. However, this approach is not without problems as the value of the resistor has to satisfy certain conditions or else bias oscillations would still be present in the NDR region of the measured I-V characteristics. This method is difficult to use for RTDs which are fabricated on wafer due to the discrepancies in designed and actual resistance values of fabricated resistors using thin film technology. In this work, using pulsed DC rather than static DC measurements during device characterisation were shown to give accurate characteristics in the NDR region without the need for a stabilisation resistor. This approach allows for direct oscillation free characterisation for devices. Experimental results show that the I-V characterisation of tunnel diodes and RTD devices free of bias oscillations in the NDR region can be made. In this work, a new power-combining topology to address the limitations of low output power of TD and RTD oscillators is presented. The design employs the use of two oscillators biased separately, but with the combined output power from both collected at a single load. Compared to previous approaches, this method keeps the frequency of oscillation of the combined oscillators the same as for one of the oscillators. Experimental results with a hybrid circuit using two tunnel diode oscillators compared with a single oscillator design with similar values shows that the coupled oscillators produce double the output RF power of the single oscillator. This topology can be scaled for higher (up to terahertz) frequencies in the future by using RTD oscillators. Finally, a broadband Yagi antenna suitable for wireless communication at terahertz frequencies is presented in this thesis. The return loss of the antenna showed that the bandwidth is larger than the measured range (140-220 GHz). A new method was used to characterise the radiation pattern of the antenna in the E-plane. This was carried out on-wafer and the measured radiation pattern showed good agreement with the simulated pattern. In summary, this work makes important contributions to the accurate characterisation and modelling of TDs and RTDs, circuit-based techniques for power combining of high frequency TD or RTD oscillators, and to antennas suitable for on chip integration with high frequency oscillators.

High performance terahertz resonant tunnelling diode sources and broadband antenna for air-side radiation

Resonant tunnelling diode (RTD) is known to be the fastest electronics device that can be fabricated in compact form and operate at room temperature with potential oscillation frequency up to 2.5 THz. The RTD device consists of a narrow band gap quantum well layer sandwiched between two thin wide band gap barriers layers. It exhibits negative differential resistance (NDR) region in its current-voltage (I-V) characteristics which is utilised in making oscillators. Up to date, the main challenge is producing high output power at high frequencies in particular. Although oscillation frequencies of ~ 2 THz have been already reported, the output power is in the range of micro-Watts. This thesis describes the systematic work on the design, fabrication, and characterisation of RTD-based oscillators in microwave/millimetre-wave monolithic integrated circuits (MMIC) form that can produce high output power and high oscillation frequency at the same time. Different MMIC RTD oscillator topologies were designed, fabricated, and characterised in this project which include: single RTD oscillator which employs one RTD device, double RTDs oscillator which employs two RTD devices connected in parallel, and coupled RTD oscillators which combine the powers of two oscillators over a single load, based on mutual coupling and which can employ up to four RTD devices. All oscillators employed relatively large size RTD devices for high power operation. The main challenge was to realise high oscillation frequency (~ 300 GHz) in MMIC form with the employed large sized RTD devices. To achieve this aim, proper designs of passive structures that can provide small values of resonating inductances were essential. These resonating inductance structures included shorted coplanar wave guide (CPW) and shorted microstrip transmission lines of low characteristics impedances Zo. Shorted transmission line of lower Zo has lower inductance per unit length. Thus, the geometrical dimensions would be relatively large and facilitate fabrication by low cost photolithography. A series of oscillators with oscillation frequencies in the J-band (220 – 325 GHz) range and output powers from 0.2 – 1.1 mW have been achieved in this project, and all were fabricated using photolithography. Theoretical estimation showed that higher oscillation frequencies (> 1 THz) can be achieved with the proposed MMIC RTD oscillators design in this project using photolithography with expected high power operation. Besides MMIC RTD oscillators, reported planar antennas for RTD-based oscillators were critically reviewed and the main challenges in designing high performance integrated antennas on large dielectric constant substrates are discussed in this thesis. A novel antenna was designed, simulated, fabricated, and characterised in this project. It was a bow-tie antenna with a tuning stub that has very wide bandwidth across the J-band. The antenna was diced and mounted on a reflector ground plane to alleviate the effect of the large dielectric constant substrate (InP) and radiates upwards to the air-side direction. The antenna was also investigated for integration with the all types of oscillators realised in this project. One port and two port antennas were designed, simulated, fabricated, and characterised and showed the suitability of integration with the single/double oscillator layout and the coupled oscillator layout, respectively.

Bull's eye leaky wave antenna for terrestrial and space applications

This work presents the study of Bull's eye antenna designs, a type of leaky wave antenna (LWA), operating in the 60 GHz band. This band emerged as a new standard for specific terrestrial and space applications because the radio spectrumbecomes more congested up to the millimetre-wave band, starting at 30 GHz. Built on existing Bull's eye antenna designs, novel structures were simulated, fabricated and measured, so as to provide more exibility in the implementation of wireless solutions at this frequency. Firstly, the study of a 60 GHz Bull's eye antenna for straightforward integration onto a CubeSat is presented. An investigation of the design is carried out, from the description of the radiation mechanism supported by simulation results, to the radiation pattern measurement of a prototype which provides a gain of 19.1 dBi at boresight. Another design, based on a modified feed structure, uses a microstrip to waveguide transition to provide easier and inexpensive integration of a Bull's eye antenna onto a planar circuit. Secondly, the design of Bull's eye antennas capable of creating beam deflection and multi-beam is presented. In particular, a detail study of the deflection mechanism is proposed, followed by the demonstration of a Bull's eye antenna generating two separate beams at ±16° away from the boresight. In addition, a novel mechanically steerable Bull's eye antenna, based on the division of the corrugated area in paired sectors is presented. A prototype was fabricated and measured. It generated double beams at ±8° and ±15° from the boresight, and a single boresight beam. Thirdly, a Bull's eye antenna capable of generating two simultaneous orbital angular momentum (OAM) modes l = 3 is proposed. The design is based on a circular travelling wave resonator and would allow channel capacity increase through OAM multiplexing. An improved design based on two stacked OAM Bull's eye antennas capable of producing four orthogonal OAM modes l = (±3,±13) simultaneously is presented. A novel receiving scheme based on discretely sampled partial aperture receivers (DSPAR) is then introduced. This solution could provide a lower windage and a lower cost of implementation than current whole or partial continuous aperture.