Process Variation Aware Estimation of Static Leakage Power in Nano-CMOS

We present a statistical methodology for leakage power estimation, due to subthreshold and gate tunneling leakage, in the presence of process variations, for 65 nm CMOS. The circuit leakage power variations is analyzed by Monte Carlo (MC) simulations, by characterizing NAND gate library. A statistical “hybrid model” is proposed, to extend this methodology to a generic library. We demonstrate that hybrid model based statistical design results in up to 95% improvement in the prediction of worst to best corner leakage spread, with an error of less than 0.5%, with respect to worst case design.

Flux Partitioning of Species Approach in Binary Interdiffusion Process

Validation of the flux partitioning of species model has been illustrated. Various combinations of inequality expression for the fluxes of species A and B in two successively grown hypothetical intermetallic phases in the interdiffusion zone have been considered within the constraints of this concept. Furthermore, ratio of intrinsic diffusivities of the species A and B in those two phases has been correlated in four different cases. Moreover, complete and or partial validation or invalidation of this model with respect to both the species, has been proven theoretically and also discussed with the Co-Si system as an example.

Optical, electrical and dielectric properties of TiO(2)-SiO(2) films prepared by a cost effective sol-gel process

Titanium dioxide (TiO(2)) and silicon dioxide (SiO(2)) thin films and their mixed films were synthesized by the sol-gel spin coating method using titanium tetra isopropoxide (TTIP) and tetra ethyl ortho silicate (TEOS) as the precursor materials for TiO(2) and SiO(2) respectively. The pure and composite films of TiO(2) and SiO(2) were deposited on glass and silicon substrates. The optical properties were studied for different compositions of TiO(2) and SiO(2) sols and the refractive index and optical band gap energies were estimated. MOS capacitors were fabricated using TiO(2) films on p-silicon (1 0 0) substrates. The current-voltage (I-V) and capacitance-voltage (C-V) characteristics were studied and the electrical resistivity and dielectric constant were estimated for the films annealed at 200 degrees C for their possible use in optoelectronic applications. (C) 2011 Elsevier B.V. All rights reserved.

Solid state electrochemical sensor for monitoring Mg in Al refining process

Novel solid-state electrochemical sensors have been designed using the Mg2+ cation conductors incorporating novel solid-state reference electrodes for in-line monitoring of Mg in molten Al during the refining process and also for in-line monitoring of Mg content in molten Al in the alloying process. In this paper we report the preparation of Mg2+ ion conductors, MgAl2O4 and MgZr4(PO4)6, by the solid state ceramic synthesis route, measurement of their electrical properties using ac-impedance spectroscopy and application of the above cation conductors for designing novel electrochemical sensors for monitoring Mg dissolved in molten Al. The activation energy for Mg2+ ion conduction in MgAl2O4 is 2.08 eV and in MgZr4(PO4)6 is 1.7 eV, respectively. The sensors have been found to respond rapidly to change in Mg content in molten aluminium around 1000 K.

Modeling of the Effects of Process Variations on Circuit Delay at 65nm

A novel methodology for modeling the effects of process variations on circuit delay performance is proposed by relating the variations in process parameters to variations in delay metric of a complex digital circuit. The delay of a 2-input NAND gate with 65nm gate length transistors is extensively characterized by mixed-mode simulations which is then used as a library element. The variation in saturation current Ionat the device level, and the variation in rising/falling edge stage delay for the NAND gate at the circuit level, are taken as performance metrics. A 4-bit x 4-bit Wallace tree multiplier circuit is used as a representative combinational circuit to demonstrate the proposed methodology. The variation in the multiplier delay is characterized, to obtain delay distributions, by an extensive Monte Carlo analysis. An analytical model based on CV/I metric is proposed, to extend this methodology for a generic technology library with a variety of library elements.