970 resultados para Embedded boundary method
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Dissertação para a obtenção do grau de Mestre em Engenharia Electrotécnica Ramo de Energia
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Nowadays, many real-time operating systems discretize the time relying on a system time unit. To take this behavior into account, real-time scheduling algorithms must adopt a discrete-time model in which both timing requirements of tasks and their time allocations have to be integer multiples of the system time unit. That is, tasks cannot be executed for less than one time unit, which implies that they always have to achieve a minimum amount of work before they can be preempted. Assuming such a discrete-time model, the authors of Zhu et al. (Proceedings of the 24th IEEE international real-time systems symposium (RTSS 2003), 2003, J Parallel Distrib Comput 71(10):1411–1425, 2011) proposed an efficient “boundary fair” algorithm (named BF) and proved its optimality for the scheduling of periodic tasks while achieving full system utilization. However, BF cannot handle sporadic tasks due to their inherent irregular and unpredictable job release patterns. In this paper, we propose an optimal boundary-fair scheduling algorithm for sporadic tasks (named BF TeX ), which follows the same principle as BF by making scheduling decisions only at the job arrival times and (expected) task deadlines. This new algorithm was implemented in Linux and we show through experiments conducted upon a multicore machine that BF TeX outperforms the state-of-the-art discrete-time optimal scheduler (PD TeX ), benefiting from much less scheduling overheads. Furthermore, it appears from these experimental results that BF TeX is barely dependent on the length of the system time unit while PD TeX —the only other existing solution for the scheduling of sporadic tasks in discrete-time systems—sees its number of preemptions, migrations and the time spent to take scheduling decisions increasing linearly when improving the time resolution of the system.
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Task scheduling is one of the key mechanisms to ensure timeliness in embedded real-time systems. Such systems have often the need to execute not only application tasks but also some urgent routines (e.g. error-detection actions, consistency checkers, interrupt handlers) with minimum latency. Although fixed-priority schedulers such as Rate-Monotonic (RM) are in line with this need, they usually make a low processor utilization available to the system. Moreover, this availability usually decreases with the number of considered tasks. If dynamic-priority schedulers such as Earliest Deadline First (EDF) are applied instead, high system utilization can be guaranteed but the minimum latency for executing urgent routines may not be ensured. In this paper we describe a scheduling model according to which urgent routines are executed at the highest priority level and all other system tasks are scheduled by EDF. We show that the guaranteed processor utilization for the assumed scheduling model is at least as high as the one provided by RM for two tasks, namely 2(2√−1). Seven polynomial time tests for checking the system timeliness are derived and proved correct. The proposed tests are compared against each other and to an exact but exponential running time test.
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“Many-core” systems based on a Network-on-Chip (NoC) architecture offer various opportunities in terms of performance and computing capabilities, but at the same time they pose many challenges for the deployment of real-time systems, which must fulfill specific timing requirements at runtime. It is therefore essential to identify, at design time, the parameters that have an impact on the execution time of the tasks deployed on these systems and the upper bounds on the other key parameters. The focus of this work is to determine an upper bound on the traversal time of a packet when it is transmitted over the NoC infrastructure. Towards this aim, we first identify and explore some limitations in the existing recursive-calculus-based approaches to compute the Worst-Case Traversal Time (WCTT) of a packet. Then, we extend the existing model by integrating the characteristics of the tasks that generate the packets. For this extended model, we propose an algorithm called “Branch and Prune” (BP). Our proposed method provides tighter and safe estimates than the existing recursive-calculus-based approaches. Finally, we introduce a more general approach, namely “Branch, Prune and Collapse” (BPC) which offers a configurable parameter that provides a flexible trade-off between the computational complexity and the tightness of the computed estimate. The recursive-calculus methods and BP present two special cases of BPC when a trade-off parameter is 1 or ∞, respectively. Through simulations, we analyze this trade-off, reason about the implications of certain choices, and also provide some case studies to observe the impact of task parameters on the WCTT estimates.
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This paper presents a new communication architecture to enable the remote control, monitoring and debug of embedded-system controllers designed using IOPT Petri nets. IOPT Petri nets and the related tools (http://gres.uninova.pt) have been used as a rapid prototyping and development framework, including model-checking, simulation and automatic code generation tools. The new architecture adds remote operation capabilities to the controllers produced by the automatic code generators, enabling quasi-real-time remote debugging and monitoring using the IOPT simulator tool. Furthermore, it enables the creation of graphical user interfaces for remote operation and the development of distributed systems where a Petri net model running on a central system supervises the actions of multiple remote subsystems. © 2015 IEEE.
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Modular design is crucial to manage large-scale systems and to support the divide-and-conquer development approach. It allows hierarchical representations and, therefore, one can have a system overview, as well as observe component details. Petri nets are suitable to model concurrent systems, but lack on structuring mechanisms to support abstractions and the composition of sub-models, in particular when considering applications to embedded controllers design. In this paper we present a module construct, and an underlying high-level Petri net type, to model embedded controllers. Multiple interfaces can be declared in a module, thus, different instances of the same module can be used in different situations. The interface is a subset of the module nodes, through which the communication with the environment is made. Module places can be annotated with a generic type, overridden with a concrete type at instance level, and constants declared in a module may have a new value in each instance.
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A multiobjective approach for optimization of passive damping for vibration reduction in sandwich structures is presented in this paper. Constrained optimization is conducted for maximization of modal loss factors and minimization of weight of sandwich beams and plates with elastic laminated constraining layers and a viscoelastic core, with layer thickness and material and laminate layer ply orientation angles as design variables. The problem is solved using the Direct MultiSearch (DMS) solver for derivative-free multiobjective optimization and solutions are compared with alternative ones obtained using genetic algorithms.
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Single processor architectures are unable to provide the required performance of high performance embedded systems. Parallel processing based on general-purpose processors can achieve these performances with a considerable increase of required resources. However, in many cases, simplified optimized parallel cores can be used instead of general-purpose processors achieving better performance at lower resource utilization. In this paper, we propose a configurable many-core architecture to serve as a co-processor for high-performance embedded computing on Field-Programmable Gate Arrays. The architecture consists of an array of configurable simple cores with support for floating-point operations interconnected with a configurable interconnection network. For each core it is possible to configure the size of the internal memory, the supported operations and number of interfacing ports. The architecture was tested in a ZYNQ-7020 FPGA in the execution of several parallel algorithms. The results show that the proposed many-core architecture achieves better performance than that achieved with a parallel generalpurpose processor and that up to 32 floating-point cores can be implemented in a ZYNQ-7020 SoC FPGA.
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We present results, obtained by means of an analytic study and a numerical simulation, about the resonant condition necessary to produce a Localized Surface Plasmonic Resonance (LSPR) effect at the surface of metal nanospheres embedded in an amorphous silicon matrix. The study is based on a Lorentz dispersive model for a-Si:H permittivity and a Drude model for the metals. Considering the absorption spectra of a-Si:H, the best choice for the metal nanoparticles appears to be aluminium, indium or magnesium. No difference has been observed when considering a-SiC:H. Finite-difference time-domain (FDTD) simulation of an Al nanosphere embedded into an amorphous silicon matrix shows an increased scattering radius and the presence of LSPR induced by the metal/semiconductor interaction under green light (560 nm) illumination. Further results include the effect of the nanoparticles shape (nano-ellipsoids) in controlling the wavelength suitable to produce LSPR. It has been shown that is possible to produce LSPR in the red part of the visible spectrum (the most critical for a-Si:H solar cells applications in terms of light absorption enhancement) with aluminium nano-ellipsoids. As an additional results we may conclude that the double Lorentz-Lorenz model for the optical functions of a-Si:H is numerically stable in 3D simulations and can be used safely in the FDTD algorithm. A further simulation study is directed to determine an optimal spatial distribution of Al nanoparticles, with variable shapes, capable to enhance light absorption in the red part of the visible spectrum, exploiting light trapping and plasmonic effects. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
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This work introduces a novel idea for wireless energy transfer, proposing for the first time the unit-cell of an indoor localization and RF harvesting system embedded into the floor. The unit-cell is composed by a 5.8 GHz patch antenna surrounded by a 13.56 MHz coil. The coil locates a device and activate the patch which, connected to a power grid, radiates to wirelessly charge the localized device. The HF and RF circuits co-existence and functionality are demonstrated in this paper, the novelty of which is also in the adoption of low cost and most of all ecofriendly materials, such as wood and cork, as substrates for electronics.
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Resumo: A decisão da terapêutica hormonal no tratamento do cancro da mama baseiase na determinação do receptor de estrogénio alfa por imunohistoquímica (IHC). Contudo, a presença deste receptor não prediz a resposta em todas as situações, em parte devido a limitações do método IHC. Investigámos se a expressão dos genes ESR1 e ESR2, bem como a metilação dos respectivos promotores, pode estar relacionada com a evolução desfavorável de uma proporção de doentes tratados com tamoxifeno assim como com a perda dos receptores de estrogénio alfa (ERα) e beta (ERß). Amostras de 211 doentes com cancro da mama diagnosticado entre 1988 e 2004, fixadas em formalina e preservadas em parafina, foram utilizadas para a determinação por IHC da presença dos receptores ERα e ERß. O mRNA total do gene ESR1 e os níveis específicos do transcrito derivado do promotor C (ESR1_C), bem como dos transcritos ESR2_ß1, ESR2_ß2/cx, and ESR2_ß5 foram avaliados por Real-time PCR. Os promotores A e C do gene ESR1 e os promotores 0K e 0N do gene ESR2 foram investigados por análise de metilação dos dinucleotidos CpG usando bisulfite-PCR para análise com enzimas de restrição, ou para methylation specific PCR. Atendendo aos resultados promissores relacionados com a metilação do promotor do gene ESR1, complementamos o estudo com um método quantitativo por matrix-assisted laser desorption/ionization time-of-flight mass spectrometry (MALDI-TOF MS) suportado pelo software Epityper para a medição da metilação nos promotores A e C. Fez-se a avaliação da estabilidade do mRNA nas linhas celulares de cancro da mama MCF-7 e MDA-MB-231 tratadas com actinomicina D. Baixos níveis do transcrito ESR1_C associaram-se a uma melhor sobrevivência global (p = 0.017). Níveis elevados do transcrito ESR1_C associaram-se a uma resposta inferior ao tamoxifeno (HR = 2.48; CI 95% 1.24-4.99), um efeito mais pronunciado em doentes com tumores de fenótipo ERα/PgR duplamente positivo (HR = 3.41; CI 95% 1.45-8.04). A isoforma ESR1_C mostrou ter uma semi-vida prolongada, bem como uma estrutura secundária da região 5’UTR muito mais relaxada em comparação com a isoforma ESR1_A. A análise por Western-blot mostrou que ao nível da 21 proteína, a selectividade de promotores é indistinguivel. Não se detectou qualquer correlação entre os níveis das isoformas do gene ESR2 ou entre a metilação dos promotores do gene ESR2, e a detecção da proteína ERß. A metilação do promotor C do gene ESR1, e não do promotor A, foi responsável pela perda do receptor ERα. Estes resultados sugerem que os níveis do transcrito ESR1_C sejam usados como um novo potencial marcador para o prognóstico e predição de resposta ao tratamento com tamoxifeno em doentes com cancro da mama. Abstract: The decision of endocrine breast cancer treatment relies on ERα IHC-based assessment. However, ER positivity does not predict response in all cases in part due to IHC methodological limitations. We investigated whether ESR1 and ESR2 gene expression and respective promoter methylation may be related to non-favorable outcome of a proportion of tamoxifen treated patients as well as to ERα and ERß loss. Formalin-fixed paraffin-embedded breast cancer samples from 211 patients diagnosed between 1988 and 2004 were submitted to IHC-based ERα and ERß protein determination. ESR1 whole mRNA and promoter C specific transcript levels, as well as ESR2_ß1, ESR2_ß2/cx, and ESR2_ß5 transcripts were assessed by real-time PCR. ESR1 promoters A and C, and ESR2 promoters 0N and 0K were investigated by CpG methylation analysis using bisulfite-PCR for restriction analysis, or methylation specific PCR. Due to the promising results related to ESR1 promoter methylation, we have used a quantification method by matrixassisted laser desorption/ionization time-of-flight mass spectrometry (MALDITOF MS) together with Epityper software to measure methylation at promoters A and C. mRNA stability was assessed in actinomycin D treated MCF-7 and MDA-MB-231 cells. ERα protein was quantified using transiently transfected breast cancer cells. Low ESR1_C transcript levels were associated with better overall survival (p = 0.017). High levels of ESR1_C transcript were associated with non-favorable response in tamoxifen treated patients (HR = 2.48; CI 95% 1.24-4.99), an effect that was more pronounced in patients with ERα/PgR double-positive tumors (HR = 3.41; CI 95% 1.45-8.04). The ESR1_C isoform had a prolonged mRNA half-life and a more relaxed 5’UTR structure compared to ESR1_A isoform. Western-blot analysis showed that at protein level, the promoter selectivity is undistinguishable. There was no correlation between levels of ESR2 isoforms or ESR2 promoter methylation and ERß protein staining. ESR1 promoter C CpG methylation and not promoter A was responsible for ERα loss. We propose ESR1_C levels as a putative novel marker for breast cancer prognosis and prediction of tamoxifen response.
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Thesis presented in partial fulfillment of the requirements for the degree of Doctor of Philosophy in the subject of Electrical and Computer Engineering
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The local fractional Poisson equations in two independent variables that appear in mathematical physics involving the local fractional derivatives are investigated in this paper. The approximate solutions with the nondifferentiable functions are obtained by using the local fractional variational iteration method.
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This paper proposes an FPGA-based architecture for onboard hyperspectral unmixing. This method based on the Vertex Component Analysis (VCA) has several advantages, namely it is unsupervised, fully automatic, and it works without dimensionality reduction (DR) pre-processing step. The architecture has been designed for a low cost Xilinx Zynq board with a Zynq-7020 SoC FPGA based on the Artix-7 FPGA programmable logic and tested using real hyperspectral datasets. Experimental results indicate that the proposed implementation can achieve real-time processing, while maintaining the methods accuracy, which indicate the potential of the proposed platform to implement high-performance, low cost embedded systems.
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Hyperspectral imaging has become one of the main topics in remote sensing applications, which comprise hundreds of spectral bands at different (almost contiguous) wavelength channels over the same area generating large data volumes comprising several GBs per flight. This high spectral resolution can be used for object detection and for discriminate between different objects based on their spectral characteristics. One of the main problems involved in hyperspectral analysis is the presence of mixed pixels, which arise when the spacial resolution of the sensor is not able to separate spectrally distinct materials. Spectral unmixing is one of the most important task for hyperspectral data exploitation. However, the unmixing algorithms can be computationally very expensive, and even high power consuming, which compromises the use in applications under on-board constraints. In recent years, graphics processing units (GPUs) have evolved into highly parallel and programmable systems. Specifically, several hyperspectral imaging algorithms have shown to be able to benefit from this hardware taking advantage of the extremely high floating-point processing performance, compact size, huge memory bandwidth, and relatively low cost of these units, which make them appealing for onboard data processing. In this paper, we propose a parallel implementation of an augmented Lagragian based method for unsupervised hyperspectral linear unmixing on GPUs using CUDA. The method called simplex identification via split augmented Lagrangian (SISAL) aims to identify the endmembers of a scene, i.e., is able to unmix hyperspectral data sets in which the pure pixel assumption is violated. The efficient implementation of SISAL method presented in this work exploits the GPU architecture at low level, using shared memory and coalesced accesses to memory.