Towards adoption of eLearning technologies at Lappeenranta University of Technology: Understanding Teachers‟ Adoption of Blackboard Learning System

The electronic learning has become crucial in higher education with increased usage of learning management systems as a key source of integration on distance learning. The objective of this study is to understand how university teachers are influenced to use and adopt web-based learning management systems. Blackboard, as one of the systems used internationally by various universities is applied as a case. Semi-structured interviews were made with professors and lecturers who are using Blackboard at Lappeenranta University of Technology. The data collected were categorized under constructs adapted from Unified Theory of Acceptance and Use of Technology (UTAUT) and interpretation and discussion were based on reviewed literature. The findings suggest that adoption of learning management systems by LUT teachers is highly influenced by perceived usefulness, facilitating conditions and gained experience. The findings also suggest that easiness of using the system and social influence appear as medium influence of adoption for teachers at LUT.

System to outline the graduatestudents

Objective: to evaluate the system to outline the graduate students from the Post-Graduate Programs of CAPES Medicine III area. Method: it was analyzed the book of indicators and the Document of Area of the Post-Graduate Programs of Surgery, also checking the literature about this issue. Results: there was a paucity of data from most of the programs, as regards to the methods for evaluation of graduate students. The current system lacks a standard and an institutional support to outline the graduate students. In the public system there is a concentration of postgraduate students in Medicine; however, they represent a small part of those Brazilians students who finished their graduation courses in Medicine. In the current context, the quest for the post graduate courses and consequently for a research field or even a teaching career, has been replaced by the private sector jobs and the labor market, both in non-academic assistance activities. Conclusion: it is imperative to establish not only science and technology innovation policies but also educational and health policies acting harmoniously and stimulating the qualification and the teaching career, improving the post-graduate courses. It is necessary to develop a single form under the institutional guidance of CAPES with the conception of a National Program for Graduate Student in order to consolidate guidelines to mapping the graduate students of post-graduate programs in surgery, in our country.

Design Space Exploration for MPSoC Architectures

Multiprocessor system-on-chip (MPSoC) designs utilize the available technology and communication architectures to meet the requirements of the upcoming applications. In MPSoC, the communication platform is both the key enabler, as well as the key differentiator for realizing efficient MPSoCs. It provides product differentiation to meet a diverse, multi-dimensional set of design constraints, including performance, power, energy, reconfigurability, scalability, cost, reliability and time-to-market. The communication resources of a single interconnection platform cannot be fully utilized by all kind of applications, such as the availability of higher communication bandwidth for computation but not data intensive applications is often unfeasible in the practical implementation. This thesis aims to perform the architecture-level design space exploration towards efficient and scalable resource utilization for MPSoC communication architecture. In order to meet the performance requirements within the design constraints, careful selection of MPSoC communication platform, resource aware partitioning and mapping of the application play important role. To enhance the utilization of communication resources, variety of techniques such as resource sharing, multicast to avoid re-transmission of identical data, and adaptive routing can be used. For implementation, these techniques should be customized according to the platform architecture. To address the resource utilization of MPSoC communication platforms, variety of architectures with different design parameters and performance levels, namely Segmented bus (SegBus), Network-on-Chip (NoC) and Three-Dimensional NoC (3D-NoC), are selected. Average packet latency and power consumption are the evaluation parameters for the proposed techniques. In conventional computing architectures, fault on a component makes the connected fault-free components inoperative. Resource sharing approach can utilize the fault-free components to retain the system performance by reducing the impact of faults. Design space exploration also guides to narrow down the selection of MPSoC architecture, which can meet the performance requirements with design constraints.

A Model-Based Development and Verification Framework for Distributed System-on-Chip Architecture

The capabilities and thus, design complexity of VLSI-based embedded systems have increased tremendously in recent years, riding the wave of Moore’s law. The time-to-market requirements are also shrinking, imposing challenges to the designers, which in turn, seek to adopt new design methods to increase their productivity. As an answer to these new pressures, modern day systems have moved towards on-chip multiprocessing technologies. New architectures have emerged in on-chip multiprocessing in order to utilize the tremendous advances of fabrication technology. Platform-based design is a possible solution in addressing these challenges. The principle behind the approach is to separate the functionality of an application from the organization and communication architecture of hardware platform at several levels of abstraction. The existing design methodologies pertaining to platform-based design approach don’t provide full automation at every level of the design processes, and sometimes, the co-design of platform-based systems lead to sub-optimal systems. In addition, the design productivity gap in multiprocessor systems remain a key challenge due to existing design methodologies. This thesis addresses the aforementioned challenges and discusses the creation of a development framework for a platform-based system design, in the context of the SegBus platform - a distributed communication architecture. This research aims to provide automated procedures for platform design and application mapping. Structural verification support is also featured thus ensuring correct-by-design platforms. The solution is based on a model-based process. Both the platform and the application are modeled using the Unified Modeling Language. This thesis develops a Domain Specific Language to support platform modeling based on a corresponding UML profile. Object Constraint Language constraints are used to support structurally correct platform construction. An emulator is thus introduced to allow as much as possible accurate performance estimation of the solution, at high abstraction levels. VHDL code is automatically generated, in the form of “snippets” to be employed in the arbiter modules of the platform, as required by the application. The resulting framework is applied in building an actual design solution for an MP3 stereo audio decoder application.

Handshake ecosystem for Educational Contents between Institutional Repository and OER based Repository

Poster at Open Repositories 2014, Helsinki, Finland, June 9-13, 2014

Efficient Transmitter/Receiver Architectures for High Performance Wireless Applications

The thesis focuses on efficient design methods and reconfiguration architectures suitable for higher performance wireless communication .The work presented in this thesis describes the development of compact,inexpensive and low power communication devices that are robust,testable and capable of handling multiple communication standards.A new multistandard Decimation Filter Design Toolbox is developed in MATLAB GUIDE environment.RNS based dual-mode decimation filters reconfigurable for WCDMA/WiMAX and WCDMA/WLANa standards are designed and implemented.It offers high speed operation with lesser area requirement and lower dynamic power dissipation.A novel sigma-delta based direct analog-to-residue converter that reduces the complexity of RNS conversion circuitry is presented.The performance of an OFDM communication system with a new RRNS-convolutional concatenated coding is analysed and improved BER performance is obtained under different channel conditions. Easily testable MAC units for filters are presented using Reed-Muller logic for realization.

Design and synthesis of efficient mac architectures for high speed decimal processor

Most of the commercial and financial data are stored in decimal fonn. Recently, support for decimal arithmetic has received increased attention due to the growing importance in financial analysis, banking, tax calculation, currency conversion, insurance, telephone billing and accounting. Performing decimal arithmetic with systems that do not support decimal computations may give a result with representation error, conversion error, and/or rounding error. In this world of precision, such errors are no more tolerable. The errors can be eliminated and better accuracy can be achieved if decimal computations are done using Decimal Floating Point (DFP) units. But the floating-point arithmetic units in today's general-purpose microprocessors are based on the binary number system, and the decimal computations are done using binary arithmetic. Only few common decimal numbers can be exactly represented in Binary Floating Point (BF P). ln many; cases, the law requires that results generated from financial calculations performed on a computer should exactly match with manual calculations. Currently many applications involving fractional decimal data perform decimal computations either in software or with a combination of software and hardware. The performance can be dramatically improved by complete hardware DFP units and this leads to the design of processors that include DF P hardware.VLSI implementations using same modular building blocks can decrease system design and manufacturing cost. A multiplexer realization is a natural choice from the viewpoint of cost and speed.This thesis focuses on the design and synthesis of efficient decimal MAC (Multiply ACeumulate) architecture for high speed decimal processors based on IEEE Standard for Floating-point Arithmetic (IEEE 754-2008). The research goal is to design and synthesize deeimal'MAC architectures to achieve higher performance.Efficient design methods and architectures are developed for a high performance DFP MAC unit as part of this research.

Management of Higher Educational Institutions in Kerala

Economists consider education as an investment in man. Education develops human resources necessary for the economic and political growth of any nation. Adam Smith stressed the importance of education and included the acquired and useful activities of all the inhabitants or members of society in his concept of fixed capital.‘ Karl Marx shared with Smith's view when he laid down that the function of education in a socialist society will be to overcome the alienation of the worker from the means of production; while developing the technical skill it will make him a complete man as well as a producer.2 Education is also considered as a powerful instrument for social change. By inculcating moral and spiritual values, it brings changes both in the individual and in the society. It aims at creating a social order founded on the values of freedom, social justice and equal opportunity.3 The objective of this exploratory study is to enquire into the existing system of managing higher educational institutions in Kerala, compare it with the accepted principles of management believed to be applicable to all organisations, and develop a model capable of introducing more effective management practices

Christinaty, neutrality and public schooling : the origins of the dutch educational system, 1801-1920

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