Influence of annealed ohmic contact metals on electron mobility of strained AlGaN/GaN heterostructures

The influence of annealed ohmic contact metals on the electron mobility of a two dimensional electron gas (2DEG) is investigated on ungated AlGaN/GaN heterostructures and AlGaN/GaN heterostructure field effect transistors (AlGaN/GaN HFETs). Current-voltage (I-V) characteristics for ungated AlGaN/GaN heterostructures and capacitance-voltage (C-V) characteristics for AlGaN/GaN HFETs are obtained, and the electron mobility for the ungated AlGaN/GaN heterostructure is calculated. It is found that the electron mobility of the 2DEG for the ungated AlGaN/GaN heterostructure is decreased by more than 50% compared with the electron mobility of Hall measurements. We propose that defects are introduced into the AlGaN barrier layer and the strain of the AlGaN barrier layer is changed during the annealing process of the source and drain, causing the decrease in the electron mobility.

Determination of electron mobility in a blue-emitting alternating block copolymer by space-charge-limited current measurements

In this communication we analyse current versus voltage data obtained using one carrier injection at metal/polymer/metal structures, The used polymer is a soluble blue-emitting alternating block copolymer, Our experimental results demonstrate that the electron current is limited by a large amount of traps with exponential energy distribution in the copolymer. The electron ;mobility of 5.1 x 10(-10) cm(2)/V s is directly determined by space-charge-limited current measurements. The electron mobility is at least three orders of magnitude smaller than that for holes in the copolymer. (C) 1999 Elsevier Science Ltd. All rights reserved.

Analysis and Synthesis of pHEMT Class-E Amplifiers with Shunt Inductor including ON-State Active-Device Resistance Effects

In this theoretical paper, the analysis of the effect that ON-state active-device resistance has on the performance of a Class-E tuned power amplifier using a shunt inductor topology is presented. The work is focused on the relatively unexplored area of design facilitation of Class-E tuned amplifiers where intrinsically low-output-capacitance monolithic microwave integrated circuit switching devices such as pseudomorphic high electron mobility transistors are used. In the paper, the switching voltage and current waveforms in the presence of ON-resistance are analyzed in order to provide insight into circuit properties such as RF output power, drain efficiency, and power-output capability. For a given amplifier specification, a design procedure is illustrated whereby it is possible to compute optimal circuit component values which account for prescribed switch resistance loss. Furthermore, insight into how ON-resistance affects transistor selection in terms of peak switch voltage and current requirements is described. Finally, a design example is given in order to validate the theoretical analysis against numerical simulation.

Conformations of poly{G}-poly{C} π stacks with high hole mobility

Charge transfer properties of DNA depend strongly on the π stack conformation. In the present paper, we identify conformations of homogeneous poly-{G}-poly-{C} stacks that should exhibit high charge mobility. Two different computational approaches were applied. First, we calculated the electronic coupling squared, V2, between adjacent base pairs for all 1 ps snapshots extracted from 15 ns molecular dynamics trajectory of the duplex G15. The average value of the coupling squared 〈 V2 〉 is found to be 0.0065 eV2. Then we analyze the base-pair and step parameters of the configurations in which V2 is at least an order of magnitude larger than 〈 V2 〉. To obtain more consistent data, ∼65 000 configurations of the (G:C)2 stack were built using systematic screening of the step parameters shift, slide, and twist. We show that undertwisted structures (twist<20°) are of special interest, because the π stack conformations with strong electronic couplings are found for a wide range of slide and shift. Although effective hole transfer can also occur in configurations with twist=30° and 35°, large mutual displacements of neighboring base pairs are required for that. Overtwisted conformation (twist38°) seems to be of limited interest in the context of effective hole transfer. The results may be helpful in the search for DNA based elements for nanoelectronics

Fabrication and characterization at high temperature of AlGaN/GaN enhancement HEMTs

Enhancement-mode (E-mode) high electron mobility transistors (HEMTs) based on a standard AlGaN/GaN heterostructure have been fabricated using two different methods: 19F implantation and fluorine-based plasma treatment. The need of a thermal annealing after both treatments has been proven in order to restore the ID and gm levels. DC characterization at high temperature has demonstrated that ID and gm decrease reversibly due to the reduction of the electron mobility and the drift velocity. Pulsed measurements (state period and variable pulse width) have been performed to study the self-heating effects.

High Temperature Pulsed and DC Performance of AlInN/GaN HEMTs

The AlGaN/GaN high-electron mobility transistors (HEMTs) have been considered as promising candidates for the next generation of high temperature, high frequency, high-power devices. The potential of GaN-based HEMTs may be improved using an AlInN barrier because of its better lattice match to GaN, resulting in higher sheet carrier densities without piezoelectric polarization [1]. This work has been focused on the study of AlInN HEMTs pulse and DC mode characterization at high temperature.

Technology and characterization of GaN-HEMTs devices: high temperature and trapping effects

Los transistores de alta movilidad electrónica basados en GaN han sido objeto de una extensa investigación ya que tanto el GaN como sus aleaciones presentan unas excelentes propiedades eléctricas (alta movilidad, elevada concentración de portadores y campo eléctrico crítico alto). Aunque recientemente se han incluido en algunas aplicaciones comerciales, su expansión en el mercado está condicionada a la mejora de varios asuntos relacionados con su rendimiento y habilidad. Durante esta tesis se han abordado algunos de estos aspectos relevantes; por ejemplo, la fabricación de enhancement mode HEMTs, su funcionamiento a alta temperatura, el auto calentamiento y el atrapamiento de carga. Los HEMTs normalmente apagado o enhancement mode han atraído la atención de la comunidad científica dedicada al desarrollo de circuitos amplificadores y conmutadores de potencia, ya que su utilización disminuiría significativamente el consumo de potencia; además de requerir solamente una tensión de alimentación negativa, y reducir la complejidad del circuito y su coste. Durante esta tesis se han evaluado varias técnicas utilizadas para la fabricación de estos dispositivos: el ataque húmedo para conseguir el gate-recess en heterostructuras de InAl(Ga)N/GaN; y tratamientos basados en flúor (plasma CF4 e implantación de F) de la zona debajo de la puerta. Se han llevado a cabo ataques húmedos en heteroestructuras de InAl(Ga)N crecidas sobre sustratos de Si, SiC y zafiro. El ataque completo de la barrera se consiguió únicamente en las muestras con sustrato de Si. Por lo tanto, se puede deducir que la velocidad de ataque depende de la densidad de dislocaciones presentes en la estructura, ya que el Si presenta un peor ajuste del parámetro de red con el GaN. En relación a los tratamientos basados en flúor, se ha comprobado que es necesario realizar un recocido térmico después de la fabricación de la puerta para recuperar la heteroestructura de los daños causados durante dichos tratamientos. Además, el estudio de la evolución de la tensión umbral con el tiempo de recocido ha demostrado que en los HEMTs tratados con plasma ésta tiende a valores más negativos al aumentar el tiempo de recocido. Por el contrario, la tensión umbral de los HEMTs implantados se desplaza hacia valores más positivos, lo cual se atribuye a la introducción de iones de flúor a niveles más profundos de la heterostructura. Los transistores fabricados con plasma presentaron mejor funcionamiento en DC a temperatura ambiente que los implantados. Su estudio a alta temperatura ha revelado una reducción del funcionamiento de todos los dispositivos con la temperatura. Los valores iniciales de corriente de drenador y de transconductancia medidos a temperatura ambiente se recuperaron después del ciclo térmico, por lo que se deduce que dichos efectos térmicos son reversibles. Se han estudiado varios aspectos relacionados con el funcionamiento de los HEMTs a diferentes temperaturas. En primer lugar, se han evaluado las prestaciones de dispositivos de AlGaN/GaN sobre sustrato de Si con diferentes caps: GaN, in situ SiN e in situ SiN/GaN, desde 25 K hasta 550 K. Los transistores con in situ SiN presentaron los valores más altos de corriente drenador, transconductancia, y los valores más bajos de resistencia-ON, así como las mejores características en corte. Además, se ha confirmado que dichos dispositivos presentan gran robustez frente al estrés térmico. En segundo lugar, se ha estudiado el funcionamiento de transistores de InAlN/GaN con diferentes diseños y geometrías. Dichos dispositivos presentaron una reducción casi lineal de los parámetros en DC en el rango de temperaturas de 25°C hasta 225°C. Esto se debe principalmente a la dependencia térmica de la movilidad electrónica, y también a la reducción de la drift velocity con la temperatura. Además, los transistores con mayores longitudes de puerta mostraron una mayor reducción de su funcionamiento, lo cual se atribuye a que la drift velocity disminuye más considerablemente con la temperatura cuando el campo eléctrico es pequeño. De manera similar, al aumentar la distancia entre la puerta y el drenador, el funcionamiento del HEMT presentó una mayor reducción con la temperatura. Por lo tanto, se puede deducir que la degradación del funcionamiento de los HEMTs causada por el aumento de la temperatura depende tanto de la longitud de la puerta como de la distancia entre la puerta y el drenador. Por otra parte, la alta densidad de potencia generada en la región activa de estos transistores conlleva el auto calentamiento de los mismos por efecto Joule, lo cual puede degradar su funcionamiento y Habilidad. Durante esta tesis se ha desarrollado un simple método para la determinación de la temperatura del canal basado en medidas eléctricas. La aplicación de dicha técnica junto con la realización de simulaciones electrotérmicas han posibilitado el estudio de varios aspectos relacionados con el autocalentamiento. Por ejemplo, se han evaluado sus efectos en dispositivos sobre Si, SiC, y zafiro. Los transistores sobre SiC han mostrado menores efectos gracias a la mayor conductividad térmica del SiC, lo cual confirma el papel clave que desempeña el sustrato en el autocalentamiento. Se ha observado que la geometría del dispositivo tiene cierta influencia en dichos efectos, destacando que la distribución del calor generado en la zona del canal depende de la distancia entre la puerta y el drenador. Además, se ha demostrado que la temperatura ambiente tiene un considerable impacto en el autocalentamiento, lo que se atribuye principalmente a la dependencia térmica de la conductividad térmica de las capas y sustrato que forman la heterostructura. Por último, se han realizado numerosas medidas en pulsado para estudiar el atrapamiento de carga en HEMTs sobre sustratos de SiC con barreras de AlGaN y de InAlN. Los resultados obtenidos en los transistores con barrera de AlGaN han presentado una disminución de la corriente de drenador y de la transconductancia sin mostrar un cambio en la tensión umbral. Por lo tanto, se puede deducir que la posible localización de las trampas es la región de acceso entre la puerta y el drenador. Por el contrario, la reducción de la corriente de drenador observada en los dispositivos con barrera de InAlN llevaba asociado un cambio significativo en la tensión umbral, lo que implica la existencia de trampas situadas en la zona debajo de la puerta. Además, el significativo aumento del valor de la resistencia-ON y la degradación de la transconductancia revelan la presencia de trampas en la zona de acceso entre la puerta y el drenador. La evaluación de los efectos del atrapamiento de carga en dispositivos con diferentes geometrías ha demostrado que dichos efectos son menos notables en aquellos transistores con mayor longitud de puerta o mayor distancia entre puerta y drenador. Esta dependencia con la geometría se puede explicar considerando que la longitud y densidad de trampas de la puerta virtual son independientes de las dimensiones del dispositivo. Finalmente se puede deducir que para conseguir el diseño óptimo durante la fase de diseño no sólo hay que tener en cuenta la aplicación final sino también la influencia que tiene la geometría en los diferentes aspectos estudiados (funcionamiento a alta temperatura, autocalentamiento, y atrapamiento de carga). ABSTRACT GaN-based high electron mobility transistors have been under extensive research due to the excellent electrical properties of GaN and its related alloys (high carrier concentration, high mobility, and high critical electric field). Although these devices have been recently included in commercial applications, some performance and reliability issues need to be addressed for their expansion in the market. Some of these relevant aspects have been studied during this thesis; for instance, the fabrication of enhancement mode HEMTs, the device performance at high temperature, the self-heating and the charge trapping. Enhancement mode HEMTs have become more attractive mainly because their use leads to a significant reduction of the power consumption during the stand-by state. Moreover, they enable the fabrication of simpler power amplifier circuits and high-power switches because they allow the elimination of negativepolarity voltage supply, reducing significantly the circuit complexity and system cost. In this thesis, different techniques for the fabrication of these devices have been assessed: wet-etching for achieving the gate-recess in InAl(Ga)N/GaN devices and two different fluorine-based treatments (CF4 plasma and F implantation). Regarding the wet-etching, experiments have been carried out in InAl(Ga)N/GaN grown on different substrates: Si, sapphire, and SiC. The total recess of the barrier was achieved after 3 min of etching in devices grown on Si substrate. This suggests that the etch rate can critically depend on the dislocations present in the structure, since the Si exhibits the highest mismatch to GaN. Concerning the fluorine-based treatments, a post-gate thermal annealing was required to recover the damages caused to the structure during the fluorine-treatments. The study of the threshold voltage as a function of this annealing time has revealed that in the case of the plasma-treated devices it become more negative with the time increase. On the contrary, the threshold voltage of implanted HEMTs showed a positive shift when the annealing time was increased, which is attributed to the deep F implantation profile. Plasma-treated HEMTs have exhibited better DC performance at room temperature than the implanted devices. Their study at high temperature has revealed that their performance decreases with temperature. The initial performance measured at room temperature was recovered after the thermal cycle regardless of the fluorine treatment; therefore, the thermal effects were reversible. Thermal issues related to the device performance at different temperature have been addressed. Firstly, AlGaN/GaN HEMTs grown on Si substrate with different cap layers: GaN, in situ SiN, or in situ SiN/GaN, have been assessed from 25 K to 550 K. In situ SiN cap layer has been demonstrated to improve the device performance since HEMTs with this cap layer have exhibited the highest drain current and transconductance values, the lowest on-resistance, as well as the best off-state characteristics. Moreover, the evaluation of thermal stress impact on the device performance has confirmed the robustness of devices with in situ cap. Secondly, the high temperature performance of InAlN/GaN HEMTs with different layouts and geometries have been assessed. The devices under study have exhibited an almost linear reduction of the main DC parameters operating in a temperature range from room temperature to 225°C. This was mainly due to the thermal dependence of the electron mobility, and secondly to the drift velocity decrease with temperature. Moreover, HEMTs with large gate length values have exhibited a great reduction of the device performance. This was attributed to the greater decrease of the drift velocity for low electric fields. Similarly, the increase of the gate-to-drain distance led to a greater reduction of drain current and transconductance values. Therefore, this thermal performance degradation has been found to be dependent on both the gate length and the gate-to-drain distance. It was observed that the very high power density in the active region of these transistors leads to Joule self-heating, resulting in an increase of the device temperature, which can degrade the device performance and reliability. A simple electrical method have been developed during this work to determine the channel temperature. Furthermore, the application of this technique together with the performance of electro-thermal simulations have enabled the evaluation of different aspects related to the self-heating. For instance, the influence of the substrate have been confirmed by the study of devices grown on Si, SiC, and Sapphire. HEMTs grown on SiC substrate have been confirmed to exhibit the lowest self-heating effects thanks to its highest thermal conductivity. In addition to this, the distribution of the generated heat in the channel has been demonstrated to be dependent on the gate-to-drain distance. Besides the substrate and the geometry of the device, the ambient temperature has also been found to be relevant for the self-heating effects, mainly due to the temperature-dependent thermal conductivity of the layers and the substrate. Trapping effects have been evaluated by means of pulsed measurements in AlGaN and InAIN barrier devices. AlGaN barrier HEMTs have exhibited a de crease in drain current and transconductance without measurable threshold voltage change, suggesting the location of the traps in the gate-to-drain access region. On the contrary, InAIN barrier devices have showed a drain current associated with a positive shift of threshold voltage, which indicated that the traps were possibly located under the gate region. Moreover, a significant increase of the ON-resistance as well as a transconductance reduction were observed, revealing the presence of traps on the gate-drain access region. On the other hand, the assessment of devices with different geometries have demonstrated that the trapping effects are more noticeable in devices with either short gate length or the gate-to-drain distance. This can be attributed to the fact that the length and the trap density of the virtual gate are independent on the device geometry. Finally, it can be deduced that besides the final application requirements, the influence of the device geometry on the performance at high temperature, on the self-heating, as well as on the trapping effects need to be taken into account during the device design stage to achieve the optimal layout.

Noise in gallium nitride-based quantum well structures used for nanometer devices in the frequency range 1 Hz--3 Mhz and temperature range 77K--324K

Electronic noise has been investigated in AlxGa1−x N/GaN Modulation-Doped Field Effect Transistors (MODFETs) of submicron dimensions, grown for us by MBE (Molecular Beam Epitaxy) techniques at Virginia Commonwealth University by Dr. H. Morkoç and coworkers. Some 20 devices were grown on a GaN substrate, four of which have leads bonded to source (S), drain (D), and gate (G) pads, respectively. Conduction takes place in the quasi-2D layer of the junction (xy plane) which is perpendicular to the quantum well (z-direction) of average triangular width ∼3 nm. A non-doped intrinsic buffer layer of ∼5 nm separates the Si-doped donors in the AlxGa1−xN layer from the 2D-transistor plane, which affords a very high electron mobility, thus enabling high-speed devices. Since all contacts (S, D, and G) must reach through the AlxGa1−xN layer to connect internally to the 2D plane, parallel conduction through this layer is a feature of all modulation-doped devices. While the shunting effect may account for no more than a few percent of the current IDS, it is responsible for most excess noise, over and above thermal noise of the device. ^ The excess noise has been analyzed as a sum of Lorentzian spectra and 1/f noise. The Lorentzian noise has been ascribed to trapping of the carriers in the AlxGa1−xN layer. A detailed, multitrapping generation-recombination noise theory is presented, which shows that an exponential relationship exists for the time constants obtained from the spectral components as a function of 1/kT. The trap depths have been obtained from Arrhenius plots of log (τT2) vs. 1000/T. Comparison with previous noise results for GaAs devices shows that: (a) many more trapping levels are present in these nitride-based devices; (b) the traps are deeper (farther below the conduction band) than for GaAs. Furthermore, the magnitude of the noise is strongly dependent on the level of depletion of the AlxGa1−xN donor layer, which can be altered by a negative or positive gate bias VGS. ^ Altogether, these frontier nitride-based devices are promising for bluish light optoelectronic devices and lasers; however, the noise, though well understood, indicates that the purity of the constituent layers should be greatly improved for future technological applications. ^

Graphene nanocomposites

Graphene, one of the allotropes (diamond, carbon nanotube, and fullerene) of carbon, is a monolayer of honeycomb lattice of carbon atoms discovered in 2004. The Nobel Prize in Physics 2010 was awarded to Andre Geim and Konstantin Novoselov for their ground breaking experiments on the twodimensional graphene [1]. Since its discovery, the research communities have shown a lot of interest in this novel material owing to its unique properties. As shown in Figure 1, the number of publications on graphene has dramatically increased in recent years. It has been confirmed that graphene possesses very peculiar electrical properties such as anomalous quantum hall effect, and high electron mobility at room temperature (250000 cm2/Vs). Graphene is also one of the stiffest (modulus ~1 TPa) and strongest (strength ~100 GPa) materials. In addition, it has exceptional thermal conductivity (5000 Wm-1K-1). Based on these exceptional properties, graphene has found its applications in various fields such as field effect devices, sensors, electrodes, solar cells, energy storage devices and nanocomposites. Only adding 1 volume per cent graphene into polymer (e.g. polystyrene), the nanocomposite has a conductivity of ~0.1 Sm-1 [2], sufficient for many electrical applications. Significant improvement in strength, fracture toughness and fatigue strength has also been achieved in these nanocomposites [3-5]. Therefore, graphene-polymer nanocomposites have demonstrated a great potential to serve as next generation functional or structural materials.

Numerical Modelling of Mechanical Behaviour of Graphene

Graphene, one of the allotropes (diamond, carbon nanotube, and fullerene) of element carbon, is a monolayer of honeycomb lattice of carbon atoms, which was discovered in 2004. The Nobel Prize in Physics 2010 was awarded to Andre Geim and Konstantin Novoselov for their ground breaking work on the two-dimensional (2D) graphene [1]. Since its discovery, the research communities have shown a lot of interest in this novel material owing to its intriguing electrical, mechanical and thermal properties. It has been confirmed that grapheme possesses very peculiar electrical properties such as anomalous quantum hall effect, and high electron mobility at room temperature (250000 cm2/Vs). Graphene also has exceptional mechanical properties. It is one of the stiffest (modulus ~1 TPa) and strongest (strength ~100 GPa) materials. In addition, it has exceptional thermal conductivity (5000 Wm-1K-1). Due to these exceptional properties, graphene has demonstrated its potential for broad applications in micro and nano devices, various sensors, electrodes, solar cells and energy storage devices and nanocomposites. In particular, the excellent mechanical properties of graphene make it more attractive for development next generation nanocomposites and hybrid materials...

Rapid and highly efficient growth of graphene on copper by chemical vapor deposition of ethanol

The growth of graphene by chemical vapor deposition on metal foils is a promising technique to deliver large-area films with high electron mobility. Nowadays, the chemical vapor deposition of hydrocarbons on copper is the most investigated synthesis method, although many other carbon precursors and metal substrates are used too. Among these, ethanol is a safe and inexpensive precursor that seems to offer favorable synthesis kinetics. We explored the growth of graphene on copper from ethanol, focusing on processes of short duration (up to one min). We investigated the produced films by electron microscopy, Raman and X-ray photoemission spectroscopy. A graphene film with high crystalline quality was found to cover the entire copper catalyst substrate in just 20 s, making ethanol appear as a more efficient carbon feedstock than methane and other commonly used precursors.

Structurally stabilized mesoporous TiO2 nanofibres for efficient dye-sensitized solar cells

One-dimensional (1D) TiO2 nanostructures are very desirable for providing fascinating properties and features, such as high electron mobility, quantum confinement effects, and high specific surface area. Herein, 1D mesoporous TiO2 nanofibres were prepared using the electrospinning method to verify their potential for use as the photoelectrode of dye-sensitized solar cells (DSSCs). The 1D mesoporous nanofibres, 300 nm in diameter and 10-20 μm in length, were aggregated from anatase nanoparticles 20-30 nm in size. The employment of these novel 1D mesoporous nanofibres significantly improved dye loading and light scattering of the DSSC photoanode, and resulted in conversion cell efficiency of 8.14%, corresponding to an ∼35% enhancement over the Degussa P25 reference photoanode.

Continually adjustable oriented 1D TiO2 nanostructure arrays with controlled growth of morphology and their application in dye-sensitized solar cells

Oriented, single-crystalline, one-dimensional (1D) TiO2 nanostructures would be most desirable for providing fascinating properties and features, such as high electron mobility or quantum confinement effects, high specific surface area, and even high mechanical strength, but achieving these structures has been limited by the availability of synthetic techniques. In this study, a concept for precisely controlling the morphology of 1D TiO2 nanostructures by tuning the hydrolysis rate of titanium precursors is proposed. Based on this innovation, oriented 1D rutile TiO2 nanostructure arrays with continually adjustable morphologies, from nanorods (NRODs) to nanoribbons (NRIBs), and then nanowires (NWs), as well as the transient state morphologies, were successfully synthesized. The proposed method is a significant finding in terms of controlling the morphology of the 1D TiO2 nano-architectures, which leads to significant changes in their band structures. It is worth noting that the synthesized rutile NRIBs and NWs have a comparable bandgap and conduction band edge height to those of the anatase phase, which in turn enhances their photochemical activity. In photovoltaic performance tests, the photoanode constructed from the oriented NRIB arrays possesses not only a high surface area for sufficient dye loading and better light scattering in the visible light range than for the other morphologies, but also a wider bandgap and higher conduction band edge, with more than 200% improvement in power conversion efficiency in dye-sensitized solar cells (DSCs) compared with NROD morphology.

Estimation of background carrier concentration in fully depleted GaN films

Buffer leakage is an important parasitic loss mechanism in AlGaN/GaN high electron mobility transistors (HEMTs) and hence various methods are employed to grow semi-insulating buffer layers. Quantification of carrier concentration in such buffers using conventional capacitance based profiling techniques is challenging due to their fully depleted nature even at zero bias voltages. We provide a simple and effective model to extract carrier concentrations in fully depleted GaN films using capacitance-voltage (C-V) measurements. Extensive mercury probe C-V profiling has been performed on GaN films of differing thicknesses and doping levels in order to validate this model. Carrier concentrations as extracted from both the conventional C-V technique for partially depleted films having the same doping concentration, and Hall measurements show excellent agreement with those predicted by the proposed model thus establishing the utility of this technique. This model can be readily extended to estimate background carrier concentrations from the depletion region capacitances of HEMT structures and fully depleted films of any class of semiconductor materials.

New technologies driving decade-bandwidth radio astronomy : quad-ridged flared horn and compound-semiconductor LNAs

Among the branches of astronomy, radio astronomy is unique in that it spans the largest portion of the electromagnetic spectrum, e.g., from about 10 MHz to 300 GHz. On the other hand, due to scientific priorities as well as technological limitations, radio astronomy receivers have traditionally covered only about an octave bandwidth. This approach of "one specialized receiver for one primary science goal" is, however, not only becoming too expensive for next-generation radio telescopes comprising thousands of small antennas, but also is inadequate to answer some of the scientific questions of today which require simultaneous coverage of very large bandwidths.

This thesis presents significant improvements on the state of the art of two key receiver components in pursuit of decade-bandwidth radio astronomy: 1) reflector feed antennas; 2) low-noise amplifiers on compound-semiconductor technologies. The first part of this thesis introduces the quadruple-ridged flared horn, a flexible, dual linear-polarization reflector feed antenna that achieves 5:1-7:1 frequency bandwidths while maintaining near-constant beamwidth. The horn is unique in that it is the only wideband feed antenna suitable for radio astronomy that: 1) can be designed to have nominal 10 dB beamwidth between 30 and 150 degrees; 2) requires one single-ended 50 Ohm low-noise amplifier per polarization. Design, analysis, and measurements of several quad-ridged horns are presented to demonstrate its feasibility and flexibility.

The second part of the thesis focuses on modeling and measurements of discrete high-electron mobility transistors (HEMTs) and their applications in wideband, extremely low-noise amplifiers. The transistors and microwave monolithic integrated circuit low-noise amplifiers described herein have been fabricated on two state-of-the-art HEMT processes: 1) 35 nm indium phosphide; 2) 70 nm gallium arsenide. DC and microwave performance of transistors from both processes at room and cryogenic temperatures are included, as well as first-reported measurements of detailed noise characterization of the sub-micron HEMTs at both temperatures. Design and measurements of two low-noise amplifiers covering 1--20 and 8—50 GHz fabricated on both processes are also provided, which show that the 1--20 GHz amplifier improves the state of the art in cryogenic noise and bandwidth, while the 8--50 GHz amplifier achieves noise performance only slightly worse than the best published results but does so with nearly a decade bandwidth.