Integració 3D de detectors de píxels híbrids

La miniaturització de la industria microelectrònica és un fet del tot inqüestionables i la tecnologia CMOS no n'és una excepció. En conseqüència la comunitat científica s'ha plantejat dos grans reptes: En primer lloc portar la tecnologia CMOS el més lluny possible ('Beyond CMOS') tot desenvolupant sistemes d'altes prestacions com microprocessadors, micro - nanosistemes o bé sistemes de píxels. I en segon lloc encetar una nova generació electrònica basada en tecnologies totalment diferents dins l'àmbit de les Nanotecnologies. Tots aquests avanços exigeixen una recerca i innovació constant en la resta d'àrees complementaries com són les d'encapsulat. L'encapsulat ha de satisfer bàsicament tres funcions: Interfície elèctrica del sistema amb l'exterior, Proporcionar un suport mecànic al sistema i Proporcionar un camí de dissipació de calor. Per tant, si tenim en compte que la majoria d'aquests dispositius d'altes prestacions demanden un alt nombre d'entrades i sortides, els mòduls multixip (MCMs) i la tecnologia flip chip es presenten com una solució molt interessant per aquests tipus de dispositiu. L'objectiu d'aquesta tesi és la de desenvolupar una tecnologia de mòduls multixip basada en interconnexions flip chip per a la integració de detectors de píxels híbrids, que inclou: 1) El desenvolupament d'una tecnologia de bumping basada en bumps de soldadura Sn/Ag eutèctics dipositats per electrodeposició amb un pitch de 50µm, i 2) El desenvolupament d'una tecnologia de vies d'or en silici que permet interconnectar i apilar xips verticalment (3D packaging) amb un pitch de 100µm. Finalment aquesta alta capacitat d'interconnexió dels encapsulats flip chip ha permès que sistemes de píxels tradicionalment monolítics puguin evolucionar cap a sistemes híbrids més compactes i complexes, i que en aquesta tesi s'ha vist reflectit transferint la tecnologia desenvolupada al camp de la física d'altes energies, en concret implantant el sistema de bump bonding d'un mamògraf digital. Addicionalment s'ha implantat també un dispositiu detector híbrid modular per a la reconstrucció d'imatges 3D en temps real, que ha donat lloc a una patent.

A Parallel Hardware Architecture for Scale and Rotation Invariant Feature Detection

This paper proposes a parallel hardware architecture for image feature detection based on the Scale Invariant Feature Transform algorithm and applied to the Simultaneous Localization And Mapping problem. The work also proposes specific hardware optimizations considered fundamental to embed such a robotic control system on-a-chip. The proposed architecture is completely stand-alone; it reads the input data directly from a CMOS image sensor and provides the results via a field-programmable gate array coupled to an embedded processor. The results may either be used directly in an on-chip application or accessed through an Ethernet connection. The system is able to detect features up to 30 frames per second (320 x 240 pixels) and has accuracy similar to a PC-based implementation. The achieved system performance is at least one order of magnitude better than a PC-based solution, a result achieved by investigating the impact of several hardware-orientated optimizations oil performance, area and accuracy.

Design of boundary-scan testing in CMOS image sensors for industrial applications: internship repor

Tests on printed circuit boards and integrated circuits are widely used in industry,resulting in reduced design time and cost of a project. The functional and connectivity tests in this type of circuits soon began to be a concern for the manufacturers, leading to research for solutions that would allow a reliable, quick, cheap and universal solution. Initially, using test schemes were based on a set of needles that was connected to inputs and outputs of the integrated circuit board (bed-of-nails), to which signals were applied, in order to verify whether the circuit was according to the specifications and could be assembled in the production line. With the development of projects, circuit miniaturization, improvement of the production processes, improvement of the materials used, as well as the increase in the number of circuits, it was necessary to search for another solution. Thus Boundary-Scan Testing was developed which operates on the border of integrated circuits and allows testing the connectivity of the input and the output ports of a circuit. The Boundary-Scan Testing method was converted into a standard, in 1990, by the IEEE organization, being known as the IEEE 1149.1 Standard. Since then a large number of manufacturers have adopted this standard in their products. This master thesis has, as main objective: the design of Boundary-Scan Testing in an image sensor in CMOS technology, analyzing the standard requirements, the process used in the prototype production, developing the design and layout of Boundary-Scan and analyzing obtained results after production. Chapter 1 presents briefly the evolution of testing procedures used in industry, developments and applications of image sensors and the motivation for the use of architecture Boundary-Scan Testing. Chapter 2 explores the fundamentals of Boundary-Scan Testing and image sensors, starting with the Boundary-Scan architecture defined in the Standard, where functional blocks are analyzed. This understanding is necessary to implement the design on an image sensor. It also explains the architecture of image sensors currently used, focusing on sensors with a large number of inputs and outputs.Chapter 3 describes the design of the Boundary-Scan implemented and starts to analyse the design and functions of the prototype, the used software, the designs and simulations of the functional blocks of the Boundary-Scan implemented. Chapter 4 presents the layout process used based on the design developed on chapter 3, describing the software used for this purpose, the planning of the layout location (floorplan) and its dimensions, the layout of individual blocks, checks in terms of layout rules, the comparison with the final design and finally the simulation. Chapter 5 describes how the functional tests were performed to verify the design compliancy with the specifications of Standard IEEE 1149.1. These tests were focused on the application of signals to input and output ports of the produced prototype. Chapter 6 presents the conclusions that were taken throughout the execution of the work.

Pixel intensity and fractal analyses: detecting osteoporosis in perimenopausal and postmenopausal women by using digital panoramic images

Objective. Pixel intensity values (PI) and fractal dimensions (FD) were compared in selected mandibular regions on digital panoramic images of normal, osteopenic, and osteoporotic perimenopausal and postmenopausal women to evaluate their relative efficacies in detecting osteoporotic-associated bone density changes.Study design. Standardized mandibular angle, body, and canine/premolar (C/PM) regions on 54 charge-coupied device (CCD) digital panoramic images of normal and potentially osteoporotic postmenopausal women were analyzed for PI and FD. Lumbar spine and femoral neck dual-energy x-ray absorptiometry QXA) on each patient served as the reference standard examination. Pearson correlation coefficients and analysis of variance (ANOVA) were performed.Results. There was significant correlation among PI measurements (P < 0.01), and no significant correlation between FD. C/PM had significantly lower PI than control C/PM (P = 0.049).Conclusions. Osteoporotic changes in mandibular C/PM cancellous bone were detected in our study population on CCD digital panoramic images by using a robust image analysis paradigm. Future automated application of such image analysis could enable widespread, cost effective screening for osteoporosis in dental settings.

Comparison between embossed digital imaging and unprocessed film-based radiography in detecting periodontal bone defects: an in vitro study

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Digital radiographic evaluation of optical density of porcelains used for fabrication of inlay/onlay prosthesis

The purpose of this article was to compare the mean value of optical density of four porcelains commonly used for fabrication of inlay/ onlay prostheses using direct digital radiograph. The sample consisted of 20 2-mm thick porcelain specimens (measured by digital pachymeter): Empress (Ivoclair), Simbios (Degussa), Vita Omega 900 and Vitadur Alpha (Vita Zahnfabrik). The values of optical density of the specimens were expressed in millimeters aluminum equivalent (mm eq Al). The samples were X-rayed using two charge coupled devices (CCD) - RVG (Trophy) - Visualix (Gendex) and a phosphor plate system - Digora (Soredex). The optical density reading was performed with Image Tool 1.28 in a total of 110 measurements. Statistical analysis showed that there were statistically significant differences in all materials studied (p < 0.05) regardless of the radiographic system used. The highest optical density value was found for Omega 900 (1.8988 mmeqAl - Visualix - Gendex) and the lowest for Vitadur Alpha (0.8647 - Visualix - Gendex). Thus, the material presenting the highest degree of optical density was Omega 900, Empress and Simbios presented intermediate optical density values, Vitadur Alpha presented the lowest value, and the optical density of porcelains was not influenced by the digital radiography systems.

Photodetection with gate-controlled lateral BJTs from standard CMOS technology

The silicon-based gate-controlled lateral bipolar junction transistor (BJT) is a controllable four-terminal photodetector with very high responsivity at low-light intensities. It is a hybrid device composed of a MOSFET, a lateral BJT, and a vertical BJT. Using sufficient gate bias to operate the MOS transistor in inversion mode, the photodetector allows for increasing the photocurrent gain by 106 at low light intensities when the base-emitter voltage is smaller than 0.4 V, and BJT is off. Two operation modes, with constant voltage bias between gate and emitter/source terminals and between gate and base/body terminals, allow for tuning the photoresponse from sublinear to slightly above linear, satisfying the application requirements for wide dynamic range, high-contrast, or linear imaging. MOSFETs from a standard 0.18-μm triple-well complementary-metal oxide semiconductor technology with a width to length ratio of 8 μm /2 μm and a total area of ∼ 500μm2 are used. When using this area, the responsivities are 16-20 kA/W. © 2001-2012 IEEE.

Medicide device

Photograph of the internal mechanism of Medicide device

Image Sensors in Security and Medical Applications

This paper briefly reviews CMOS image sensor technology and its utilization in security and medical applications. The role and future trends of image sensors in each of the applications are discussed. To provide the reader deeper understanding of the technology aspects the paper concentrates on the selected applications such as surveillance, biometrics, capsule endoscopy and artificial retina. The reasons for concentrating on these applications are due to their importance in our daily life and because they present leading-edge applications for imaging systems research and development. In addition, review of image sensors implementation in these applications allows the reader to investigate image sensor technology from the technical and from other views as well.

Mammography equipment

Mammography is one of the most technically demanding examinations in radiology, and it requires X-ray technology designed specifi cally for the task. The pathology to be imaged ranges from small (20–100 μm) high density microcalcifications to ill-defi ned low contrast masses. These must be imaged against a background of mixed densities. This makes demonstrating pathology challenging. Because of its use in asymptomatic screening, mammography must also employ as low a radiation dose as possible.

Aircraft dynamic navigation for unmanned aerial vehicles

This thesis describes the investigation of an Aircraft Dynamic Navigation (ADN) approach, which incorporates an Aircraft Dynamic Model (ADM) directly into the navigation filter of a fixed-wing aircraft or UAV. The result is a novel approach that offers both performance improvements and increased reliability during short-term GPS outages. This is important in allowing future UAVs to achieve routine, unconstrained, and safe operations in commercial environments. The primary contribution of this research is the formulation Unscented Kalman Filter (UKF) which incorporates a complex, non-linear, laterally and longitudinally coupled, ADM, and sensor suite consisting of a Global Positioning System (GPS) receiver, Inertial Measurement Unit (IMU), Electronic Compass (EC), and Air Data (AD) Pitot Static System.

CheepSync: A Time Synchronization Service for Resource Constrained Bluetooth LE Advertisers

Clock synchronization is highly desirable in distributed systems, including many applications in the Internet of Things and Humans. It improves the efficiency, modularity, and scalability of the system, and optimizes use of event triggers. For IoTH, BLE - a subset of the recent Bluetooth v4.0 stack - provides a low-power and loosely coupled mechanism for sensor data collection with ubiquitous units (e.g., smartphones and tablets) carried by humans. This fundamental design paradigm of BLE is enabled by a range of broadcast advertising modes. While its operational benefits are numerous, the lack of a common time reference in the broadcast mode of BLE has been a fundamental limitation. This article presents and describes CheepSync, a time synchronization service for BLE advertisers, especially tailored for applications requiring high time precision on resource constrained BLE platforms. Designed on top of the existing Bluetooth v4.0 standard, the CheepSync framework utilizes low-level time-stamping and comprehensive error compensation mechanisms for overcoming uncertainties in message transmission, clock drift, and other system-specific constraints. CheepSync was implemented on custom designed nRF24Cheep beacon platforms (as broadcasters) and commercial off-the-shelf Android ported smartphones (as passive listeners). We demonstrate the efficacy of CheepSync by numerous empirical evaluations in a variety of experimental setups, and show that its average (single-hop) time synchronization accuracy is in the 10 mu s range.