Cascading appearance-based features for visual speaker verification

The cascading appearance-based (CAB) feature extraction technique has established itself as the state of the art in extracting dynamic visual speech features for speech recognition. In this paper, we will focus on investigating the effectiveness of this technique for the related speaker verification application. By investigating the speaker verification ability of each stage of the cascade we will demonstrate that the same steps taken to reduce static speaker and environmental information for the speech recognition application also provide similar improvements for speaker recognition. These results suggest that visual speaker recognition can improve considerable when conducted solely through a consideration of the dynamic speech information rather than the static appearance of the speaker's mouth region.

Low-cost hardware speech enhancement for improved speech recognition in automotive environments

Voice recognition is one of the key enablers to reduce driver distraction as in-vehicle systems become more and more complex. With the integration of voice recognition in vehicles, safety and usability are improved as the driver’s eyes and hands are not required to operate system controls. Whilst speaker independent voice recognition is well developed, performance in high noise environments (e.g. vehicles) is still limited. La Trobe University and Queensland University of Technology have developed a low-cost hardware-based speech enhancement system for automotive environments based on spectral subtraction and delay–sum beamforming techniques. The enhancement algorithms have been optimised using authentic Australian English collected under typical driving conditions. Performance tests conducted using speech data collected under variety of vehicle noise conditions demonstrate a word recognition rate improvement in the order of 10% or more under the noisiest conditions. Currently developed to a proof of concept stage there is potential for even greater performance improvement.

The Spartan-3E Tutorial 1 : Introduction to FPGA Programming, Version 1.0

This tutorial is designed to help new users become familiar with using the Spartan-3E board. The tutorial steps through the following: writing a small program in VHDL which carries out simple combinational logic; connecting the program inputs and outputs to the switches, buttons and LEDs on the Spartan-3E board; and downloading the program to the Spartan-3E board using the Project Navigator software.

The Spartan-3E Tutorial 2 : Introduction to using the PicoBlaze Microcontroller Version 1.0

This tutorial is designed to help new users become familiar with using the PicoBlaze microcontroller with the Spartan-3E board. The tutorial gives a brief introduction to the PicoBlaze microcontroller, and then steps through the following: - Writing a small PicoBlaze assembly language (.psm) file, and stepping through the process of assembling the .psm file using KCPSM3; - Writing a top level VHDL module to connect the PicoBlaze microcontroller (KCPSM3 component) and the program ROM, and to connect the required input and output ports; - Connecting the top level module inputs and outputs to the switches, buttons and LEDs on the Spartan-3E board; - Downloading the program to the Spartan-3E board using the Project Navigator software.

The Spartan-3E tutorial 3 : using the LCD display [version 1.0]

This tutorial is designed to assist users who wish to use the LCD screen on the Spartan-3E board. In this tutorial, the PicoBlaze microcontroller is used to control the LCD. The tutorial is organised into three Parts. In Part A, code is written to display the message "Hello World" on the LCD. Part B demonstrates how to define and display custom characters. Finally, Part C shows how the display can be shifted and flashed. Shifting is done by using a delay in the main PicoBlaze program loop, while flashing is done using the PicoBlaze interrupt. The slider switches can be used to select the shifting direction, and to turn shifting and flashing on and off.

The Spartan-3E Tutorial 1 : Introduction to FPGA Programming, Version 2.0

This tutorial is designed to help new users become familiar with using the Spartan-3E board. The tutorial steps through: writing a small program in VHDL which carries out simple combinational logic; connecting the program inputs and outputs to the switches, buttons and LEDs on the Spartan-3E board; downloading the program to the Spartan-3E board using version 14.7 of the Xilinx ISE; and simulating the program using the iSim Simulator.

The harnessing of peptide-monolith constructs for single step plasmid DNA purification

The availability of synthetic peptides has paved the way for their use in tailor-made interactions with biomolecules. In this study, a 16mer LacI-based peptide was used as an affinity ligand to examine the scale up feasibility for plasmid DNA purification. First, the peptide was designed and characterized for the affinity purification of lacO containing plasmid DNA, to be employed as a high affinity ligand for the potential capturing of plasmid DNA in a single unit operation. It was found there were no discernible interactions with a control plasmid that did not encode the lacO nucleotide sequence. The dissociation equilibrium constant of the binding between the 16mer peptide and target pUC19 was 5.0 ± 0.5 × 10-8 M as assessed by surface plasmon resonance. This selectivity and moderated affinity indicate that the 16mer is suitable for the adsorption and chromatographic purification of plasmid DNA. The suitability of this peptide was then evaluated using a chromatography system with the 16mer peptide immobilized to a customized monolith to purify plasmid DNA, obtaining preferential purification of supercoiled pUC19. The results demonstrate the applicability of peptide-monolith supports to scale up the purification process for plasmid DNA using designed ligands via a biomimetic approach.

Versatility of polymethacrylate monoliths for chromatographic purification of biomolecules

Polymethacrylate monoliths, specifically poly(glycidyl methacrylate-co-ethylene dimethacrylate) or poly(GMA-co-EDMA) monoliths, are a new generation of chromatographic supports and are significantly different from conventional particle-based adsorbents, membranes, and other monolithic supports for biomolecule purification. Similar to other monoliths, polymethacrylate monoliths possess large pores which allow convective flow of mobile phase and result in high flow rates at reduced pressure drop, unlike particulate supports. The simplicity of the adsorbent synthesis, pH resistance, and the ease and flexibility of tailoring their pore size to that of the target biomolecule are the key properties which differentiate polymethacrylate monoliths from other monoliths. Polymethacrylate monoliths are endowed with reactive epoxy groups for easy functionalization (with anion-exchange, hydrophobic, and affinity ligands) and high ligand retention. In this review, the structure and performance of polymethacrylate monoliths for chromatographic purification of biomolecules are evaluated and compared to those of other supports. The development and use of polymethacrylate monoliths for research applications have grown rapidly in recent times and have enabled the achievement of high through-put biomolecule purification on semi-preparative and preparative scales.

Within-Die Gate Delay Variability Measurement using Re-configurable Ring Oscillator

We report a circuit technique to measure the on-chip delay of an individual logic gate (both inverting and non-inverting) in its unmodified form using digitally reconfigurable ring oscillator (RO). Solving a system of linear equations with different configuration setting of the RO gives delay of an individual gate. Experimental results from a test chip in 65nm process node show the feasibility of measuring the delay of an individual inverter to within 1pS accuracy. Delay measurements of different nominally identical inverters in close physical proximity show variations of up to 26% indicating the large impact of local or within-die variations.

Novel CMOS Schmitt trigger

A novel CMOS Schmitt trigger using only four MOS transistors is discussed. This circuit, which works on the principle of load-coupled regenerative feedback, can be implemented using conventional CMOS technology with only one extra fabrication step. It can be implemented even more easily in CMOS/SOS (silicon-on-sapphire) integrated circuits. The hysteresis of this Schmitt trigger can be controlled by a proper choice of the transistor geometries.

Time-Domain Measurement of Voltage Induction by Transient EM Fields

An efficient measurement technique for studying the effect of transient electromagnetic fields under controlled conditions has been described. Broad-band TEM fields with a rise-time of a few nanoseconds were generated using a stripline method. Theoretical results are obtained and experimental measurements which confirm these results are described. The work will form the basis for a study of the susceptibility of digital integrated circuits and their interconnections to transient electromagnetic fields.

Linear transconductor with flipped voltage follower in 130 nm CMOS

This paper presents a modified design method for linear transconductor circuit in 130 nm CMOS technology to improve linearity, robustness against process induced threshold voltage variability and reduce harmonic distortion. Source follower in the adaptively biased differential pair (ABDP) linear transconductor circuit is replaced with flipped voltage follower to improve the efficiency of the tail current source, which is connected to a conventional differential pair. The simulation results show the performance of the modified circuit also has better speed, noise performance and common mode rejection ratio compared to the ABDP circuit.