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Pós-graduação em Engenharia Elétrica - FEIS

Modeling multiple state electrostatically formed nanowire transistors

The present thesis work proposes a new physical equivalent circuit model for a recently proposed semiconductor transistor, a 2-drain MSET (Multiple State Electrostatically Formed Nanowire Transistor). It presents a new software-based experimental setup that has been developed for carrying out numerical simulations on the device and on equivalent circuits. As of 2015, we have already approached the scaling limits of the ubiquitous CMOS technology that has been in the forefront of mainstream technological advancement, so many researchers are exploring different ideas in the realm of electrical devices for logical applications, among them MSET transistors. The idea that underlies MSETs is that a single multiple-terminal device could replace many traditional transistors. In particular a 2-drain MSET is akin to a silicon multiplexer, consisting in a Junction FET with independent gates, but with a split drain, so that a voltage-controlled conductive path can connect either of the drains to the source. The first chapter of this work presents the theory of classical JFETs and its common equivalent circuit models. The physical model and its derivation are presented, the current state of equivalent circuits for the JFET is discussed. A physical model of a JFET with two independent gates has been developed, deriving it from previous results, and is presented at the end of the chapter. A review of the characteristics of MSET device is shown in chapter 2. In this chapter, the proposed physical model and its formulation are presented. A listing for the SPICE model was attached as an appendix at the end of this document. Chapter 3 concerns the results of the numerical simulations on the device. At first the research for a suitable geometry is discussed and then comparisons between results from finite-elements simulations and equivalent circuit runs are made. Where points of challenging divergence were found between the two numerical results, the relevant physical processes are discussed. In the fourth chapter the experimental setup is discussed. The GUI-based environments that allow to explore the four-dimensional solution space and to analyze the physical variables inside the device are described. It is shown how this software project has been structured to overcome technical challenges in structuring multiple simulations in sequence, and to provide for a flexible platform for future research in the field.

Simulation of the transmission performance for equalized holographic ROADM designs

A complete simulation of the transmission performance for Equalized Holographic ROADM (Reconfigurable Optical Add-Drop Multiplexer) designs is presented in this paper. These devices can address several wavelengths from the input to different output fibres, according to the holograms stored in a SLM (Spatial Light Modulator), where all the outputs are equalized in power. All combinations of the input wavelengths are possible at the different output fibres. To simulate the transmission performance of the EH-ROADM, a software program, from Optiwave, has been used. The correspondence between physical blocks of the device (grating, SLM, lens...) and those simulated in the program (filters, losses, splitters...) has been defined in order to obtain a close agreement between the theoretical transmission performance and the simulated one. To complete the review about Equalized Holographic ROADMs some guidelines about its design have been done.

Design of equalized ROADMs devices with flexible bandwidth based on LCoS technology

This paper describes the theory, design, applications and performance of a new Reconfigurable Add-drop Multiplexer (ROADM) with flexible bandwidth allocation. The device can address several wavelengths at the input to four output fibers, according to the holograms stored in a SLM (Spatial Light Modulator), where all the outputs are equalized in power. All combinations of the input wavelengths are possible at the different output fibers. Each fiber has assigned all the signals with the same bandwidth; the possible bandwidths are 12.5GHz, 25GHz, 50GHz and 100GHz, according to ITU-T 694.1 Recommendation. It is possible to route several signals with different bandwidth in real time thanks to Liquid Crystal over Silicon (LCoS) technology.

Analysis of signal impairment and crosstalk penalty induced by different types of optical filters in 100 Gbps PM-DQPSK based systems

Optical filters are crucial elements in optical communication networks. Their influence toward the optical signal will affect the communication quality seriously. In this paper we will study and simulate the optical signal impairment and crosstalk penalty caused by different kinds of filters, which include Butterworth, Bessel, Fiber Bragg Grating (FBG) and Fabry-Perot (F-P). Signal impairment from filter concatenation effect and crosstalk penalty from out-band and in-band are analyzed from Q-penalty, eye opening penalty (EOP) and optical spectrum. The simulation results show that signal impairment and crosstalk penalty induced by the Butterworth filter is the minimum among these four types of filters. Signal impairment caused by filter concatenation effect shows that when center frequency of all filters is aligned perfectly with the laser's frequency, 12 50-GHz Butterworth filters can be cascaded, with 1-dB EOP. This value is reduced to 9 when the center frequency is misaligned with 5 GHz. In the 50-GHz channel spacing DWDM networks, total Q-penalty induced by a pair of Butterworth filters based demultiplexer and multiplexer is lower than 0.5 dB when the filter bandwidth is in the range of 42-46 GHz.

Writing and characterisation methods for UV-photosensitivity based devices and their applications

The underlying work to this thesis focused on the exploitation and investigation of photosensitivity mechanisms in optical fibres and planar waveguides for the fabrication of advanced integrated optical devices for telecoms and sensing applications. One major scope is the improvement of grating fabrication specifications by introducing new writing techniques and the use of advanced characterisation methods for grating testing. For the first time the polarisation control method for advanced grating fabrication has successfully been converted to apodised planar waveguide fabrication and the development of a holographic method for the inscription of chirped gratings at arbitrary wavelength is presented. The latter resulted in the fabrication of gratings for pulse-width suppression and wavelength selection in diode lasers. In co-operation with research partners a number of samples were tested using optical frequency domain and optical low coherence reflectometry for a better insight into the limitations of grating writing techniques. Using a variety of different fabrication methods, custom apodised and chirped fibre Bragg gratings were written for the use as filter elements for multiplexer-demultiplexer devices, as well as for short pulse generation and wavelength selection in telecommunication transmission systems. Long period grating based devices in standard, speciality and tapered fibres are presented, showing great potential for multi-parameter sensing. One particular scope is the development of vectorial curvature and refractive index sensors with potential for medical, chemical and biological sensing. In addition the design of an optically tunable Mach-Zehnder based multiwavelength filter is introduced. The discovery of a Type IA grating type through overexposure of hydrogen loaded standard and Boron-Germanium co-doped fibres strengthened the assumption of UV-photosensitivity being a highly non-linear process. Gratings of this type show a significantly lower thermal sensitivity compared to standard gratings, which makes them useful for sensing applications. An Oxford Lasers copper-vapour laser operating at 255 nm in pulsed mode was used for their inscription, in contrast to previous work using CW-Argon-Ion lasers and contributing to differences in the processes of the photorefractive index change

Nonlinear and ROADM induced penalties in 28 Gbaud dynamic optical mesh networks employing electronic signal processing

We report the impact of cascaded reconfigurable optical add-drop multiplexer induced penalties on coherently-detected 28 Gbaud polarization multiplexed m-ary quadrature amplitude modulation (PM m-ary QAM) WDM channels. We investigate the interplay between different higher-order modulation channels and the effect of filter shapes and bandwidth of (de)multiplexers on the transmission performance, in a segment of pan-European optical network with a maximum optical path of 4,560 km (80km x 57 spans). We verify that if the link capacities are assigned assuming that digital back propagation is available, 25% of the network connections fail using electronic dispersion compensation alone. However, majority of such links can indeed be restored by employing single-channel digital back-propagation employing less than 15 steps for the whole link, facilitating practical application of DBP. We report that higher-order channels are most sensitive to nonlinear fiber impairments and filtering effects, however these formats are less prone to ROADM induced penalties due to the reduced maximum number of hops. Furthermore, it has been demonstrated that a minimum filter Gaussian order of 3 and bandwidth of 35 GHz enable negligible excess penalty for any modulation order.

73.7 Tb/s (96 x 3 x 256-Gb/s) mode-division-multiplexed DP-16QAM transmission with inline MM-EDFA

Transmission of a 73.7 Tb/s (96x3x256-Gb/s) DP-16QAM mode-division-multiplexed signal over 119km of few-mode fiber transmission line incorporating an inline multi mode EDFA and a phase plate based mode (de-)multiplexer is demonstrated. Data-aided 6x6 MIMO digital signal processing was used to demodulate the signal. The total demonstrated net capacity, taking into account 20% of FEC-overhead and 7.5% additional overhead (Ethernet and training sequences), is 57.6 Tb/s, corresponding to a spectral efficiency of 12 bits/s/Hz.

Robustness of 40 Gb/s ASK modulation formats in the practical system infrastructure

In this work, we analyzed by means of numerical and laboratory experiments the resilience of 40 Gb/s amplitude shift keying modulation formats to transmission impairments in standard single-mode fiber lines as well as to optical filtering introduced by the optical add/drop multiplexer cascade. Our study is a pre-requisite to assess the implementation of cost-effective 40 Gb/s modulation technology in next generation high bit-rate robust optical transport networks.

73.7 Tb/s (96 x 3 x 256-Gb/s) mode-divisionmultiplexed DP-16QAM transmission with inline MM-EDFA

Transmission of a 73.7 Tb/s (96x3x256-Gb/s) DP-16QAM mode-division- multiplexed signal over 119km of few-mode fiber transmission line incorporating an inline multi mode EDFA and a phase plate based mode (de-)multiplexer is demonstrated. Data-aided 6x6 MIMO digital signal processing was used to demodulate the signal. The total demonstrated net capacity, taking into account 20% of FEC-overhead and 7.5% additional overhead (Ethernet and training sequences), is 57.6 Tb/s, corresponding to a spectral efficiency of 12 bits/s/Hz. © 2012 Optical Society of America.

Robustness of 40 Gb/s ASK modulation formats in the practical system infrastructure

In this work, we analyzed by means of numerical and laboratory experiments the resilience of 40 Gb/s amplitude shift keying modulation formats to transmission impairments in standard single-mode fiber lines as well as to optical filtering introduced by the optical add/drop multiplexer cascade. Our study is a pre-requisite to assess the implementation of cost-effective 40 Gb/s modulation technology in next generation high bit-rate robust optical transport networks. © 2006 Optical Society of America.

All-optical add-drop multiplexing of OFDM signals

We discuss the recently proposed architecture for an all-optical add-drop multiplexer of OFDM signals and we summarize the results of its theoretical design and experimental implementation. © 2015 OSA.

Polarization dynamics of bound state solitons in a carbon nanotubes mode locked erbium doped fiber laser

Optical solitons are important in the modern photonics. Passively mode locked erbium doped fiber lasers provide a neat platform to study soliton dynamics. Soliton interaction dynamics is important for various applications and has quite different manifestations, including e.g. such as bound state solitons [1], soliton rains [2]. Soliton interactions have been observed with different mode locking approaches such as figure-of-eight [3] and nonlinear polarization rotation [4]. Carbon nanotubes (CNT) have recently been widely applied as an efficient saturable absorber for passively mode locked fiber lasers. We have recently studied the polarization dynamics in a CNT mode locked vector soliton erbium doped fiber laser [5]. So far, the polarization dynamics of bound state solitons have yet to be investigated. In this report, we present a wide range of polarization dynamics of bound state solitons generated in a CNT mode locked erbium doped fiber laser. The fiber laser consists of ∼ 2 m highly doped erbium fiber (Liekki Er80-8/125) as the gain medium, an optical isolator to ensure unidirectional oscillation anda 980 nm laser diode is used to pump the gain through the 1550/980 nm wavelength division multiplexer. A fused 10:90 coupler is used to couple 10 % of the light out of the laser cavity and two in-line polarization controllers (NewPort) are used to control the birefringence of the cavity and polarization of the pump light respectively. The total cavity length is ∼ 7.8 m indicating a 25.7 MHz fundamental repetition rate. © 2013 IEEE.

Five channel WDM communication using a single a:SiC-H double pin photo device

Amorphous SiC heterostructures built as a double pin device has a non linear spectral gain which is a function of the signal wavelength that impinges on its front or back surface. Illuminating the device with several single wavelength data channels in the visible spectrum allows for Wavelength Division Multiplexing (WDM) digital communication. Using fixed ultra-violet illumination at the front or back surfaces enables the recovery of the multiplexed channels. Five channels, each using a single wavelength which is modulated by a Manchester coded signal at 12,000 bps, form a frame with 1024 bits with a preamble for signal intensity and synchronisation purposes. Results show that the clustering of the received signal enables the successful recovery of the five channel data using the front and back illumination of the surfaces of the double pin photo device. (C) 2015 Elsevier B.V. All rights reserved.

Security through Obscurity: Layout Obfuscation of Digital Integrated Circuits using Don't Care Conditions

Contemporary integrated circuits are designed and manufactured in a globalized environment leading to concerns of piracy, overproduction and counterfeiting. One class of techniques to combat these threats is circuit obfuscation which seeks to modify the gate-level (or structural) description of a circuit without affecting its functionality in order to increase the complexity and cost of reverse engineering. Most of the existing circuit obfuscation methods are based on the insertion of additional logic (called “key gates”) or camouflaging existing gates in order to make it difficult for a malicious user to get the complete layout information without extensive computations to determine key-gate values. However, when the netlist or the circuit layout, although camouflaged, is available to the attacker, he/she can use advanced logic analysis and circuit simulation tools and Boolean SAT solvers to reveal the unknown gate-level information without exhaustively trying all the input vectors, thus bringing down the complexity of reverse engineering. To counter this problem, some ‘provably secure’ logic encryption algorithms that emphasize methodical selection of camouflaged gates have been proposed previously in literature [1,2,3]. The contribution of this paper is the creation and simulation of a new layout obfuscation method that uses don't care conditions. We also present proof-of-concept of a new functional or logic obfuscation technique that not only conceals, but modifies the circuit functionality in addition to the gate-level description, and can be implemented automatically during the design process. Our layout obfuscation technique utilizes don’t care conditions (namely, Observability and Satisfiability Don’t Cares) inherent in the circuit to camouflage selected gates and modify sub-circuit functionality while meeting the overall circuit specification. Here, camouflaging or obfuscating a gate means replacing the candidate gate by a 4X1 Multiplexer which can be configured to perform all possible 2-input/ 1-output functions as proposed by Bao et al. [4]. It is important to emphasize that our approach not only obfuscates but alters sub-circuit level functionality in an attempt to make IP piracy difficult. The choice of gates to obfuscate determines the effort required to reverse engineer or brute force the design. As such, we propose a method of camouflaged gate selection based on the intersection of output logic cones. By choosing these candidate gates methodically, the complexity of reverse engineering can be made exponential, thus making it computationally very expensive to determine the true circuit functionality. We propose several heuristic algorithms to maximize the RE complexity based on don’t care based obfuscation and methodical gate selection. Thus, the goal of protecting the design IP from malicious end-users is achieved. It also makes it significantly harder for rogue elements in the supply chain to use, copy or replicate the same design with a different logic. We analyze the reverse engineering complexity by applying our obfuscation algorithm on ISCAS-85 benchmarks. Our experimental results indicate that significant reverse engineering complexity can be achieved at minimal design overhead (average area overhead for the proposed layout obfuscation methods is 5.51% and average delay overhead is about 7.732%). We discuss the strengths and limitations of our approach and suggest directions that may lead to improved logic encryption algorithms in the future. References: [1] R. Chakraborty and S. Bhunia, “HARPOON: An Obfuscation-Based SoC Design Methodology for Hardware Protection,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 28, no. 10, pp. 1493–1502, 2009. [2] J. A. Roy, F. Koushanfar, and I. L. Markov, “EPIC: Ending Piracy of Integrated Circuits,” in 2008 Design, Automation and Test in Europe, 2008, pp. 1069–1074. [3] J. Rajendran, M. Sam, O. Sinanoglu, and R. Karri, “Security Analysis of Integrated Circuit Camouflaging,” ACM Conference on Computer Communications and Security, 2013. [4] Bao Liu, Wang, B., "Embedded reconfigurable logic for ASIC design obfuscation against supply chain attacks,"Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014 , vol., no., pp.1,6, 24-28 March 2014.