On designing linearly-tunable ultra-low voltage CMOS gm-C filters

A linearly-tunable ULV transconductor featuring excellent stability of the processed signal common-mode voltage upon tuning, critical for very-low voltage applications, is presented. Its employment to the synthesis of CMOS gm-C high-frequency and voiceband filters is discussed. SPICE data describe the filter characteristics. For a 1.3 V-supply, their nominal passband frequencies are 1.0 MHz and 3.78 KHz, respectively, with tuning rates of 12.52 KHz/mV and 0.16 KHz/m V, input-referred noise spectral density of 1.3 μV/Hz1/2 and 5.0μV/Hz1/2 and standby consumption of 0.87 mW and 11.8 μW. Large-signal distortion given by THD = 1% corresponds to a differential output-swing of 360 mVpp and 480 mVpp, respectively. Common-mode voltage deviation is less than 4 mV over tuning interval.

An accurate low-voltage analog memory-cell with built-in multiplication

A CMOS memory-cell for dynamic storage of analog data and suitable for LVLP applications is proposed. Information is memorized as the gate-voltage of input-transistor of a gain-boosting triode-transconductor. The enhanced output-resistance improves accuracy on reading out the sampled currents. Additionally, a four-quadrant multiplication between the input to regulation-amplifier of the transconductor and the stored voltage is provided. Designing complies with a low-voltage 1.2μm N-well CMOS fabrication process. For a 1.3V-supply, CCELL=3.6pF and sampling interval is 0.25μA≤ ISAMPLE ≤ 0.75μA. The specified retention time is 1.28ms and corresponds to a charge-variation of 1% due to junction leakage @75°C. A range of MR simulations confirm circuit performance. Absolute read-out error is below O.40% while the four-quadrant multiplier nonlinearity, at full-scale is 8.2%. Maximum stand-by consumption is 3.6μW/cell.

A low-voltage programmable-gain CMOS amplifier with very-low temperature-drift

A new topology for a LVLP variable-gain CMOS amplifier is presented. Input- and load-stage are built around triode-transconductors so that voltage-gain is fully defined by a linear relationship involving only device-geometries and biases. Excellent gain-accuracy, temperature-insensitivity; and wide range of programmability, are thus achieved. Moreover, adaptative biasing improves the common-mode voltage stability upon gain-adjusting. As an example, a 0-40dB programmablegain audio-amplifier is designed. Its performance is supported by a range of simulations. For VDD=1.8V and 20dB-nominal gain, one has Av=19.97dB, f3db=770KHz and quiescent dissipation of 378μW. Over temperatures from -25°C to 125°C, the 0. ldB-bandwidth is 52KHz. Dynamic-range is optimized to 57.2dB and 42.6dB for gains of 20dB and 40dB, respectively. THD figures correspond to -60.6dB@Vout= 1Vpp and -79.7dB@Vout= 0.5 Vpp. A nearly constant bandwidth for different gains is also attained.

A low-voltage triode-MOSFET four-quadrant multiplier with optimized current-efficiency

A low-voltage, low-power four-quadrant analog multiplier with optimized current-efficiency is presented. Its core corresponds to a pseudodifferential cascode, gain-boosting triode-transconductor. According to a low-voltage 1.2μm CMOS n-well process, operand differential-amplitudes are 1.0Vpp and 0.32Vpp for a 1.3V-supply. Common-mode voltages are properly chosen to maximize current-efficiency to 58%. Total quiescent dissipation is 260μW. A range of PSPICE simulation supports theoretical analysis. Excellent linearity is observed on dc characteristic. Assuming a ±0.5% mismatch on (W/L) and VTH THD at full-scale is 0.93% and 1.42%, for output frequencies of 1MHz and 10MHz, respectively.

A linearly-tunable OTA-C sinusoidal oscillator for low-voltage applications

A low-voltage, low-power OTA-C sinusoidal oscillator based on a triode-MOSFET transconductor is here discussed. The classical quadrature model is employed and the transconductor inherent nonlinear characteristic with input voltage is used as the amplitude-stabilization element. An external bias VTUNE linearly adjusts the oscillation frequency. According to a standard 0.8μm CMOS n-well process, a prototype was integrated, with an effective area of 0.28mm2. Experimental data validate the theoretical analysis. For a single 1.8V-supply and 100mV≤VTUNE≤250mV, the oscillation frequency fo ranges from 0.50MHz to 1.125MHz, with a nearly constant gain KVCO=4.16KHz/mV. Maximum output amplitude is 374mVpp @1.12MHz. THD is -41dB @321mVpp. Maximum average consumption is 355μW.

A low-voltage programmable-gain current-mode amplifier

A CMOS low-voltage, wide-band continuous-time current amplifier is presented. Based on an open-loop topology, the circuit is composed by transresistance and transconductance stages built around triode-operating transistors. In addition to an extended dynamic range, the amplifier gain can be programmed within good accuracy by the rapport between the aspect-ratio of such transistors and tuning biases Vxand Vy. A balanced current-amplifier according to a single I. IV-supply and a 0.35μm fabrication process is designed. Simulated results from PSPiCE and Bsm3v3 models indicate a programmable gain within the range 20-34dB and a minimum break-frequency of IMHz @CL=IpF. For a 200 μApp-level, THD is 0.8% and 0.9% at IKHz and 100KHz, respectively. Input noise is 405pA√Hz @20dB-gain, which gives a SNR of 66dB @1MHz-bandwidth. Maximum quiescent power consumption is 56μ W. © 2002 IEEE.

An active leakage-injection scheme applied to low-voltage SRAMs

An active leakage-injection scheme (ALIS) for low-voltage (LV) high-density (HD) SRAMs is presented. By means of a feedback loop comprising a servo-amplifier and a common-drain MOSFET, a current matching the respective bit-line leakage is injected onto the line during precharge and sensing, preventing the respective capacitances from erroneous discharges. The technique is able to handle leakages up to hundreds of μA at high operating temperatures. Since no additional timing is required, read-out operations are performed at no speed penalty. A simplified 256×1bit array was designed in accordance with a 0.35 CMOS process and 1.2V-supply. A range of PSPICE simulation attests the efficacy of ALIS. With an extra power consumption of 242 μW, a 200 μA-leakage @125°C, corresponding to 13.6 times the cell current, is compensated.

A low-voltage low-sensitivity sinusoidal VCO for DPLL realizations

A quasi-sinusoidal linearly tunable OTA-C VCO built with triode-region transconductors is presented. Oscillation upon power-on is ensured by RHP poles associated with gate-drain capacitances of OTA input devices. Since the OTA nonlinearity stabilizes the amplitude, the oscillation frequency f0 is first-order independent of VDD, making the VCO adequate to mixed-mode designs. A range of simulations attests the theoretical analysis. As part of a DPLL, the VCO was prototyped on a 0.8μm CMOS process, occupying an area of 0.15mm2. Nominal f0 is 1MHz, with K VCo=8.4KHz/mV. Measured sensitivity to VDD is below 2.17, while phase noise is -86dBc at 100-KHz offset. The feasibility of the VCO for higher frequencies is verified by a redesign based on a 0.35μm CMOS process and VDD=3.3V, with a linear frequency-span of l3.2MHz - 61.5MHz.

A Gm-C bump equalizer for low-voltage low-power applications

A low-voltage low-power 2nd-order CMOS pseudo-differential bump-equalizer is presented. Its topology comprises a bandpass section with adjustable center frequency and quality factor, together with a programmable current amplifier. The basic building blocks are triode-operating transconductors, tunable by means of either a DC voltage or a digitally controlled current divider. The bump-equalizer as part of a battery-operated hearing aid device is designed for a 1.4V-supply and a 0.35μm CMOS fabrication process. The circuit performance is supported by a set of simulation results, which indicates a center frequency from 600Hz to 2.4kHz, 1≤Q≤5, and an adjustable gain within ±6dB at center frequency. The filter dynamic range lies around 40dB. Quiescent consumption is kept below 12μW for any configuration of the filter.

Contribution of distributed generators to the harmonic distortion in low voltage power network

In the last 20 years immense efforts have been made to utilize renewable energy sources for electric power generation. This paper investigates some aspects of integration of the distributed generators into the low voltage distribution network. An assessment of impact of the distributed generators on the voltage and current harmonic distortion in the low voltage network is performed. Results obtained from a case study, using real-life low voltage network, are presented and discussed.

Effect of seed addition on SnO2-based varistors for low voltage application

The effect of seed addition on the microstructure and non-ohmic properties of the SnO2 + 1%CoO + 0.05%Nb2O5 ceramic-based system was analyzed. Two classes of seeds were prepared: 99% SnO2 + 1%CuO and 99% SnO2 + 1%CoO (mol%); both classes were added to the ceramic-based system in the amount of 1%, 5%, and 10%. The two systems containing 1% of seeds resulted in a larger grain size and a lower breakdown voltage. The addition of 1% copper seeds produces a breakdown voltage (V b) of ∼ 37 V and a leakage current (fic) of 29 μA. On the other hand, the addition of 1% cobalt seeds produced a breakdown voltage of 57 V and a leakage current of 70 μA. Both systems are of great technological interest for low voltage varistor applications, by means of appropriate strategies to reduce the leakage current. Using larger amounts of seeds was not effective since the values of breakdown voltage in both cases are close to a system without seeds. To our knowledge, there are no reports in the literature regarding the use of seeds in the SnO2 system for low voltage applications. A potential barrier model which illustrates the formation of oxygen species (O′2(ads), O′ads, and O″ads) at the expense of clusters near the interface between grains is proposed. © 2012 The American Ceramic Society.

Improved low-voltage-ride-through capability of fixed-speed wind turbines using decentralised control of STATCOM with energy storage system

The design and implementation of a new control scheme for reactive power compensation, voltage regulation and transient stability enhancement for wind turbines equipped with fixed-speed induction generators (IGs) in large interconnected power systems is presented in this study. The low-voltage-ride-through (LVRT) capability is provided by extending the range of the operation of the controlled system to include typical post-fault conditions. A systematic procedure is proposed to design decentralised multi-variable controllers for large interconnected power systems using the linear quadratic (LQ) output-feedback control design method and the controller design procedure is formulated as an optimisation problem involving rank-constrained linear matrix inequality (LMI). In this study, it is shown that a static synchronous compensator (STATCOM) with energy storage system (ESS), controlled via robust control technique, is an effective device for improving the LVRT capability of fixed-speed wind turbines.

Space charge and dielectric response measurements to assess insulation aging of low-voltage cables used in nuclear power plants

The current design life of nuclear power plant (NPP) could potentially be extended to 80 years. During this extended plant life, all safety and operationally relevant Instrumentation & Control (I&C) systems are required to meet their designed performance requirements to ensure safe and reliable operation of the NPP, both during normal operation and subsequent to design base events. This in turn requires an adequate and documented qualification and aging management program. It is known that electrical insulation of I&C cables used in safety related circuits can degrade during their life, due to the aging effect of environmental stresses, such as temperature, radiation, vibration, etc., particularly if located in the containment area of the NPP. Thus several condition monitoring techniques are required to assess the state of the insulation. Such techniques can be used to establish a residual lifetime, based on the relationship between condition indicators and ageing stresses, hence, to support a preventive and effective maintenance program. The object of this thesis is to investigate potential electrical aging indicators (diagnostic markers) testing various I&C cable insulations subjected to an accelerated multi-stress (thermal and radiation) aging.

Low Voltage Ride-through in DFIG Wind Generators by Controlling the Rotor Current without Crowbars

Among all the different types of electric wind generators, those that are based on doubly fed induction generators, or DFIG technology, are the most vulnerable to grid faults such as voltage sags. This paper proposes a new control strategy for this type of wind generator, that allows these devices to withstand the effects of a voltage sag while following the new requirements imposed by grid operators. This new control strategy makes the use of complementary devices such as crowbars unnecessary, as it greatly reduces the value of currents originated by the fault. This ensures less costly designs for the rotor systems as well as a more economic sizing of the necessary power electronics. The strategy described here uses an electric generator model based on space-phasor theory that provides a direct control over the position of the rotor magnetic flux. Controlling the rotor magnetic flux has a direct influence on the rest of the electrical variables enabling the machine to evolve to a desired work point during the transient imposed by the grid disturbance. Simulation studies have been carried out, as well as test bench trials, in order to prove the viability and functionality of the proposed control strategy.