971 resultados para Digital design


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设计了一种应用于兰州重离子加速器注入器的电源控制器,该控制器基于微处理器AT-mega128,结合MAX7000系列的复杂可编程器件和RTL8019AS网关芯片来实现对电源系统的控制,并通过RS-232总线实现与上位机的串口通信。应用结果表明,该控制器具有良好的通用性、灵活性、可远程控制及性能稳定等特点,实现了注入器磁铁电源10-4量级的幅度稳定性,使注入器引出的束流强度、束流品质、束流稳定性和供束效率等得到很大的提高。

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介绍了一种基于CPLD设计的电源控制模块,并且利用Atmegal128单片机和RTL8019S实现逻辑功能和远程控制功能。该电源系统主要用于重离子加速器注入器(SFC)中,具有很好的灵活性、可远程控制、性能稳定等特点。

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A digital differentiator simply involves the derivation of an input signal. This work includes the presentation of first-degree and second-degree differentiators, which are designed as both infinite-impulse-response (IIR) filters and finite-impulse-response (FIR) filters. The proposed differentiators have low-pass magnitude response characteristics, thereby rejecting noise frequencies higher than the cut-off frequency. Both steady-state frequency-domain characteristics and Time-domain analyses are given for the proposed differentiators. It is shown that the proposed differentiators perform well when compared to previously proposed filters. When considering the time-domain characteristics of the differentiators, the processing of quantized signals proved especially enlightening, in terms of the filtering effects of the proposed differentiators. The coefficients of the proposed differentiators are obtained using an optimization algorithm, while the optimization objectives include magnitude and phase response. The low-pass characteristic of the proposed differentiators is achieved by minimizing the filter variance. The low-pass differentiators designed show the steep roll-off, as well as having highly accurate magnitude response in the pass-band. While having a history of over three hundred years, the design of fractional differentiator has become a ‘hot topic’ in recent decades. One challenging problem in this area is that there are many different definitions to describe the fractional model, such as the Riemann-Liouville and Caputo definitions. Through use of a feedback structure, based on the Riemann-Liouville definition. It is shown that the performance of the fractional differentiator can be improved in both the frequency-domain and time-domain. Two applications based on the proposed differentiators are described in the thesis. Specifically, the first of these involves the application of second degree differentiators in the estimation of the frequency components of a power system. The second example concerns for an image processing, edge detection application.

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One of the attractive features of sound synthesis by physical modeling is the potential to build acoustic-sounding digital instruments that offer more flexibility and different options in its design and control than their real-life counterparts. In order to develop such virtual-acoustic instruments, the models they are based on need to be fully parametric, i.e., all coefficients employed in the model are functions of physical parameters that are controlled either online or at the (offline) design stage. In this letter we show how propagation losses can be parametrically incorporated in digital waveguide string models with the use of zero-phase FIR filters. Starting from the simplest possible design in the form of a three-tap FIR filter, a higher-order FIR strategy is presented and discussed within the perspective of string sound synthesis with digital waveguide models.

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A systematic design methodology is described for the rapid derivation of VLSI architectures for implementing high performance recursive digital filters, particularly ones based on most significant digit (msd) first arithmetic. The method has been derived by undertaking theoretical investigations of msd first multiply-accumulate algorithms and by deriving important relationships governing the dependencies between circuit latency, levels of pipe-lining and the range and number representations of filter operands. The techniques described are general and can be applied to both bit parallel and bit serial circuits, including those based on on-line arithmetic. The method is illustrated by applying it to the design of a number of highly pipelined bit parallel IIR and wave digital filter circuits. It is shown that established architectures, which were previously designed using heuristic techniques, can be derived directly from the equations described.

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This paper examines the applicability of a digital manufacturing framework to the implementation of a Value Driven Design (VDD) approach for the development of a stiffened composite panel. It presents a means by which environmental considerations can be integrated with conventional product and process design drivers within a customized, digital environment. A composite forming process is used as an exemplar for the work which creates a collaborative environment for the integration of more traditional design drivers with parameters related to manufacturability as well as more sustainable processes and products. The environmental stakeholder is introduced to the VDD process through a customized product/process/resource (PPR) environment where application specific power consumption and material waste data has been measured and characterised in the process design interface. This allows the manufacturing planner to consider power consumption as a concurrent design driver and the inclusion of energy as a parameter in a VDD approach to the development of efficiently manufactured, sustainable transport systems.

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This paper presents an approach to develop an intelligent digital mock-up (DMU) through integration of design and manufacturing disciplines to enable a better understanding of assembly related issues during design evolution. The intelligent DMU will contain tolerance information related to manufacturing capabilities so it can be used as a source for assembly simulations of realistic models to support the manufacturing decision making process within the design domain related to tolerance build ups. A literature review of the contributing research areas is presented, from which identification of the need for an intelligent DMU has been developed. The proposed methodology including the applications of cellular modelling and potential features of the intelligent DMU are presented and explained. Finally a conclusion examines the work to date and the future work to achieve an intelligent DMU.

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This paper deals with and details the design of a power-aware adaptive digital image rejection receiver based on blind-source-separation that alleviates the RF analog front-end impairments. Power-aware system design at the RTL level without having to redesign arithmetic circuits is used to reduce the power consumption in nomadic devices. Power-aware multipliers with configurable precision are used to trade-off the image-rejection-ratio (IRR) performance with power consumption. Results of the simulation case studies demonstrate that the IRR performance of the power-aware system is comparable to that of the normal implementation albeit degraded slightly, but well within the acceptable limits.