Systematic methodology for the design of high performance recursive digital filters


Autoria(s): McQuillan, Stephen E.; McCanny, John V.
Data(s)

01/08/1995

Resumo

A systematic design methodology is described for the rapid derivation of VLSI architectures for implementing high performance recursive digital filters, particularly ones based on most significant digit (msd) first arithmetic. The method has been derived by undertaking theoretical investigations of msd first multiply-accumulate algorithms and by deriving important relationships governing the dependencies between circuit latency, levels of pipe-lining and the range and number representations of filter operands. The techniques described are general and can be applied to both bit parallel and bit serial circuits, including those based on on-line arithmetic. The method is illustrated by applying it to the design of a number of highly pipelined bit parallel IIR and wave digital filter circuits. It is shown that established architectures, which were previously designed using heuristic techniques, can be derived directly from the equations described.

Identificador

http://pure.qub.ac.uk/portal/en/publications/systematic-methodology-for-the-design-of-high-performance-recursive-digital-filters(ceba8e53-2790-4e6b-adc0-d281f2b0cd90).html

http://dx.doi.org/10.1109/12.403713

http://www.scopus.com/inward/record.url?partnerID=yv4JPVwI&eid=2-s2.0-0029358071&md5=aa435921478cebd8f21a5fd7a0b11087

Idioma(s)

eng

Direitos

info:eu-repo/semantics/restrictedAccess

Fonte

McQuillan , S E & McCanny , J V 1995 , ' Systematic methodology for the design of high performance recursive digital filters ' IEEE Transactions on Computers , vol 44 , no. 8 , pp. 971-982 . DOI: 10.1109/12.403713

Tipo

article