A Low Power Frequency Multiplication Technique for Zigbee Transceiver

A low-power frequency multiplication technique, developed for ZigBee (IEEE 802.15.4) like applications is presented. We have provided an estimate for the power consumption for a given output voltage swing using our technique. The advantages and disadvantages which determine the application areas of the technique are discussed. The issues related to design, layout and process variation are also addressed. Finally, a design is presented for operation in 2.405-2.485-GHz band of ZigBee receiver. SpectreRF simulations show 30% improvement in efficiency for our circuit with regard to conversion of DC bias current to output amplitude, against a LC-VCO. To establish the low-power credentials, we have compared our circuit with an existing technique; our circuit performs better with just 1/3 of total current from supply, and uses one inductor as against three in the latter case. A test chip was implemented in UMC 0.13-mum RF process with spiral on-chip inductors and MIM (metal-insulator-metal) capacitor option.

Reliability based design optimization of gravity retaining walls

In this paper the use of probability theory in reliability based optimum design of reinforced gravity retaining wall is described. The formulation for computing system reliability index is presented. A parametric study is conducted using advanced first order second moment method (AFOSM) developed by Hasofer-Lind and Rackwitz-Fiessler (HL-RF) to asses the effect of uncertainties in design parameters on the probability of failure of reinforced gravity retaining wall. Totally 8 modes of failure are considered, viz overturning, sliding, eccentricity, bearing capacity failure, shear and moment failure in the toe slab and heel slab. The analysis is performed by treating back fill soil properties, foundation soil properties, geometric properties of wall, reinforcement properties and concrete properties as random variables. These results are used to investigate optimum wall proportions for different coefficients of variation of φ (5% and 10%) and targeting system reliability index (βt) in the range of 3 – 3.2.

Ethanol sensing using CuO/MWNT thin film

Copper (II) oxide (CuO)/multiwall carbon nanotube (MWNT) thin film based ethanol-sensors were fabricated by dispersing CVD-prepared MWNTs in varying concentration over DC magnetron sputtered-CuO films. The responses of these sensors as a function of MWNT concentrations and temperatures were measured, and compared. The sensing response was the maximum at an operating temperature near 400 degrees C for all the samples irrespective of the MWNTs dispersed over them. At optimum operating temperature (T(opt)) of 407 +/- 1 degrees C, the response is linear for 100-700 ppm range and tends to saturate at higher concentrations. In comparison with bare CuO sample, the response of CuO/MWNT sensing films increased up to 50% in the linear range. The response improvement for 2500 ppm of ethanol was up to 90% compared to bare CuO sample. In addition, the sensing response time also reduced to around 23% for lowest ethanol concentration at T(opt). However, a decrease in the sensor response was observed on films with very high concentrations of MWNTs. (C) 2011 Elsevier B.V. All rights reserved.

Embedded Thin Film Resistors on BCB by Low-Cost PWB Compatible Electroless Plating by Direct Foil Lamination Transfer Processes

Benzocyclobutene (BCB) has been proposed as a board level dielectric for advanced system-on-package (SOP) module primarily due to its attractive low-loss (for RF application) and thin film (for high density wiring) properties. Realization of embedded resistors on low loss benzocyclobutene (dielectric loss ~0.0008 at > 40 GHz) has been explored in this study. Two approaches, viz, foil transfer and electroless plating have been attempted for deposition of thin film resistors on benzocyclobutene (BCB). Ni-P alloys were plated using conventional electroless plating, and NiCr and NiCrAlSi foils were used for the foil transfer process. This paper reports NiP and NiWP electroless plated embedded resistors on BCB dielectric for the first time in the literature

Recent Advances in Low CTE and High Density System-on-a-Package (SOP) Substrate with Thin Film Component Integration

The Packaging Research Center has been developing next generation system-on-a-package (SOP) technology with digital, RF, optical, and sensor functions integrated in a single package/module. The goal of this effort is to develop a platform substrate technology providing very high wiring density and embedded thin film passive and active components using PWB compatible materials and processes. The latest SOP baseline process test vehicle has been fabricated on novel Si-matched CTE, high modulus C-SiC composite core substrates using 10mum thick BCB dielectric films with loss tangent of 0.0008 and dielectric constant of 2.65. A semi-additive plating process has been developed for multilayer microvia build-up using BCB without the use of any vacuum deposition or polishing/CMP processes. PWB and package substrate compatible processes such as plasma surface treatment/desmear and electroless/electrolytic pulse reverse plating was used. The smallest line width and space demonstrated in this paper is 6mum with microvia diameters in the 15-30mum range. This build-up process has also been developed on medium CTE organic laminates including MCL-E-679F from Hitachi Chemical and PTFE laminates with Cu-Invar-Cu core. Embedded decoupling capacitors with capacitance density of >500nF/cm2 have been integrated into the build-up layers using sol-gel synthesized BaTiO3 thin films (200-300nm film thickness) deposited on copper foils and integrated using vacuum lamination and subtractive etch processes. Thin metal alloy resistor films have been integrated into the SOP substrate using two methods: (a) NiCrAlSi thin films (25ohms per square) deposited on copper foils (Gould Electronics) laminated on the build-up layers and two step etch process for resistor definition, and (b) electroless plated Ni-W-P thin films (70 ohms to few Kohms per square) on the BCB dielectric by plasma surface treatment and activation. The electrical design and build-up layer structure along- - with key materials and processes used in the fabrication of the SOP4 test vehicle were presented in this paper. Initial results from the high density wiring and embedded thin film components were also presented. The focus of this paper is on integration of materials, processes and structures in a single package substrate for system-on-a-package (SOP) implementation

High sensitivity detection of radio-frequency modulated magnetic moment in semiconductors

An experimental setup has been realized to measure weak magnetic moments which can be modulated at radio frequencies (similar to 1-5 MHz). Using an optimized radio-frequency (RF) pickup coil and lock-in amplifier, an experimental sensitivity of 10(-15) Am(2) corresponding to 10(-18) emu has been demonstrated with a 1 s time constant. The detection limit at room temperature is 9.3 x 10(-16) Am(2)/root Hz limited by Johnson noise of the coil. The setup has been used to directly measure the magnetic moment due to a small number (similar to 7 x 10(8)) of spin polarized electrons generated by polarization modulated optical radiation in GaAs and Ge. (C) 2011 American Institute of Physics. [doi: 10.1063/1.3654229]

Oxygen displacement in a 107Ag17+ ion irradiated Bi2Sr2CaCu2O8 single crystal

We have studied the magnetic field (H∥c) dependent rf dissipation (Hrf∥a) in an as-grown Bi2Sr2CaCu2O8 single crystal prior to and after irradiation with 250 MeV 107Ag17+ ions. In a comparison of the responses from the as-grown crystal with an air-annealed crystal, features due to oxygen deficient regions acting as weak links in the former are identified. These features disappear immediately after irradiation of the as-grown crystal. We attribute such behavior to the displacement of oxygen from columnar tracks to deficient regions thus eliminating the weak links. Losses from the same irradiated as-grown crystal stored at 300 K for 60 days show that the features similar but not identical to those observed in the pristine state have reappeared implying that the displaced oxygen is in a metastable configuration in the deficient regions and hence is mobile due to thermal effects even at 300 K.

Investigations on multimagnetron sputtered Zn1-xMgxO thin films through metal-ferroelectric-semiconductor configuration

The effect of Mg doping in ZnO is investigated through structural, electrical, and optical properties. Zn1−xMgxO (0<×<0.3) thin films were deposited on Si (100) and corning glass substrates using multimagnetron sputtering. Investigations on the structural properties of the films revealed that the increase in Mg concentration resulted in phase evolution from hexagonal to cubic phase. The temperature dependent study of dielectric constant at different frequencies exhibited a dielectric anomaly at 110 °C. The Zn0.7Mg0.3O thin films exhibited a well-defined polarization hysteresis loop with a remnant polarization of 0.2 μC/cm2 and coercive field of 8 kV/cm at room temperature. An increase in the band gap with an increase in Mg content was observed in the range of 3.3–3.8 eV for x = 0–0.3. The average transmittance of the films was higher than 90% in the wavelength region λ = 400–900 nm.

Approximate synthesis formulas for microstrip line with aperture in ground plane

Approximate closed-form expressions for the propagation characteristics of a microstrip line with a symmetrical aperture in its ground plane are reported in this article. Well-known expressions for the characteristic impedance of a regular microstrip line have been modified to incorporate the effect of this aperture. The accuracy of these expressions for various values of substrate thickness, permittivity and line width has been studied in detail by fullwave simulations. This has been further verified by measurements. These expressions are easier to compute and find immense use in the design of broadband filters, tight couplers, power dividers, transformers, delay lines, and matching circuits. A broadband filter with aperture in ground plane is demonstrated in this article. (c) 2011 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2012.

A Simple Charge Model for Symmetric Double-Gate MOSFETs Adapted to Gate-Oxide-Thickness Asymmetry

Surface-potential-based compact charge models for symmetric double-gate metal-oxide-semiconductor field-effect transistors (SDG-MOSFETs) are based on the fundamental assumption of having equal oxide thicknesses for both gates. However, for practical devices, there will always be some amount of asymmetry between the gate oxide thicknesses due to process variations and uncertainties, which can affect device performance significantly. In this paper, we propose a simple surface-potential-based charge model, which is applicable for tied double-gate MOSFETs having same gate work function but could have any difference in gate oxide thickness. The proposed model utilizes the unique so-far-unexplored quasi-linear relationship between the surface potentials along the channel. In this model, the terminal charges could be computed by basic arithmetic operations from the surface potentials and applied biases, and thus, it could be implemented in any circuit simulator very easily and extendable to short-channel devices. We also propose a simple physics-based perturbation technique by which the surface potentials of an asymmetric device could be obtained just by solving the input voltage equation of SDG devices for small asymmetry cases. The proposed model, which shows excellent agreement with numerical and TCAD simulations, is implemented in a professional circuit simulator through the Verilog-A interface and demonstrated for a 101-stage ring oscillator simulation. It is also shown that the proposed model preserves the source/drain symmetry, which is essential for RF circuit design.

The Effects of Nitrogen Bonding on Hardness of AIN/CrN Multilayer Hard Coatings

AIN/CrN multilayer hard coatings with various bilayer thicknesses were fabricated by a reactive sputtering process. The microstructural and mechanical characterizations of multilayer coatings were investigated through transmission electron microscope (TEM) observations and the hardness measurements by nano indentation. In particular, the variation of chemical bonding states of the bilayer nitrides was elucidated by near edge X-ray absorption fine structure (NEXAFS) spectroscopy. Many broken nitrogen bonds were formed by decreasing the bilayer thickness of AIN/CrN multilayer coatings. Existence of optimum AIN/CrN multilayer coatings thickness for maximum hardness could be explained by the competition of softening by the formation of broken nitrogen bonds and strengthening induced by decreasing bilayer thickness.

Realization of thermally durable close-packed 2D gold nanoparticle arrays using self-assembly and plasma etching

Realization of thermally and chemically durable, ordered gold nanostructures using bottom-up self-assembly techniques are essential for applications in a wide range of areas including catalysis, energy generation, and sensing. Herein, we describe a modular process for realizing uniform arrays of gold nanoparticles, with interparticle spacings of 2 nm and above, by using RF plasma etching to remove ligands from self-assembled arrays of ligand-coated gold nanoparticles. Both nanoscale imaging and macroscale spectroscopic characterization techniques were used to determine the optimal conditions for plasma etching, namely RF power, operating pressure, duration of treatment, and type of gas. We then studied the effect of nanoparticle size, interparticle spacing, and type of substrate on the thermal durability of plasma-treated and untreated nanoparticle arrays. Plasma-treated arrays showed enhanced chemical and thermal durability, on account of the removal of ligands. To illustrate the application potential of the developed process, robust SERS (surface-enhanced Raman scattering) substrates were formed using plasma-treated arrays of silver-coated gold nanoparticles that had a silicon wafer or photopaper as the underlying support. The measured value of the average SERS enhancement factor (2 x 10(5)) was quantitatively reproducible on both silicon and paper substrates. The silicon substrates gave quantitatively reproducible results even after thermal annealing. The paper-based SERS substrate was also used to swab and detect probe molecules deposited on a solid surface.

Piecewise Linearization Technique for Compact Charge Modeling of Independent DG MOSFET

Charge linearization techniques have been used over the years in advanced compact models for bulk and double-gate MOSFETs in order to approximate the position along the channel as a quadratic function of the surface potential (or inversion charge densities) so that the terminal charges can be expressed as a compact closed-form function of source and drain end surface potentials (or inversion charge densities). In this paper, in case of the independent double-gate MOSFETs, we show that the same technique could be used to model the terminal charges quite accurately only when the 1-D Poisson solution along the channel is fully hyperbolic in nature or the effective gate voltages are same. However, for other bias conditions, it leads to significant error in terminal charge computation. We further demonstrate that the amount of nonlinearity that prevails between the surface potentials along the channel actually dictates if the conventional charge linearization technique could be applied for a particular bias condition or not. Taking into account this nonlinearity, we propose a compact charge model, which is based on a novel piecewise linearization technique and shows excellent agreement with numerical and Technology Computer-Aided Design (TCAD) simulations for all bias conditions and also preserves the source/drain symmetry which is essential for Radio Frequency (RF) circuit design. The model is implemented in a professional circuit simulator through Verilog-A, and simulation examples for different circuits verify good model convergence.

A novel gas flow sensing application using piezoelectric ZnO thin films deposited on Phynox alloy

We report on the novel flow sensing application of piezoelectric ZnO thin film deposited on Phynox alloy sensing element. Characterization of piezoelectric ZnO films deposited on Phynox (Elgiloy) substrate at different RF powers is discussed. ZnO films deposited at RF power of 100W were found to have fine c-axis orientation, possesses excellent surface morphology with lower rms surface roughness of 1.87 nm and maximum d(31) coefficient value 4.7 pm V-1. The thin cantilever strip of Phynox alloy with ZnO film as a sensing layer for flow sensing has been tested for flow rates ranging from 2 to 18 L min(-1). A detailed theoretical analysis of the experimental set-up showing the relationship between output voltage and force at a particular flow rate has been discussed. The sensitivity of now sensing element is similar to 18 mV/(L min(-1)) and typical response time is of the order of 20 m s. The sensing element is calibrated using in-house developed testing set-up. (C) 2012 Elsevier B.V. All rights reserved.

Graphene transistors for CMOS applications: opportunities and challenges

In the last decade, there has been a tremendous interest in Graphene transistors. The greatest advantage for CMOS nanoelectronics applications is the fact that Graphene is compatible with planar CMOS technology and potentially offers excellent short channel properties. Because of the zero bandgap, it will not be possible to turn off the MOSFET efficiently and hence the typical on current to off current ratio (Ion/Ioff) has been less than 10. Several techniques have been proposed to open the bandgap in Graphene. It has been demonstrated, both theoretically and experimentally, that Graphene Nanoribbons (GNR) show a bandgap which is inversely proportional to their width. GNRs with about 20 nm width have bandgaps in the range of 100meV. But it is very difficult to obtain GNRs with well defined edges. An alternate technique to open the band gap is to use bilayer Graphene (BLG), with an asymmetric bias applied in the direction perpendicular to their plane. Another important CMOS metric, the subthreshold slope is also limited by the inability to turn off the transistor. However, these devices could be attractive for RF CMOS applications. But even for analog and RF applications the non-saturating behavior of the drain current can be an issue. Although some studies have reported current saturation, the mechanisms are still not very clear. In this talk we present some of our recent findings, based on simulations and experiments, and propose possible solutions to obtain high on current to off current ratio. A detailed study on high field transport in grapheme transistors, relevant for analog and RF applications will also be presented.