Powering the virtual university with standard portal technology

This article describes ongoing research on developing a portal framework based on the OASIS Web Services for Remote Portlets (WSRP) standard for integration of Web-based education contents and services made available through a model for a European Networked University. We first identify the requirements for such a framework that supports integration at the presentation level and collaboration in developing and updating study programmes and course materials. We then outline the architecture design, and report on the initial implementation and preliminary evaluation.

Macro-micro modelling of moisture induced stresses in an ACF flip chip assembly

Purpose – This paper discusses the use of modelling techniques to predict the reliability of an anisotropic conductive film (ACF) flip chip in a humid environment. The purpose of this modelling work is to understand the role that moisture plays in the failure of ACF flip chips. Design/methodology/approach – A 3D macro-micro finite element modelling technique was used to determine the moisture diffusion and moisture-induced stresses inside the ACF flip chip. Findings – The results show that the ACF layer in the flip chip can be expected to be fully saturated with moisture after 3?h at 121°C, 100%RH, 2?atm test conditions. The swelling effect of the adhesive due to this moisture absorption causes predominately tensile stress at the interface between the adhesive and the metallization, which could cause a decrease in the contact area, and therefore an increase in the contact resistance. Originality/value – This paper introduces a macro-micro modelling technique which enables more detailed 3D modelling analysis of an ACF flip chip than previously.

Effects of thermal cycling profiles on the performance of chip-on-flex assembly using anisotropic conductive films

Anisotropic conductive films (ACFs) are widely used in the electronic packaging industries because of their fine pitch potential and the assembly process is simpler compared to the soldering process. However, there are still unsolved issues in the volume productions using ACFs. The main reason is that the effects of many factors on the interconnects are not well understood. This work focuses on the performance of ACF-bonded chip-on-flex assemblies subjected to a range of thermal cycling test conditions. Both experimental and three-dimensional finite element computer modelling methods are used. It has been revealed that greater temperature ranges and longer dwell-times give rise to higher stresses in the ACF interconnects. Higher stresses are concentrated along the edges of the chip-ACF interfaces. In the experiments, the results show that higher temperature ranges and prolonged dwell times increase contact resistance values. Close examination of the microstructures along the bond-line through the scanning electron microscope (SEM) indicates that cyclic thermal loads disjoint the conductive particles from the bump of the chip and/or pad of the substrate and this is thought to be related to the increase of the contact resistance value and the failure of the ACF joints.

Ultra-fine pitch stencil printing for a low cost and low temperature flip-chip assembly process

This paper presents the results of a packaging process based on the stencil printing of isotropic conductive adhesives (ICAs) that form the interconnections of flip-chip bonded electronic packages. Ultra-fine pitch (sub-100-mum), low temperature (100degC), and low cost flip-chip assembly is demonstrated. The article details recent advances in electroformed stencil manufacturing that use microengineering techniques to enable stencil fabrication at apertures sizes down to 20mum and pitches as small as 30mum. The current state of the art for stencil printing of ICAs and solder paste is limited between 150-mum and 200-mum pitch. The ICAs-based interconnects considered in this article have been stencil printed successfully down to 50-mum pitch with consistent printing demonstrated at 90-mum pitch size. The structural integrity or the stencil after framing and printing is also investigated through experimentation and computational modeling. The assembly of a flip-chip package based on copper column bumped die and ICA deposits stencil printed at sub-100-mum pitch is described. Computational fluid dynamics modeling of the print performance provides an indicator on the optimum print parameters. Finally, an organic light emitting diode display chip is packaged using this assembly process

Recommendations on the nature of the passenger response time distribution to be used in the MSC 1033 assembly time analysis based on data derived from sea trials

The passenger response time distributions adopted by the International Maritime Organisation (IMO)in their assessment of the assembly time for passanger ships involves two key assumptions. The first is that the response time distribution assumes the form of a uniform random distribution and the second concerns the actual response times. These two assumptions are core to the validity of the IMO analysis but are not based on real data, being the recommendations of an IMO committee. In this paper, response time data collected from assembly trials conducted at sea on a real passanger vessel using actual passangers are presented and discussed. Unlike the IMO specified response time distributions, the data collected from these trials displays a log-normal distribution, similar to that found in land based environments. Based on this data, response time distributions for use in the IMO assesmbly for the day and night scenarios are suggested

Open ended microwave oven for flip-chip assembly

A novel open-ended waveguide cavity resonator for the microwave curing of bumps, underfills and encapsulants is described. The open oven has the potential to provide fast alignment of devices during flip-chip assembly, direct chip attach, surface mount assembly or wafer-scale level packaging. The prototype microwave oven was designed to operate at X-band for ease of testing, although a higher frequency version is planned. The device described in the paper takes the form of a waveguide cavity resonator. It is approximately square in cross-section and is filled with a low-loss dielectric with a relative permittivity of 6. It is excited by end-fed probes in order to couple power preferentially into the TM3,3,k mode with the object of forming nine 'hot-spots' in the open end. Low power tests using heat sensitive film demonstrate clearly that selective heating in multiple locations in the open end of the oven is achievable

Impact of assembly process technologies on electronic packaging materials

Assembly processes used to bond components to printed circuit boards can have a significant impact on these boards and the final packaged component. Traditional approaches to bonding components to printed circuit boards results in heat being applied across the whole board assembly. This can lead to board warpage and possibly high residual stresses. Another approach discussed in this paper is to use Variable Frequency Microwave (VFM) heating to cure adhesives and underfills and bond components to printed circuit boards. In terms of energy considerations the use of VFM technology is much more cost effective compared to convection/radiation heating. This paper will discuss the impact of traditional reflow based processes on flexible substrates and it will demonstrate the possible advantages of using localised variable frequency microwave heating to cure materials in an electronic package.

Virtual assignments: breach of covenant against parting with or sharing of possession

Comments on the Chancery Division decision in Clarence House Ltd v National Westminster Bank Plc on whether the alienation covenant in a lease of commercial premises had been breached by the tenant effecting a virtual assignment of it, under which all the economic benefits and burdens of the lease were transferred to a third party without there being any actually assignment of the leasehold interest or change in occupancy.

Delivering processing instruction in classroom and virtual contexts

Processing Instruction (PI) is an approach to grammar instruction for second language learning. It derives its name from the fact that the instruction (both the explicit explanation as well as the practices) attempt to influence, alter, and/or improve the way learners process input. PI contrasts with traditional grammar instruction in many ways, most principally in its focus on input whereas traditional grammar instruction focuses on learners' output. The greatest contribution of PI to both theory and practice is the concept of "structured input", a form of comprehensible input that has been manipulated to maximize learners' benefit of exposure to input. This volume focuses on a new issue for PI, the role of technology in language learning. It examines empirically the differential effects of delivering PI in classrooms with an instructor and students interacting (with each other and with the instructor) versus on computers to students working individually. It also contributes to the growing body of research on the effects of PI on different languages as well as different linguistic items: preterite/imperfect aspectual contrast and negative informal commands in Spanish, the subjunctive of doubt and opinion in Italian, and the subjunctive of doubt in French. Further research contributions are made by comparing PI with other types of instruction, specifically, with meaning-oriented output instruction.

Rheological characterisation of solder pastes and isotropic conductive adhesives used for flip-chip assembly

Solder pastes and isotropic conductive adhesives (ICAs) are widely used as a principal bonding medium in the electronic industry. This study investigates the rheological behaviour of the pastes (solder paste and isotropic conductive adhesives) used for flip-chip assembly. Oscillatory stress sweep test are performed to evaluate solid characteristic and cohesiveness of the lead-free solder pastes and isotropic conductive adhesive paste materials. The results show that the G' (storage modulus) is higher than G '' (loss modulus) for the pastes material indicating a solid like behaviour. It result shows that the linear visco-elastic region for the pastes lies in a very small stress range, below 10 Pa. in addition, the stress at which the value of storage modulus is equal to that of loss modulus can be used as an indicator of the paste cohesiveness. The measured cross-over stress at G'=G '' shows that the solder paste has higher stress at G'=G '' compared to conductive adhesives. Creep-recovery test method is used to study the slump behaviour in the paste materials. The conductive adhesive paste shows a good recovery when compared to the solder pastes. (C) 2008 Elsevier B.V. All rights reserved.

Wall-slip effects in SnAgCu solder pastes used in electronics assembly applications

Solder paste is the most important strategic bonding material used in the assembly of surface mount components in electronics manufacturing. As the trend towards miniaturisation of electronic products continues, there is an increasing demand for better understanding of the flow and deformation that is, the rheological behaviour of solder paste formulations. Wall slip plays an important role in characterising the flow behaviour of solder paste materials. The problem of wall slip arises due to the various attractive and repulsive forces acting between the solder particles and the walls of the measuring geometry. These interactions could lead to the presence of a thin solvent layer adjacent to the wall, which gives rise to slippage. In rheological measurements, slip effects can generally be avoided by using roughened surfaces for measuring geometries. In this paper, a novel technique is developed to study the effect of wall slip in the rheological measurements of lead-free solder paste. The viscosity and oscillatory data obtained for three different solder paste samples (from measuring geometries of different surface roughness) havebeen analysed and compared. In viscosity measurements, slip effects were dominant at low shear rates and the use of serrated surfaces was found to be quite effective in minimizing slip effects. Oscillatory measurements were also affected by roughening the surfaces of measuring geometries.

Modelling the time-dependent behaviour of solder pastes used in the electronics assembly applications

Solder paste is the most widely used bonding material in the assembly of surface mount devices in electronic industries. It generally has a flocculated structure (show aggregation of solder particles), and hence are known to exhibit a thixotropic behavior. This is recognized by the decrease in apparent viscosity of paste material with time when subjected to a constant shear rate. The proper characterisation of this timedependent rheological behaviour of solder pastes is crucial for establishing the relationships between the pastes’ structure and flow behaviour; and for correlating the physical parameters with paste printing performance. In this paper, we present a novel method which has been developed for characterising the timedependent and non-Newtonian rheological behaviour of solder pastes as a function of shear rates. The objective of the study reported in this paper is to investigate the thixotropic build-up behaviour of solder pastes. The stretched exponential model(SEM) has been used to model the structural changes during the build-up process and to correlate model parameters with the paste printing process.

Engineering design knowledge management in de-centralised virtual enterprises

The problems of collaborative engineering design and knowledge management at the conceptual stage in a network of dissimilar enterprises was investigated. This issue in engineering design is a result of the supply chain and virtual enterprise (VE) oriented industry that demands faster time to market and accurate cost/manufacturing analysis from conception. The solution consisted of a de-centralised super-peer net architecture to establish and maintain communications between enterprises in a VE. In the solution outlined below, the enterprises are able to share knowledge in a common format and nomenclature via the building-block shareable super-ontology that can be tailored on a project by project basis, whilst maintaining the common nomenclature of the ‘super-ontology’ eliminating knowledge interpretation issues. The two-tier architecture layout of the solution glues together the peer-peer and super-ontologies to form a coherent system for both internal and virtual enterprise knowledge management and product development.

Viscoelastic properties of solder paste and isotropic conductive adhesives used for flip-chip assembly

The printing of pastes (solder pastes and isotropic conductive adhesives) through very small stencil apertures required for flip-chip pitch sizes is expected to result in increased stencil clogging and incomplete transfer of paste to the printed circuit board pads. There is wide agreement in industry that the paste printing process accounts for the majority of assembly defects, and most defects originate from poor understanding of the effect of printing process parameters on printing performance.

A methodology for characterising new lead-free solder paste formulations used for flip-chip assembly applications

The paper reports on the investigation of the rheological behaviour new lead-free solder pastes formulations for use in flip-chip assembly applications. The study is made up of three parts; namely the evaluation of the effect of plate geometry, the effect of temperature and processing environment and the effect of torsional frequencies on the rheological measurements. Different plate geometries and rheological tests were used to evaluate new formulations in terms of wall slip characteristics, linear viscoelastic region and shear thinning behaviour. A technique which combines the use of the creep-recovery and dynamic frequency sweep tests was used to further characterise the paste structure, rheological behaviour and the processing performance of the new paste formulations. The technique demonstrated in this study has wide utility for R & D personnel involved in new paste formulation, for implementing quality control procedures used in paste manufacture and packaging and for qualifying new flip-chip assembly lines