836 resultados para private placement


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La señalización digital o digital signage es una tecnología de comunicaciones digital que se está usando en los últimos años para reemplazar a la antigua publicidad impresa. Esta tecnología mejora la presentación y promoción de los productos anunciados, así como facilita el intercambio de información gracias a su colocación en lugares públicos o al aire libre. Las aplicaciones con las que cuenta este nuevo método de publicidad son muy variadas, ya que pueden variar desde ambientes privados en empresas, hasta lugares públicos como centros comerciales. Aunque la primera y principal utilidad de la señalización digital es la publicidad para que el usuario sienta una necesidad de adquirir productos, también la posibilidad de ofrecer más información sobre determinados artículos a través de las nuevas tecnologías es muy importante en este campo. La aplicación realizada en este proyecto es el desarrollo de un programa en Adobe Flash a través de lenguaje de programación XML. A través de una pantalla táctil, el usuario de un museo puede interactivamente acceder a un menú en el que aparecen los diferentes estilos de arte en un determinado tiempo de la historia. A través de una línea de tiempo se puede acceder a información sobre cada objeto que esté expuesto en la exhibición. Además se pueden observar imágenes de los detalles más importantes del objeto que no pueden ser vistos a simple vista, ya que no está permitido manipularlos. El empleo de la pantalla interactiva sirve para el usuario de la exhibición como una herramienta extra para recabar información sobre lo que está viendo, a través de una tecnología nueva y fácil de usar para todo el mundo, ya que solo se necesita usar las propias manos. La facilidad de manejo en aplicaciones como estas es muy importante, ya que el usuario final puede no tener conocimientos tecnológicos por lo que la información debe darse claramente. Como conclusión, se puede decir que digital signage es un mercado que está en expansión y que las empresas deben invertir en el desarrollo de contenidos, ya que las tecnologías avanzan aunque el digital signage no lo haga, y este sector podría ser muy útil en un futuro no muy lejano, ya que la información que es capaz de transmitir al espectador en todos los lugares es mucho más válida y útil que la proporcionada por un simple póster impreso en una valla publicitaria. Abstract The Digital signage is a digital communications technology being used in recent years to replace the old advertising printed. This technology improves the presentation and promotion of the advertised products, and makes easy the exchange of information with its placement in public places or outdoors. The applications that account this new method of advertising are several; they can range from private rooms in companies, to public places like malls. Although the first major utility of Digital signage is the advertising that makes the user feel and need of purchasing products. In addition, the chance of providing more information about certain items through new technologies is very important in this field. The application made in this project is the development of a program in Adobe Flash via XML programming language. Through a touch-screen, a museum user can interactively access a menu in which different styles of art in a particular time in history appears. Through a timeline you can access to information about each object that is exposed on display. Also you can see pictures of the most important details of the object that can not be seen with the naked eye, since it is not allowed to manipulate it. The use of the interactive screen serves to the user exhibition as an extra tool to gather information about what is seeing through a new technology and easy to use for everyone, since only need to use one’s own hands. The ease of handling in applications such as this is very important as the end user may not have expertise technology so the information should be clearly. As conclusion, one can say digital signage is an expansion market and companies must invest in content development, as although digital technologies advance digital signage does not, and this sector could be very useful in a near future, because information that is able of transmitting the everywhere viewer is much more valid and useful than that provided by a simple printed poster on a billboard.

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La temperatura es una preocupación que juega un papel protagonista en el diseño de circuitos integrados modernos. El importante aumento de las densidades de potencia que conllevan las últimas generaciones tecnológicas ha producido la aparición de gradientes térmicos y puntos calientes durante el funcionamiento normal de los chips. La temperatura tiene un impacto negativo en varios parámetros del circuito integrado como el retardo de las puertas, los gastos de disipación de calor, la fiabilidad, el consumo de energía, etc. Con el fin de luchar contra estos efectos nocivos, la técnicas de gestión dinámica de la temperatura (DTM) adaptan el comportamiento del chip en función en la información que proporciona un sistema de monitorización que mide en tiempo de ejecución la información térmica de la superficie del dado. El campo de la monitorización de la temperatura en el chip ha llamado la atención de la comunidad científica en los últimos años y es el objeto de estudio de esta tesis. Esta tesis aborda la temática de control de la temperatura en el chip desde diferentes perspectivas y niveles, ofreciendo soluciones a algunos de los temas más importantes. Los niveles físico y circuital se cubren con el diseño y la caracterización de dos nuevos sensores de temperatura especialmente diseñados para los propósitos de las técnicas DTM. El primer sensor está basado en un mecanismo que obtiene un pulso de anchura variable dependiente de la relación de las corrientes de fuga con la temperatura. De manera resumida, se carga un nodo del circuito y posteriormente se deja flotando de tal manera que se descarga a través de las corrientes de fugas de un transistor; el tiempo de descarga del nodo es la anchura del pulso. Dado que la anchura del pulso muestra una dependencia exponencial con la temperatura, la conversión a una palabra digital se realiza por medio de un contador logarítmico que realiza tanto la conversión tiempo a digital como la linealización de la salida. La estructura resultante de esta combinación de elementos se implementa en una tecnología de 0,35 _m. El sensor ocupa un área muy reducida, 10.250 nm2, y consume muy poca energía, 1.05-65.5nW a 5 muestras/s, estas cifras superaron todos los trabajos previos en el momento en que se publicó por primera vez y en el momento de la publicación de esta tesis, superan a todas las implementaciones anteriores fabricadas en el mismo nodo tecnológico. En cuanto a la precisión, el sensor ofrece una buena linealidad, incluso sin calibrar; se obtiene un error 3_ de 1,97oC, adecuado para tratar con las aplicaciones de DTM. Como se ha explicado, el sensor es completamente compatible con los procesos de fabricación CMOS, este hecho, junto con sus valores reducidos de área y consumo, lo hacen especialmente adecuado para la integración en un sistema de monitorización de DTM con un conjunto de monitores empotrados distribuidos a través del chip. Las crecientes incertidumbres de proceso asociadas a los últimos nodos tecnológicos comprometen las características de linealidad de nuestra primera propuesta de sensor. Con el objetivo de superar estos problemas, proponemos una nueva técnica para obtener la temperatura. La nueva técnica también está basada en las dependencias térmicas de las corrientes de fuga que se utilizan para descargar un nodo flotante. La novedad es que ahora la medida viene dada por el cociente de dos medidas diferentes, en una de las cuales se altera una característica del transistor de descarga |la tensión de puerta. Este cociente resulta ser muy robusto frente a variaciones de proceso y, además, la linealidad obtenida cumple ampliamente los requisitos impuestos por las políticas DTM |error 3_ de 1,17oC considerando variaciones del proceso y calibrando en dos puntos. La implementación de la parte sensora de esta nueva técnica implica varias consideraciones de diseño, tales como la generación de una referencia de tensión independiente de variaciones de proceso, que se analizan en profundidad en la tesis. Para la conversión tiempo-a-digital, se emplea la misma estructura de digitalización que en el primer sensor. Para la implementación física de la parte de digitalización, se ha construido una biblioteca de células estándar completamente nueva orientada a la reducción de área y consumo. El sensor resultante de la unión de todos los bloques se caracteriza por una energía por muestra ultra baja (48-640 pJ) y un área diminuta de 0,0016 mm2, esta cifra mejora todos los trabajos previos. Para probar esta afirmación, se realiza una comparación exhaustiva con más de 40 propuestas de sensores en la literatura científica. Subiendo el nivel de abstracción al sistema, la tercera contribución se centra en el modelado de un sistema de monitorización que consiste de un conjunto de sensores distribuidos por la superficie del chip. Todos los trabajos anteriores de la literatura tienen como objetivo maximizar la precisión del sistema con el mínimo número de monitores. Como novedad, en nuestra propuesta se introducen nuevos parámetros de calidad aparte del número de sensores, también se considera el consumo de energía, la frecuencia de muestreo, los costes de interconexión y la posibilidad de elegir diferentes tipos de monitores. El modelo se introduce en un algoritmo de recocido simulado que recibe la información térmica de un sistema, sus propiedades físicas, limitaciones de área, potencia e interconexión y una colección de tipos de monitor; el algoritmo proporciona el tipo seleccionado de monitor, el número de monitores, su posición y la velocidad de muestreo _optima. Para probar la validez del algoritmo, se presentan varios casos de estudio para el procesador Alpha 21364 considerando distintas restricciones. En comparación con otros trabajos previos en la literatura, el modelo que aquí se presenta es el más completo. Finalmente, la última contribución se dirige al nivel de red, partiendo de un conjunto de monitores de temperatura de posiciones conocidas, nos concentramos en resolver el problema de la conexión de los sensores de una forma eficiente en área y consumo. Nuestra primera propuesta en este campo es la introducción de un nuevo nivel en la jerarquía de interconexión, el nivel de trillado (o threshing en inglés), entre los monitores y los buses tradicionales de periféricos. En este nuevo nivel se aplica selectividad de datos para reducir la cantidad de información que se envía al controlador central. La idea detrás de este nuevo nivel es que en este tipo de redes la mayoría de los datos es inútil, porque desde el punto de vista del controlador sólo una pequeña cantidad de datos |normalmente sólo los valores extremos| es de interés. Para cubrir el nuevo nivel, proponemos una red de monitorización mono-conexión que se basa en un esquema de señalización en el dominio de tiempo. Este esquema reduce significativamente tanto la actividad de conmutación sobre la conexión como el consumo de energía de la red. Otra ventaja de este esquema es que los datos de los monitores llegan directamente ordenados al controlador. Si este tipo de señalización se aplica a sensores que realizan conversión tiempo-a-digital, se puede obtener compartición de recursos de digitalización tanto en tiempo como en espacio, lo que supone un importante ahorro de área y consumo. Finalmente, se presentan dos prototipos de sistemas de monitorización completos que de manera significativa superan la características de trabajos anteriores en términos de área y, especialmente, consumo de energía. Abstract Temperature is a first class design concern in modern integrated circuits. The important increase in power densities associated to recent technology evolutions has lead to the apparition of thermal gradients and hot spots during run time operation. Temperature impacts several circuit parameters such as speed, cooling budgets, reliability, power consumption, etc. In order to fight against these negative effects, dynamic thermal management (DTM) techniques adapt the behavior of the chip relying on the information of a monitoring system that provides run-time thermal information of the die surface. The field of on-chip temperature monitoring has drawn the attention of the scientific community in the recent years and is the object of study of this thesis. This thesis approaches the matter of on-chip temperature monitoring from different perspectives and levels, providing solutions to some of the most important issues. The physical and circuital levels are covered with the design and characterization of two novel temperature sensors specially tailored for DTM purposes. The first sensor is based upon a mechanism that obtains a pulse with a varying width based on the variations of the leakage currents on the temperature. In a nutshell, a circuit node is charged and subsequently left floating so that it discharges away through the subthreshold currents of a transistor; the time the node takes to discharge is the width of the pulse. Since the width of the pulse displays an exponential dependence on the temperature, the conversion into a digital word is realized by means of a logarithmic counter that performs both the timeto- digital conversion and the linearization of the output. The structure resulting from this combination of elements is implemented in a 0.35_m technology and is characterized by very reduced area, 10250 nm2, and power consumption, 1.05-65.5 nW at 5 samples/s, these figures outperformed all previous works by the time it was first published and still, by the time of the publication of this thesis, they outnumber all previous implementations in the same technology node. Concerning the accuracy, the sensor exhibits good linearity, even without calibration it displays a 3_ error of 1.97oC, appropriate to deal with DTM applications. As explained, the sensor is completely compatible with standard CMOS processes, this fact, along with its tiny area and power overhead, makes it specially suitable for the integration in a DTM monitoring system with a collection of on-chip monitors distributed across the chip. The exacerbated process fluctuations carried along with recent technology nodes jeop-ardize the linearity characteristics of the first sensor. In order to overcome these problems, a new temperature inferring technique is proposed. In this case, we also rely on the thermal dependencies of leakage currents that are used to discharge a floating node, but now, the result comes from the ratio of two different measures, in one of which we alter a characteristic of the discharging transistor |the gate voltage. This ratio proves to be very robust against process variations and displays a more than suficient linearity on the temperature |1.17oC 3_ error considering process variations and performing two-point calibration. The implementation of the sensing part based on this new technique implies several issues, such as the generation of process variations independent voltage reference, that are analyzed in depth in the thesis. In order to perform the time-to-digital conversion, we employ the same digitization structure the former sensor used. A completely new standard cell library targeting low area and power overhead is built from scratch to implement the digitization part. Putting all the pieces together, we achieve a complete sensor system that is characterized by ultra low energy per conversion of 48-640pJ and area of 0.0016mm2, this figure outperforms all previous works. To prove this statement, we perform a thorough comparison with over 40 works from the scientific literature. Moving up to the system level, the third contribution is centered on the modeling of a monitoring system consisting of set of thermal sensors distributed across the chip. All previous works from the literature target maximizing the accuracy of the system with the minimum number of monitors. In contrast, we introduce new metrics of quality apart form just the number of sensors; we consider the power consumption, the sampling frequency, the possibility to consider different types of monitors and the interconnection costs. The model is introduced in a simulated annealing algorithm that receives the thermal information of a system, its physical properties, area, power and interconnection constraints and a collection of monitor types; the algorithm yields the selected type of monitor, the number of monitors, their position and the optimum sampling rate. We test the algorithm with the Alpha 21364 processor under several constraint configurations to prove its validity. When compared to other previous works in the literature, the modeling presented here is the most complete. Finally, the last contribution targets the networking level, given an allocated set of temperature monitors, we focused on solving the problem of connecting them in an efficient way from the area and power perspectives. Our first proposal in this area is the introduction of a new interconnection hierarchy level, the threshing level, in between the monitors and the traditional peripheral buses that applies data selectivity to reduce the amount of information that is sent to the central controller. The idea behind this new level is that in this kind of networks most data are useless because from the controller viewpoint just a small amount of data |normally extreme values| is of interest. To cover the new interconnection level, we propose a single-wire monitoring network based on a time-domain signaling scheme that significantly reduces both the switching activity over the wire and the power consumption of the network. This scheme codes the information in the time domain and allows a straightforward obtention of an ordered list of values from the maximum to the minimum. If the scheme is applied to monitors that employ TDC, digitization resource sharing is achieved, producing an important saving in area and power consumption. Two prototypes of complete monitoring systems are presented, they significantly overcome previous works in terms of area and, specially, power consumption.

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This paper shows the results of a research aimed to formulate a general model for supporting the implementation and management of an urban road pricing scheme. After a preliminary work, to define the state of the art in the field of sustainable urban mobility strategies, the problem has been theoretically set up in terms of transport economy, introducing the external costs’ concept duly translated into the principle of pricing for the use of public infrastructures. The research is based on the definition of a set of direct and indirect indicators to qualify the urban areas by land use, mobility, environmental and economic conditions. These indicators have been calculated for a selected set of typical urban areas in Europe on the basis of the results of a survey carried out by means of a specific questionnaire. Once identified the most typical and interesting applications of the road pricing concept in cities such as London (Congestion Charging), Milan (Ecopass), Stockholm (Congestion Tax) and Rome (ZTL), a large benchmarking exercise and the cross analysis of direct and indirect indicators, has allowed to define a simple general model, guidelines and key requirements for the implementation of a pricing scheme based traffic restriction in a generic urban area. The model has been finally applied to the design of a road pricing scheme for a particular area in Madrid, and to the quantification of the expected results of its implementation from a land use, mobility, environmental and economic perspective.

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No tillage, minimum tillage and conventional tillage practices are commonly used in maize crops in Alentejo, affecting soil physic conditions and determining seeders performance. Seeders distribution can be evaluated in the longitudinal and vertical planes. Vertical plane is specified by seeding depth (Karayel et al., 2008). If, in one hand seeding depth uniformity is a goal for all crop establishment , in the other hand, seeders furrow openers depth control is never constant depending on soil conditions. Seed depth uniformity affects crop emergence, Liu et al. (2004) showed an higher correlation between crop productivity and emergence uniformity than with longitudinal plants distribution. Neto et al. (2007) evaluating seed depth placement by measuring maize mesocotyl length under no tillage conditions in 38 farms concluded that 20% of coefficient of variation suggests the need of improvement seeders depth control mechanisms. The objective of this study was to evaluate casual relationships and create spatial variability maps between soil mechanic resistance and vertical distribution under three different soil practices to improve seed depth uniformity.

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Many countries around the world are implementing Public?Private?Partnership (PPP) contacts to manage road infrastructure. In some of these contracts the public sector introduces economic incentives to the private operator to foster the accomplishment of social goals. One of the incentives that have been introduced in some PPP contracts is related to safety in such a way that the better the safety outcome the greater will be the economic reward to the contractor. The aim of this paper is at identify whether the incentives to improve road safety in highway PPPs are ultimately effective in improving safety ratios. To this end Poisson and negative binomial regression models have been applied using information from highway sections in Spain. The findings indicate that even though road safety is highly influenced by variables that are not much controllable by the contractor such as the Average Annual Daily Traffic and the percentage of heavy vehicles, the implementation of safety incentives in PPPs has a positive influence in the reduction of fatalities, injuries and accidents.

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Dynamic thermal management techniques require a collection of on-chip thermal sensors that imply a significant area and power overhead. Finding the optimum number of temperature monitors and their location on the chip surface to optimize accuracy is an NP-hard problem. In this work we improve the modeling of the problem by including area, power and networking constraints along with the consideration of three inaccuracy terms: spatial errors, sampling rate errors and monitor-inherent errors. The problem is solved by the simulated annealing algorithm. We apply the algorithm to a test case employing three different types of monitors to highlight the importance of the different metrics. Finally we present a case study of the Alpha 21364 processor under two different constraint scenarios.

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The aim of this paper is to call into question those typologies conventionally used in developing the post-industrial urban fabric (streets, cityblocks, slabs, etc.), often catering to urban designs based on speculative interests and completely overlooking community interests. By defining the concepts of ?postpublic space? and ?reversible urban entities? and illustrating them with an exemplary case of Spanish residential architecture from the 1960s, we establish one possible way of tackling contemporary urban-residential projects. This alternative approach considers the relationship between residential systems and open space systems and promotes the continuity and/or alternation of scales between house and city in an effort to improve the urban quality of life for residents and external users.

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This master thesis is intended to perform an exploratory approach for the potential to Public-Private Partnerships as a tool for advanced collaboration between businesses and the cooperation system in the specific context of humanitarian action. It intends to conduct a case study analysis of representative interactions between the public and private actors in the humanitarian aid, and in conjunction with a profound revision of the existing literature, creates a set of conclusions and recommendations that can serve as a prototype for possible inclusion guide the private sector in humanitarian action through new paradigms that go beyond the classical donor-recipient model.

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Cloud computing and, more particularly, private IaaS, is seen as a mature technology with a myriad solutions tochoose from. However, this disparity of solutions and products has instilled in potential adopters the fear of vendor and data lock-in. Several competing and incompatible interfaces and management styles have given even more voice to these fears. On top of this, cloud users might want to work with several solutions at the same time, an integration that is difficult to achieve in practice. In this paper, we propose a management architecture that tries to tackle these problems; it offers a common way of managing several cloud solutions, and an interface that can be tailored to the needs of the user. This management architecture is designed in a modular way, and using a generic information model. We have validated our approach through the implementation of the components needed for this architecture to support a sample private IaaS solution: OpenStack

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The size and complexity of cloud environments make them prone to failures. The traditional approach to achieve a high dependability for these systems relies on constant monitoring. However, this method is purely reactive. A more proactive approach is provided by online failure prediction (OFP) techniques. In this paper, we describe a OFP system for private IaaS platforms, currently under development, that combines di_erent types of data input, including monitoring information, event logs, and failure data. In addition, this system operates at both the physical and virtual planes of the cloud, taking into account the relationships between nodes and failure propagation mechanisms that are unique to cloud environments.

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Since the mid 80ies the Trans ‐European Transport Network (TEN‐T) policy has been setting the framework for the development of infrastructure for the smooth functioning of the internal market within the European Union (EU). Public Private Partnerships (PPPs) have always been regarded by the EU as a key instrument to promote the TEN‐T.