Avaliação do programa de tutorização da EMATER-RN para servidores em estágio probatório

The present thesis evaluated the contributions and limitations of the tutorship program introduced in EMATER-RN, as a tactic of organizational socialization for civil servants in probationary stage. Tutorship was understood as an intensive and continuous relational process, in which a more experienced person in the organization the tutor offers psychosocial support, stimulates the development of the professional career and enables to the newcomer the tutee learning on job performance. The organizational socialization was considered in the perspective of the symbolic interactionism. The study was characterized as a program evaluation and as an action research. The practical interventions for the program implementation were conducted and, at the same time, the evaluations of process, results and reaction to the program were applied. Among the major contributions of the action research, it stood out: the diagnosis of reasons for the formation of the pair and of expectations of tutors and tutees, the improvement of the tutorship registration tools, the ascertainment of the success of the program in the socialization of the new civil servants, the confirmation of the importance of the compatibility among them and of the adequate performance of tutorship functions for achieving its benefits. Based in constraints of the program, one may quote as essential recommendations: the formation of a technical team supporting the program, the clear establishment of deadlines for each procedure and the reinforcement to its compliance, the investigation of the functions performed by the tutor, the sensitization of the managers to the resolution of problems that affect the program, the voluntary participation of the tutor and the continuous meetings of tutors and tutees. One settles for the relevance of the program and in favor of its continuation, provided that its improvement and systematic management are conducted.

Implementação Hardware/Software da estimação de movimento segundo o padrão H.264

Motion estimation is the main responsible for data reduction in digital video encoding. It is also the most computational damanding step. H.264 is the newest standard for video compression and was planned to double the compression ratio achievied by previous standards. It was developed by the ITU-T Video Coding Experts Group (VCEG) together with the ISO/IEC Moving Picture Experts Group (MPEG) as the product of a partnership effort known as the Joint Video Team (JVT). H.264 presents novelties that improve the motion estimation efficiency, such as the adoption of variable block-size, quarter pixel precision and multiple reference frames. This work defines an architecture for motion estimation in hardware/software, using a full search algorithm, variable block-size and mode decision. This work consider the use of reconfigurable devices, soft-processors and development tools for embedded systems such as Quartus II, SOPC Builder, Nios II and ModelSim

Avaliação do Uso de Smartphones na Interação com as Aplicações da Televisão Digital Brasileira

Brazil is going through the process from analogical transmission to digital transmission. This new technology, in addition to providing a high quality audio and video, also allows applications to execute on television. Equipment called Set-Top Box are needed to allow the reception of this new signal and create the appropriate environment necessary to execute applications. At first, the only way to interact with these applications is given by remote control. However, the remote control has serious usability problems when used to interact with some types of applications. This research suggests a software resources implementation capable to create a environment that allows a smartphone to interact with applications. Besides this implementation, is performed a comparative study between use remote controle and smartphones to interact with applications of digital television, taking into account parameters related to usability. After analysis of data collected by the comparative study is possible to identify which device provides an interactive experience more interesting for users

Desenvolvimento de chatterbots educacionais: um estudo de caso voltado ao ensino de algoritmos

In development of Synthetic Agents for Education, the doubt still resides about what would be a behavior that could be considered, in fact, plausible for this agent's type, which can be considered as effective on the transmission of the knowledge by the agent and the function of emotions this process. The purpose of this labor has an investigative nature in an attempt to discover what aspects are important for this behavior consistent and practical development of a chatterbot with the function of virtual tutor, within the context of learning algorithms. In this study, we explained the agents' basics, Intelligent Tutoring Systems, bots, chatterbots and how these systems need to provide credibility to report on their behavior. Models of emotions, personality and humor to computational agents are also covered, as well as previous studies by other researchers at the area. After that, the prototype is detailed, the research conducted, a summary of results achieved, the architectural model of the system, vision of computing and macro view of the features implemented.

Avaliação da execução de aplicações orientadas à dados na arquitetura de redes em chip IPNoSys

The increasing complexity of integrated circuits has boosted the development of communications architectures like Networks-on-Chip (NoCs), as an architecture; alternative for interconnection of Systems-on-Chip (SoC). Networks-on-Chip complain for component reuse, parallelism and scalability, enhancing reusability in projects of dedicated applications. In the literature, lots of proposals have been made, suggesting different configurations for networks-on-chip architectures. Among all networks-on-chip considered, the architecture of IPNoSys is a non conventional one, since it allows the execution of operations, while the communication process is performed. This study aims to evaluate the execution of data-flow based applications on IPNoSys, focusing on their adaptation against the design constraints. Data-flow based applications are characterized by the flowing of continuous stream of data, on which operations are executed. We expect that these type of applications can be improved when running on IPNoSys, because they have a programming model similar to the execution model of this network. By observing the behavior of these applications when running on IPNoSys, were performed changes in the execution model of the network IPNoSys, allowing the implementation of an instruction level parallelism. For these purposes, analysis of the implementations of dataflow applications were performed and compared

Contribuições para verificação automática de applets javacard

The widespread growth in the use of smart cards (by banks, transport services, and cell phones, etc) has brought an important fact that must be addressed: the need of tools that can be used to verify such cards, so to guarantee the correctness of their software. As the vast majority of cards that are being developed nowadays use the JavaCard technology as they software layer, the use of the Java Modeling Language (JML) to specify their programs appear as a natural solution. JML is a formal language tailored to Java. It has been inspired by methodologies from Larch and Eiffel, and has been widely adopted as the de facto language when dealing with specification of any Java related program. Various tools that make use of JML have already been developed, covering a wide range of functionalities, such as run time and static checking. But the tools existent so far for static checking are not fully automated, and, those that are, do not offer an adequate level of soundness and completeness. Our objective is to contribute to a series of techniques, that can be used to accomplish a fully automated and confident verification of JavaCard applets. In this work we present the first steps to this. With the use of a software platform comprised by Krakatoa, Why and haRVey, we developed a set of techniques to reduce the size of the theory necessary to verify the specifications. Such techniques have yielded very good results, with gains of almost 100% in all tested cases, and has proved as a valuable technique to be used, not only in this, but in most real world problems related to automatic verification

Implementação da técnica de software pipelining na rede em chip IPNoSyS

Alongside the advances of technologies, embedded systems are increasingly present in our everyday. Due to increasing demand for functionalities, many tasks are split among processors, requiring more efficient communication architectures, such as networks on chip (NoC). The NoCs are structures that have routers with channel point-to-point interconnect the cores of system on chip (SoC), providing communication. There are several networks on chip in the literature, each with its specific characteristics. Among these, for this work was chosen the Integrated Processing System NoC (IPNoSyS) as a network on chip with different characteristics compared to general NoCs, because their routing components also accumulate processing function, ie, units have functional able to execute instructions. With this new model, packets are processed and routed by the router architecture. This work aims at improving the performance of applications that have repetition, since these applications spend more time in their execution, which occurs through repeated execution of his instructions. Thus, this work proposes to optimize the runtime of these structures by employing a technique of instruction-level parallelism, in order to optimize the resources offered by the architecture. The applications are tested on a dedicated simulator and the results compared with the original version of the architecture, which in turn, implements only packet level parallelism

Controle adaptativo por modelo de referencia e estrutura variável discreto no tempo

With the technology progess, embedded systems using adaptive techniques are being used frequently. One of these techniques is the Variable Structure Model- Reference Adaptive Control (VS-MRAC). The implementation of this technique in embedded systems, requires consideration of a sampling period which if not taken into consideration, can adversely affect system performance and even takes the system to instability. This work proposes a stability analysis of a discrete-time VS-MRAC accomplished for SISO linear time-invariant plants with relative degree one. The aim is to analyse the in uence of the sampling period in the system performance and the relation of this period with the chattering and system instability

Concepção, desenvolvimento e aplicação do banco de imagens georreferenciadas no contexto do mapeamento terrestre móvel

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Influência da injunção da base na fototriangulação de imagens obtidas com uma unidade de mapeamento móvel

Pós-graduação em Ciências Cartográficas - FCT

Algoritmos de detecção de bordas implementados em FPGA

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Navegação de robôs em ambientes internos usando slam

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

MATIW 1451 - monitoramento e acionamento de transdutores inteligentes através da Web (Padrão IEEE 1451)

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Design instrucional: uma abordagem do design gráfico para o desenvolvimento de ferramentas de suporte à Educação a Distância

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Estágio supervisionado na formação docente em serviço: do 'aproveitamento' da prática à tentativa de reinventar os professores

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)