Experience with the first Internet-based course at the Faculty of Medicine, University of São Paulo

PURPOSE: The Internet expands the range and flexibility of teaching options and enhances the ability to process the ever-increasing volume of medical knowledge. The aim of this study is to describe and discuss our experience with transforming a traditional medical training course into an Internet-based course. METHOD: Sixty-nine students were enrolled for a one-month course. They answered pre- and post-course questionnaires and took a multiple-choice test to evaluate the acquired knowledge. RESULTS: Students reported that the primary value for them of this Internet-based course was that they could choose the time of their class attendance (67%). The vast majority (94%) had a private computer and were used to visiting the Internet (75%) before the course. During the course, visits were mainly during the weekends (35%) and on the last week before the test (29%). Thirty-one percent reported that they could learn by reading only from the computer screen, without the necessity of printed material. Students were satisfied with this teaching method as evidenced by the 89% who reported enjoying the experience and the 88% who said they would enroll for another course via the Internet. The most positive aspect was freedom of scheduling, and the most negative was the lack of personal contact with the teacher. From the 80 multiple-choice questions, the mean of correct answers was 45.5, and of incorrect, 34.5. CONCLUSIONS: This study demonstrates that students can successfully learn with distance learning. It provides useful information for developing other Internet-based courses. The importance of this new tool for education in a large country like Brazil seems clear.

Project management under uncertainty: a study on solution methods

Project Management involves onetime endeavors that demand for getting it right the first time. On the other hand, project scheduling, being one of the most modeled project management process stages, still faces a wide gap from theory to practice. Demanding computational models and their consequent call for simplification, divert the implementation of such models in project management tools from the actual day to day project management process. Special focus is being made to the robustness of the generated project schedules facing the omnipresence of uncertainty. An "easy" way out is to add, more or less cleverly calculated, time buffers that always result in project duration increase and correspondingly, in cost. A better approach to deal with uncertainty seems to be to explore slack that might be present in a given project schedule, a fortiori when a non-optimal schedule is used. The combination of such approach to recent advances in modeling resource allocation and scheduling techniques to cope with the increasing flexibility in resources, as can be expressed in "Flexible Resource Constraint Project Scheduling Problem" (FRCPSP) formulations, should be a promising line of research to generate more adequate project management tools. In reality, this approach has been frequently used, by project managers in an ad-hoc way.

Concurrency detection on finish-to-start activity precedence networks

We explore the finish-to-start precedence relations of project activities used in scheduling problems. From these relations, we devise a method to identify groups of activities that could execute concurrently, i.e. activities in the same group can all execute in parallel. The method derives a new set of relations to describe the concurrency. Then, it is represented by an undirected graph and the maximal cliques problem identifies the groups. We provide a running example with a project from our previous studies in resource constrained project cost minimization together with an example application on the concurrency detection method: the evaluation of the resource stress.

Desenvolvimento de um Controlador com DSP para um Motor CA de 30 kW para o CEPIUM

Dissertação de mestrado integrado em Engenharia Eletrónica Industrial e Computadores

Desenvolvimento de um processador VLIW

Dissertação de mestrado integrado em Engenharia Eletrónica Industrial e Computadores

Análise e simulação da produção de moldes para injeção de plásticos

Dissertação de mestrado em Engenharia Industrial

Automatização e otimização do escalonamento de pessoal hospitalar

Dissertação de mestrado em Engenharia de Sistemas

Hybrid hypervisor partially deployed on FPGA

Tese de Doutoramento em Engenharia Eletrónica e Computadores.

Optimização do processo de recolha de resíduos: desenvolvimento de ferramentas de investigação operacional para o problema de orientação de equipas com multi-restrições

Tese de Doutoramento em Engenharia Industrial e de Sistemas.

Aceleración de Algoritmos en Procesadores Multicore, GPGPU y FPGA. Algorithm Acceleration with Multicore, GPGPU and FPGA Processors.

El avance en la potencia de cómputo en nuestros días viene dado por la paralelización del procesamiento, dadas las características que disponen las nuevas arquitecturas de hardware. Utilizar convenientemente este hardware impacta en la aceleración de los algoritmos en ejecución (programas). Sin embargo, convertir de forma adecuada el algoritmo en su forma paralela es complejo, y a su vez, esta forma, es específica para cada tipo de hardware paralelo. En la actualidad los procesadores de uso general más comunes son los multicore, procesadores paralelos, también denominados Symmetric Multi-Processors (SMP). Hoy en día es difícil hallar un procesador para computadoras de escritorio que no tengan algún tipo de paralelismo del caracterizado por los SMP, siendo la tendencia de desarrollo, que cada día nos encontremos con procesadores con mayor numero de cores disponibles. Por otro lado, los dispositivos de procesamiento de video (Graphics Processor Units - GPU), a su vez, han ido desarrollando su potencia de cómputo por medio de disponer de múltiples unidades de procesamiento dentro de su composición electrónica, a tal punto que en la actualidad no es difícil encontrar placas de GPU con capacidad de 200 a 400 hilos de procesamiento paralelo. Estos procesadores son muy veloces y específicos para la tarea que fueron desarrollados, principalmente el procesamiento de video. Sin embargo, como este tipo de procesadores tiene muchos puntos en común con el procesamiento científico, estos dispositivos han ido reorientándose con el nombre de General Processing Graphics Processor Unit (GPGPU). A diferencia de los procesadores SMP señalados anteriormente, las GPGPU no son de propósito general y tienen sus complicaciones para uso general debido al límite en la cantidad de memoria que cada placa puede disponer y al tipo de procesamiento paralelo que debe realizar para poder ser productiva su utilización. Los dispositivos de lógica programable, FPGA, son dispositivos capaces de realizar grandes cantidades de operaciones en paralelo, por lo que pueden ser usados para la implementación de algoritmos específicos, aprovechando el paralelismo que estas ofrecen. Su inconveniente viene derivado de la complejidad para la programación y el testing del algoritmo instanciado en el dispositivo. Ante esta diversidad de procesadores paralelos, el objetivo de nuestro trabajo está enfocado en analizar las características especificas que cada uno de estos tienen, y su impacto en la estructura de los algoritmos para que su utilización pueda obtener rendimientos de procesamiento acordes al número de recursos utilizados y combinarlos de forma tal que su complementación sea benéfica. Específicamente, partiendo desde las características del hardware, determinar las propiedades que el algoritmo paralelo debe tener para poder ser acelerado. Las características de los algoritmos paralelos determinará a su vez cuál de estos nuevos tipos de hardware son los mas adecuados para su instanciación. En particular serán tenidos en cuenta el nivel de dependencia de datos, la necesidad de realizar sincronizaciones durante el procesamiento paralelo, el tamaño de datos a procesar y la complejidad de la programación paralela en cada tipo de hardware. Today´s advances in high-performance computing are driven by parallel processing capabilities of available hardware architectures. These architectures enable the acceleration of algorithms when thes ealgorithms are properly parallelized and exploit the specific processing power of the underneath architecture. Most current processors are targeted for general pruposes and integrate several processor cores on a single chip, resulting in what is known as a Symmetric Multiprocessing (SMP) unit. Nowadays even desktop computers make use of multicore processors. Meanwhile, the industry trend is to increase the number of integrated rocessor cores as technology matures. On the other hand, Graphics Processor Units (GPU), originally designed to handle only video processing, have emerged as interesting alternatives to implement algorithm acceleration. Current available GPUs are able to implement from 200 to 400 threads for parallel processing. Scientific computing can be implemented in these hardware thanks to the programability of new GPUs that have been denoted as General Processing Graphics Processor Units (GPGPU).However, GPGPU offer little memory with respect to that available for general-prupose processors; thus, the implementation of algorithms need to be addressed carefully. Finally, Field Programmable Gate Arrays (FPGA) are programmable devices which can implement hardware logic with low latency, high parallelism and deep pipelines. Thes devices can be used to implement specific algorithms that need to run at very high speeds. However, their programmability is harder that software approaches and debugging is typically time-consuming. In this context where several alternatives for speeding up algorithms are available, our work aims at determining the main features of thes architectures and developing the required know-how to accelerate algorithm execution on them. We look at identifying those algorithms that may fit better on a given architecture as well as compleme

monitoring-based approach to object-oriented real-time computing

Monitoring, object-orientation, real-time, execution-time, scheduling

middleware for cooperating mobile embedded systems

Mobile embedded systems, wireless communication, real-time systems, real-time scheduling, communication protocols, cooperation, reliability and fault-tolerance, middleware

Optimal operation of multiproduct batch plants

Multiproduct plants, Dynamic Optimization, Mixed Integer Linear/Non-Linear Programming, Scheduling

A Grid Supercomputing Enviroment for High Demand Computational Applications

Despite the huge increase in processor and interprocessor network performace, many computational problems remain unsolved due to lack of some critical resources such as floating point sustained performance, memory bandwidth, etc... Examples of these problems are found in areas of climate research, biology, astrophysics, high energy physics (montecarlo simulations) and artificial intelligence, among others. For some of these problems, computing resources of a single supercomputing facility can be 1 or 2 orders of magnitude apart from the resources needed to solve some them. Supercomputer centers have to face an increasing demand on processing performance, with the direct consequence of an increasing number of processors and systems, resulting in a more difficult administration of HPC resources and the need for more physical space, higher electrical power consumption and improved air conditioning, among other problems. Some of the previous problems can´t be easily solved, so grid computing, intended as a technology enabling the addition and consolidation of computing power, can help in solving large scale supercomputing problems. In this document, we describe how 2 supercomputing facilities in Spain joined their resources to solve a problem of this kind. The objectives of this experience were, among others, to demonstrate that such a cooperation can enable the solution of bigger dimension problems and to measure the efficiency that could be achieved. In this document we show some preliminary results of this experience and to what extend these objectives were achieved.

Econometrics

This is a project to develop a document for teaching graduate econometrics that is "open source", specifically, licensed as GNU GPL. That is, anyone can access the document in editable form, and can modify it, as long as they make their modifications available. This allows for personalization, as well as a simple way to make contributions and error corrections. The hope is that people preparing to teach econometrics for the first time might find it useful, and eventually be motivated to contribute back to the project. The central document is something between a set of lecture notes and a text book. It's not as terse as lecture notes, but not as complete or well-referenced as a text book. Of course, the document is constantly evolving, and you are welcome to modify it as you like. The document contains (at least when viewed in HTML or PDF form) hyperlinks to example programs written using the GNU/Octave language. The document itself is written using the LyX word processor. LyX documents can be exported as LaTeX, so the system is quite portable.