Mining Cell Transition Data

Cell transition data is obtained from a cellular phone that switches its current serving cell tower. The data consists of a sequence of transition events, which are pairs of cell identifiers and transition times. The focus of this thesis is applying data mining methods to such data, developing new algorithms, and extracting knowledge that will be a solid foundation on which to build location-aware applications. In addition to a thorough exploration of the features of the data, the tools and methods developed in this thesis provide solutions to three distinct research problems. First, we develop clustering algorithms that produce a reliable mapping between cell transitions and physical locations observed by users of mobile devices. The main clustering algorithm operates in online fashion, and we consider also a number of offline clustering methods for comparison. Second, we define the concept of significant locations, known as bases, and give an online algorithm for determining them. Finally, we consider the task of predicting the movement of the user, based on historical data. We develop a prediction algorithm that considers paths of movement in their entirety, instead of just the most recent movement history. All of the presented methods are evaluated with a significant body of real cell transition data, collected from about one hundred different individuals. The algorithms developed in this thesis are designed to be implemented on a mobile device, and require no extra hardware sensors or network infrastructure. By not relying on external services and keeping the user information as much as possible on the user s own personal device, we avoid privacy issues and let the users control the disclosure of their location information.

Implementation of placement and routing algorithms for computer aided design of printed circuit boards

The Printed Circuit Board (PCB) layout design is one of the most important and time consuming phases during equipment design process in all electronic industries. This paper is concerned with the development and implementation of a computer aided PCB design package. A set of programs which operate on a description of the circuit supplied by the user in the form of a data file and subsequently design the layout of a double-sided PCB has been developed. The algorithms used for the design of the PCB optimise the board area and the length of copper tracks used for the interconnections. The output of the package is the layout drawing of the PCB, drawn on a CALCOMP hard copy plotter and a Tektronix 4012 storage graphics display terminal. The routing density (the board area required for one component) achieved by this package is typically 0.8 sq. inch per IC. The package is implemented on a DEC 1090 system in Pascal and FORTRAN and SIGN(1) graphics package is used for display generation.

Experimental networking of microcomputers and a minicomputer

The objective of this paper is to discuss some hardware and software features of an experimental network of 8080 and 8085 microcomputers named Micronet. The interprocessor communication in the ring network is established using ring interfaces consisting of universal synchronous-asynchronous receivers-transmitters (USARTs). Another aspect considered is the interfacing of an 8080 microcomputer to a PDP-11/35 minicomputer and the development of the software for the microcomputer-minicomputer link which has been established over a serial line using the USART interface of the microcomputer and the DZ11 module of the minicomputer. This is useful in developing a host-satellite configuration of microcomputers and the minicomputer.

A network forensics tool for precise data packet capture and replay in cyber-physical systems

Network data packet capture and replay capabilities are basic requirements for forensic analysis of faults and security-related anomalies, as well as for testing and development. Cyber-physical networks, in which data packets are used to monitor and control physical devices, must operate within strict timing constraints, in order to match the hardware devices' characteristics. Standard network monitoring tools are unsuitable for such systems because they cannot guarantee to capture all data packets, may introduce their own traffic into the network, and cannot reliably reproduce the original timing of data packets. Here we present a high-speed network forensics tool specifically designed for capturing and replaying data traffic in Supervisory Control and Data Acquisition systems. Unlike general-purpose "packet capture" tools it does not affect the observed network's data traffic and guarantees that the original packet ordering is preserved. Most importantly, it allows replay of network traffic precisely matching its original timing. The tool was implemented by developing novel user interface and back-end software for a special-purpose network interface card. Experimental results show a clear improvement in data capture and replay capabilities over standard network monitoring methods and general-purpose forensics solutions.

Tietokannan hallintajärjestelmän optimointi flash-muistia varten

Viime aikoina yleistyneet flash-muistiin perustuvat tallennusvälineet ovat monessa suhteessa kiintolevyä parempia. Flash-muistissa on kuitenkin useita erityispiirteitä, jotka vaikeuttavat sen käyttöönottoa tietokantajärjestelmässä. Flash-muistissa kirjoittaminen on hitaampaa kuin lukeminen. Erityisesti hajanaisten sivujen päivittäminen on hidasta. Hajaluku flash-muistista on huomattavasti nopeampaa kuin kiintolevyltä. Näiden erityispiirteiden vuoksi tietokannan hallintajärjestelmä on optimoitava erikseen flash-muistia varten. Tässä optimoinnissa lähes kaikki tietokannan hallintajärjestelmän osa-alueet on toteutettava uudelleen flash-muistin näkökulmasta. Flash-muistin nopean hajaluvun ansiosta relaatioiden tiedot voidaan sijoitella flash-muistiin vapaammin kuin kiintolevylle. Yleisin tietokannoissa käytetty hakemistorakenne B+-puu ei toimi tehokkaasti flash-muistissa hajapäivitysten suuren määrän vuoksi. Flashmuistia varten on kehitetty useita B+-puun muunnelmia, joissa hajapäivitysten määrää on onnistuttu vähentämään. Puskurin hallintaa voidaan optimoida flash-muistia varten vähentämällä hitaiden kirjoitusten määrää nopeiden lukujen määrän kustannuksella sekä muuttamalla hitaita hajakirjoituksia nopeammiksi peräkkäisten sivujen kirjoituksiksi. B.3 (hardware, memory structures) H.2.2 (database management, physical design)

Graphical simulation of Petri Nets

An interactive graphics package for modeling with Petri Nets has been implemented. It uses the VT-11 graphics terminal supported on the PDP-11/35 computer to draw, execute, analyze, edit and redraw a Petri Net. Each of the above mentioned tasks can be performed by selecting appropriate items from a menu displayed on the screen. Petri Nets with a reasonably large number of nodes can be created and analyzed using this package. The number of nodes supported may be increased by making simple changes in the program. Being interactive, the program seeks information from the user after displaying appropriate messages on the terminal. After completing the Petri Net, it may be executed step by step and the changes in the number of tokens may be observed on the screen, at each place. Some properties of Petri Nets like safety, boundedness, conservation and redundancy can be checked using this package. This package can be used very effectively for modeling asynchronous (concurrent) systems with Petri Nets and simulating the model by “graphical execution.”

Animated Mise-en-scene and aesthetic harmony: An expansion of the traditional principles of animation to 3D computer animation

3D Computer Graphics (CG) has become the dominant medium for modern animated feature films. It is widely understood that traditional principles of animation developed in the 1930s at the Walt Disney Studio remain applicable to this new medium and heavily influence the range of aesthetic motion styles in contemporary animation. Via a frame-by-frame textual analysis of four animated feature films, this thesis tests and confirms the validity of the principles of animation and expands upon them by reinterpreting the Disney principle of appeal as aesthetic harmony, which delineates the way in which character posing and transitions between poses contribute to the animated motion styles that animators work in today.

Molecular modeling of Bt Cry1Ac (DI–DII)–ASAL (Allium sativum lectin)–fusion protein and its interaction with aminopeptidase N (APN) receptor of Manduca sexta

Genetic engineering of Bacillus thuringiensis (Bt) Cry proteins has resulted in the synthesis of various novel toxin proteins with enhanced insecticidal activity and specificity towards different insect pests. In this study, a fusion protein consisting of the DI–DII domains of Cry1Ac and garlic lectin (ASAL) has been designed in silico by replacing the DIII domain of Cry1Ac with ASAL. The binding interface between the DI–DII domains of Cry1Ac and lectin has been identified using protein–protein docking studies. Free energy of binding calculations and interaction profiles between the Cry1Ac and lectin domains confirmed the stability of fusion protein. A total of 18 hydrogen bonds was observed in the DI–DII–lectin fusion protein compared to 11 hydrogen bonds in the Cry1Ac (DI–DII–DIII) protein. Molecular mechanics/Poisson–Boltzmann (generalized-Born) surface area [MM/PB (GB) SA] methods were used for predicting free energy of interactions of the fusion proteins. Protein–protein docking studies based on the number of hydrogen bonds, hydrophobic interactions, aromatic–aromatic, aromatic–sulphur, cation–pi interactions and binding energy of Cry1Ac/fusion proteins with the aminopeptidase N (APN) of Manduca sexta rationalised the higher binding affinity of the fusion protein with the APN receptor compared to that of the Cry1Ac–APN complex, as predicted by ZDOCK, Rosetta and ClusPro analysis. The molecular binding interface between the fusion protein and the APN receptor is well packed, analogously to that of the Cry1Ac–APN complex. These findings offer scope for the design and development of customized fusion molecules for improved pest management in crop plants.

Redefine: Runtime Reconfigurable Polymorphic ASIC

Emerging embedded applications are based on evolving standards (e.g., MPEG2/4, H.264/265, IEEE802.11a/b/g/n). Since most of these applications run on handheld devices, there is an increasing need for a single chip solution that can dynamically interoperate between different standards and their derivatives. In order to achieve high resource utilization and low power dissipation, we propose REDEFINE, a polymorphic ASIC in which specialized hardware units are replaced with basic hardware units that can create the same functionality by runtime re-composition. It is a ``future-proof'' custom hardware solution for multiple applications and their derivatives in a domain. In this article, we describe a compiler framework and supporting hardware comprising compute, storage, and communication resources. Applications described in high-level language (e.g., C) are compiled into application substructures. For each application substructure, a set of compute elements on the hardware are interconnected during runtime to form a pattern that closely matches the communication pattern of that particular application. The advantage is that the bounded CEs are neither processor cores nor logic elements as in FPGAs. Hence, REDEFINE offers the power and performance advantage of an ASIC and the hardware reconfigurability and programmability of that of an FPGA/instruction set processor. In addition, the hardware supports custom instruction pipelining. Existing instruction-set extensible processors determine a sequence of instructions that repeatedly occur within the application to create custom instructions at design time to speed up the execution of this sequence. We extend this scheme further, where a kernel is compiled into custom instructions that bear strong producer-consumer relationship (and not limited to frequently occurring sequences of instructions). Custom instructions, realized as hardware compositions effected at runtime, allow several instances of the same to be active in parallel. A key distinguishing factor in majority of the emerging embedded applications is stream processing. To reduce the overheads of data transfer between custom instructions, direct communication paths are employed among custom instructions. In this article, we present the overview of the hardware-aware compiler framework, which determines the NoC-aware schedule of transports of the data exchanged between the custom instructions on the interconnect. The results for the FFT kernel indicate a 25% reduction in the number of loads/stores, and throughput improves by log(n) for n-point FFT when compared to sequential implementation. Overall, REDEFINE offers flexibility and a runtime reconfigurability at the expense of 1.16x in power and 8x in area when compared to an ASIC. REDEFINE implementation consumes 0.1x the power of an FPGA implementation. In addition, the configuration overhead of the FPGA implementation is 1,000x more than that of REDEFINE.

An Input Triggered Polymorphic ASIC for H.264 Decoding

This paper reports the design of an input-triggered polymorphic ASIC for H.264 baseline decoder. Hardware polymorphism is achieved by selectively reusing hardware resources at system and module level. Complete design is done using ESL design tools following a methodology that maintains consistency in testing and verification throughout the design flow. The proposed design can support frame sizes from QCIF to 1080p.

Evaluating viewpoint entropy for ribbon representation of protein structure

While many measures of viewpoint goodness have been proposed in computer graphics, none have been evaluated for ribbon representations of protein secondary structure. To fill this gap, we conducted a user study on Amazon’s Mechanical Turk platform, collecting human viewpoint preferences from 65 participants for 4 representative su- perfamilies of protein domains. In particular, we evaluated viewpoint entropy, which was previously shown to be a good predictor for human viewpoint preference of other, mostly non-abstract objects. In a second study, we asked 7 molecular biology experts to find the best viewpoint of the same protein domains and compared their choices with viewpoint entropy. Our results show that viewpoint entropy overall is a significant predictor of human viewpoint preference for ribbon representations of protein secondary structure. However, the accuracy is highly dependent on the complexity of the structure: while most participants agree on good viewpoints for small, non-globular structures with few secondary structure elements, viewpoint preference varies considerably for complex structures. Finally, experts tend to choose viewpoints of both low and high viewpoint entropy to emphasize different aspects of the respective structure.

NUVIEW:software for display and interactive manipulation of nucleic acid models

The NUVIEW software package allows skeletal models of any double helical nucleic acid molecule to be displayed out a graphics monitor and to apply various rotations, translations and scaling transformations interactively, through the keyboard. The skeletal model is generated by connecting any pair of representative points, one from each of the bases in the basepair. In addition to the above mentioned manipulations, the base residues can be identified by using a locator and the distance between any pair of residues can be obtained. A sequence based color coded display allows easy identification of sequence repeats, such as runs of Adenines. The real time interactive manipulation of such skeletal models for large DNA/RNA double helices, can be used to trace the path of the nucleic acid chain in three dimensions and hence get a better idea of its topology, location of linear or curved regions, distances between far off regions in the sequence etc. A physical picture of these features will assist in understanding the relationship between base sequence, structure and biological function in nucleic acids.

Development and evaluation of a spatial decision support system for malaria elimination in Bhutan

Background: Bhutan has reduced its malaria incidence significantly in the last 5 years, and is aiming for malaria elimination by 2016. To assist with the management of the Bhutanese malaria elimination programme a spatial decision support system (SDSS) was developed. The current study aims to describe SDSS development and evaluate SDSS utility and acceptability through informant interviews. Methods: The SDSS was developed based on the open-source Quantum geographical information system (QGIS) and piloted to support the distribution of long-lasting insecticidal nets (LLINs) and indoor residual spraying (IRS) in the two sub-districts of Samdrup Jongkhar District. It was subsequently used to support reactive case detection (RACD) in the two sub-districts of Samdrup Jongkhar and two additional sub-districts in Sarpang District. Interviews were conducted to ascertain perceptions on utility and acceptability of 11 informants using the SDSS, including programme and district managers, and field workers. Results: A total of 1502 households with a population of 7165 were enumerated in the four sub-districts, and a total of 3491 LLINs were distributed with one LLIN per 1.7 persons. A total of 279 households representing 728 residents were involved with RACD. Informants considered that the SDSS was an improvement on previous methods for organizing LLIN distribution, IRS and RACD, and could be easily integrated into routine malaria and other vector-borne disease surveillance systems. Informants identified some challenges at the programme and field level, including the need for more skilled personnel to manage the SDSS, and more training to improve the effectiveness of SDSS implementation and use of hardware. Conclusions: The SDSS was well accepted and informants expected its use to be extended to other malaria reporting districts and other vector-borne diseases. Challenges associated with efficient SDSS use included adequate skills and knowledge, access to training and support, and availability of hardware including computers and global positioning system receivers.

MIPS: metal interactions in protein structures

MIPS (metal interactions in protein structures) is a database of metals in the three-dimensional acromolecular structures available in the Protein Data Bank. Bound metal ions in proteins have both catalytic and structural functions. The proposed database serves as an open resource for the analysis and visualization of all metals and their interactions with macromolecular (protein and nucleic acid) structures. MIPS can be searched via a user-friendly interface, and the interactions between metals and protein molecules, and the geometric parameters, can be viewed in both textual and graphical format using the freely available graphics plug-in Jmol. MIPS is updated regularly, by means of programmed scripts to find metal-containing proteins from newly released protein structures. The database is useful for studying the properties of coordination between metals and protein molecules. It also helps to improve understanding of the relationship between macromolecular structure and function. This database is intended to serve the scientific community working in the areas of chemical and structural biology, and is freely available to all users, around the clock, at http://dicsoft2.physics.iisc.ernet.in/mips/.

A Petri net model for evaluating packet buffering strategies in a network processor

Previous studies have shown that buffering packets in DRAM is a performance bottleneck. In order to understand the impediments in accessing the DRAM, we developed a detailed Petri net model of IP forwarding application on IXP2400 that models the different levels of the memory hierarchy. The cell based interface used to receive and transmit packets in a network processor leads to some small size DRAM accesses. Such narrow accesses to the DRAM expose the bank access latency, reducing the bandwidth that can be realized. With real traces up to 30% of the accesses are smaller than the cell size, resulting in 7.7% reduction in DRAM bandwidth. To overcome this problem, we propose buffering these small chunks of data in the on chip scratchpad memory. This scheme also exploits greater degree of parallelism between different levels of the memory hierarchy. Using real traces from the internet, we show that the transmit rate can be improved by an average of 21% over the base scheme without the use of additional hardware. Further, the impact of different traffic patterns on the network processor resources is studied. Under real traffic conditions, we show that the data bus which connects the off-chip packet buffer to the micro-engines, is the obstacle in achieving higher throughput.