Nueuo y famoso romance a la sagrada vida, passion, y muerte de JesuChristo, redentor, y Señor nuestro, trovado a la batalla naval, que la feliz Armada de la Liga Catolica ganò a los turcos

El pié de imp. consta en colofón

Thermal, stress, and traps effects in AlGaN/GaN HEMTs

GaN y AlN son materiales semiconductores piezoeléctricos del grupo III-V. La heterounión AlGaN/GaN presenta una elevada carga de polarización tanto piezoeléctrica como espontánea en la intercara, lo que genera en su cercanía un 2DEG de grandes concentración y movilidad. Este 2DEG produce una muy alta potencia de salida, que a su vez genera una elevada temperatura de red. Las tensiones de puerta y drenador provocan un stress piezoeléctrico inverso, que puede afectar a la carga de polarización piezoeléctrica y así influir la densidad 2DEG y las características de salida. Por tanto, la física del dispositivo es relevante para todos sus aspectos eléctricos, térmicos y mecánicos. En esta tesis se utiliza el software comercial COMSOL, basado en el método de elementos finitos (FEM), para simular el comportamiento integral electro-térmico, electro-mecánico y electro-térmico-mecánico de los HEMTs de GaN. Las partes de acoplamiento incluyen el modelo de deriva y difusión para el transporte electrónico, la conducción térmica y el efecto piezoeléctrico. Mediante simulaciones y algunas caracterizaciones experimentales de los dispositivos, hemos analizado los efectos térmicos, de deformación y de trampas. Se ha estudiado el impacto de la geometría del dispositivo en su auto-calentamiento mediante simulaciones electro-térmicas y algunas caracterizaciones eléctricas. Entre los resultados más sobresalientes, encontramos que para la misma potencia de salida la distancia entre los contactos de puerta y drenador influye en generación de calor en el canal, y así en su temperatura. El diamante posee une elevada conductividad térmica. Integrando el diamante en el dispositivo se puede dispersar el calor producido y así reducir el auto-calentamiento, al respecto de lo cual se han realizado diversas simulaciones electro-térmicas. Si la integración del diamante es en la parte superior del transistor, los factores determinantes para la capacidad disipadora son el espesor de la capa de diamante, su conductividad térmica y su distancia a la fuente de calor. Este procedimiento de disipación superior también puede reducir el impacto de la barrera térmica de intercara entre la capa adaptadora (buffer) y el substrato. La muy reducida conductividad eléctrica del diamante permite que pueda contactar directamente el metal de puerta (muy cercano a la fuente de calor), lo que resulta muy conveniente para reducir el auto-calentamiento del dispositivo con polarización pulsada. Por otra parte se simuló el dispositivo con diamante depositado en surcos atacados sobre el sustrato como caminos de disipación de calor (disipador posterior). Aquí aparece una competencia de factores que influyen en la capacidad de disipación, a saber, el surco atacado contribuye a aumentar la temperatura del dispositivo debido al pequeño tamaño del disipador, mientras que el diamante disminuiría esa temperatura gracias a su elevada conductividad térmica. Por tanto, se precisan capas de diamante relativamente gruesas para reducer ele efecto de auto-calentamiento. Se comparó la simulación de la deformación local en el borde de la puerta del lado cercano al drenador con estructuras de puerta estándar y con field plate, que podrían ser muy relevantes respecto a fallos mecánicos del dispositivo. Otras simulaciones se enfocaron al efecto de la deformación intrínseca de la capa de diamante en el comportamiento eléctrico del dispositivo. Se han comparado los resultados de las simulaciones de la deformación y las características eléctricas de salida con datos experimentales obtenidos por espectroscopía micro-Raman y medidas eléctricas, respectivamente. Los resultados muestran el stress intrínseco en la capa producido por la distribución no uniforme del 2DEG en el canal y la región de acceso. Además de aumentar la potencia de salida del dispositivo, la deformación intrínseca en la capa de diamante podría mejorar la fiabilidad del dispositivo modulando la deformación local en el borde de la puerta del lado del drenador. Finalmente, también se han simulado en este trabajo los efectos de trampas localizados en la superficie, el buffer y la barrera. Las medidas pulsadas muestran que tanto las puertas largas como las grandes separaciones entre los contactos de puerta y drenador aumentan el cociente entre la corriente pulsada frente a la corriente continua (lag ratio), es decir, disminuir el colapse de corriente (current collapse). Este efecto ha sido explicado mediante las simulaciones de los efectos de trampa de superficie. Por su parte, las referidas a trampas en el buffer se enfocaron en los efectos de atrapamiento dinámico, y su impacto en el auto-calentamiento del dispositivo. Se presenta también un modelo que describe el atrapamiento y liberación de trampas en la barrera: mientras que el atrapamiento se debe a un túnel directo del electrón desde el metal de puerta, el desatrapamiento consiste en la emisión del electrón en la banda de conducción mediante túnel asistido por fonones. El modelo también simula la corriente de puerta, debida a la emisión electrónica dependiente de la temperatura y el campo eléctrico. Además, también se ilustra la corriente de drenador dependiente de la temperatura y el campo eléctrico. ABSTRACT GaN and AlN are group III-V piezoelectric semiconductor materials. The AlGaN/GaN heterojunction presents large piezoelectric and spontaneous polarization charge at the interface, leading to high 2DEG density close to the interface. A high power output would be obtained due to the high 2DEG density and mobility, which leads to elevated lattice temperature. The gate and drain biases induce converse piezoelectric stress that can influence the piezoelectric polarization charge and further influence the 2DEG density and output characteristics. Therefore, the device physics is relevant to all the electrical, thermal, and mechanical aspects. In this dissertation, by using the commercial finite-element-method (FEM) software COMSOL, we achieved the GaN HEMTs simulation with electro-thermal, electro-mechanical, and electro-thermo-mechanical full coupling. The coupling parts include the drift-diffusion model for the electron transport, the thermal conduction, and the piezoelectric effect. By simulations and some experimental characterizations, we have studied the device thermal, stress, and traps effects described in the following. The device geometry impact on the self-heating was studied by electro-thermal simulations and electrical characterizations. Among the obtained interesting results, we found that, for same power output, the distance between the gate and drain contact can influence distribution of the heat generation in the channel and thus influence the channel temperature. Diamond possesses high thermal conductivity. Integrated diamond with the device can spread the generated heat and thus potentially reduce the device self-heating effect. Electro-thermal simulations on this topic were performed. For the diamond integration on top of the device (top-side heat spreading), the determinant factors for the heat spreading ability are the diamond thickness, its thermal conductivity, and its distance to the heat source. The top-side heat spreading can also reduce the impact of thermal boundary resistance between the buffer and the substrate on the device thermal behavior. The very low electrical conductivity of diamond allows that it can directly contact the gate metal (which is very close to the heat source), being quite convenient to reduce the self-heating for the device under pulsed bias. Also, the diamond coated in vias etched in the substrate as heat spreading path (back-side heat spreading) was simulated. A competing mechanism influences the heat spreading ability, i.e., the etched vias would increase the device temperature due to the reduced heat sink while the coated diamond would decrease the device temperature due to its higher thermal conductivity. Therefore, relative thick coated diamond is needed in order to reduce the self-heating effect. The simulated local stress at the gate edge of the drain side for the device with standard and field plate gate structure were compared, which would be relevant to the device mechanical failure. Other stress simulations focused on the intrinsic stress in the diamond capping layer impact on the device electrical behaviors. The simulated stress and electrical output characteristics were compared to experimental data obtained by micro-Raman spectroscopy and electrical characterization, respectively. Results showed that the intrinsic stress in the capping layer caused the non-uniform distribution of 2DEG in the channel and the access region. Besides the enhancement of the device power output, intrinsic stress in the capping layer can potentially improve the device reliability by modulating the local stress at the gate edge of the drain side. Finally, the surface, buffer, and barrier traps effects were simulated in this work. Pulsed measurements showed that long gates and distances between gate and drain contact can increase the gate lag ratio (decrease the current collapse). This was explained by simulations on the surface traps effect. The simulations on buffer traps effects focused on illustrating the dynamic trapping/detrapping in the buffer and the self-heating impact on the device transient drain current. A model was presented to describe the trapping and detrapping in the barrier. The trapping was the electron direct tunneling from the gate metal while the detrapping was the electron emission into the conduction band described by phonon-assisted tunneling. The reverse gate current was simulated based on this model, whose mechanism can be attributed to the temperature and electric field dependent electron emission in the barrier. Furthermore, the mechanism of the device bias via the self-heating and electric field impact on the electron emission and the transient drain current were also illustrated.

Einstein-like geometric structures on surfaces

An AH (affine hypersurface) structure is a pair comprising a projective equivalence class of torsion-free connections and a conformal structure satisfying a compatibility condition which is automatic in two dimensions. They generalize Weyl structures, and a pair of AH structures is induced on a co-oriented non-degenerate immersed hypersurface in flat affine space. The author has defined for AH structures Einstein equations, which specialize on the one hand to the usual Einstein Weyl equations and, on the other hand, to the equations for affine hyperspheres. Here these equations are solved for Riemannian signature AH structures on compact orientable surfaces, the deformation spaces of solutions are described, and some aspects of the geometry of these structures are related. Every such structure is either Einstein Weyl (in the sense defined for surfaces by Calderbank) or is determined by a pair comprising a conformal structure and a cubic holomorphic differential, and so by a convex flat real projective structure. In the latter case it can be identified with a solution of the Abelian vortex equations on an appropriate power of the canonical bundle. On the cone over a surface of genus at least two carrying an Einstein AH structure there are Monge-Amp`ere metrics of Lorentzian and Riemannian signature and a Riemannian Einstein K"ahler affine metric. A mean curvature zero spacelike immersed Lagrangian submanifold of a para-K"ahler four-manifold with constant para-holomorphic sectional curvature inherits an Einstein AH structure, and this is used to deduce some restrictions on such immersions.

Technology and characterization of GaN-HEMTs devices: high temperature and trapping effects

Los transistores de alta movilidad electrónica basados en GaN han sido objeto de una extensa investigación ya que tanto el GaN como sus aleaciones presentan unas excelentes propiedades eléctricas (alta movilidad, elevada concentración de portadores y campo eléctrico crítico alto). Aunque recientemente se han incluido en algunas aplicaciones comerciales, su expansión en el mercado está condicionada a la mejora de varios asuntos relacionados con su rendimiento y habilidad. Durante esta tesis se han abordado algunos de estos aspectos relevantes; por ejemplo, la fabricación de enhancement mode HEMTs, su funcionamiento a alta temperatura, el auto calentamiento y el atrapamiento de carga. Los HEMTs normalmente apagado o enhancement mode han atraído la atención de la comunidad científica dedicada al desarrollo de circuitos amplificadores y conmutadores de potencia, ya que su utilización disminuiría significativamente el consumo de potencia; además de requerir solamente una tensión de alimentación negativa, y reducir la complejidad del circuito y su coste. Durante esta tesis se han evaluado varias técnicas utilizadas para la fabricación de estos dispositivos: el ataque húmedo para conseguir el gate-recess en heterostructuras de InAl(Ga)N/GaN; y tratamientos basados en flúor (plasma CF4 e implantación de F) de la zona debajo de la puerta. Se han llevado a cabo ataques húmedos en heteroestructuras de InAl(Ga)N crecidas sobre sustratos de Si, SiC y zafiro. El ataque completo de la barrera se consiguió únicamente en las muestras con sustrato de Si. Por lo tanto, se puede deducir que la velocidad de ataque depende de la densidad de dislocaciones presentes en la estructura, ya que el Si presenta un peor ajuste del parámetro de red con el GaN. En relación a los tratamientos basados en flúor, se ha comprobado que es necesario realizar un recocido térmico después de la fabricación de la puerta para recuperar la heteroestructura de los daños causados durante dichos tratamientos. Además, el estudio de la evolución de la tensión umbral con el tiempo de recocido ha demostrado que en los HEMTs tratados con plasma ésta tiende a valores más negativos al aumentar el tiempo de recocido. Por el contrario, la tensión umbral de los HEMTs implantados se desplaza hacia valores más positivos, lo cual se atribuye a la introducción de iones de flúor a niveles más profundos de la heterostructura. Los transistores fabricados con plasma presentaron mejor funcionamiento en DC a temperatura ambiente que los implantados. Su estudio a alta temperatura ha revelado una reducción del funcionamiento de todos los dispositivos con la temperatura. Los valores iniciales de corriente de drenador y de transconductancia medidos a temperatura ambiente se recuperaron después del ciclo térmico, por lo que se deduce que dichos efectos térmicos son reversibles. Se han estudiado varios aspectos relacionados con el funcionamiento de los HEMTs a diferentes temperaturas. En primer lugar, se han evaluado las prestaciones de dispositivos de AlGaN/GaN sobre sustrato de Si con diferentes caps: GaN, in situ SiN e in situ SiN/GaN, desde 25 K hasta 550 K. Los transistores con in situ SiN presentaron los valores más altos de corriente drenador, transconductancia, y los valores más bajos de resistencia-ON, así como las mejores características en corte. Además, se ha confirmado que dichos dispositivos presentan gran robustez frente al estrés térmico. En segundo lugar, se ha estudiado el funcionamiento de transistores de InAlN/GaN con diferentes diseños y geometrías. Dichos dispositivos presentaron una reducción casi lineal de los parámetros en DC en el rango de temperaturas de 25°C hasta 225°C. Esto se debe principalmente a la dependencia térmica de la movilidad electrónica, y también a la reducción de la drift velocity con la temperatura. Además, los transistores con mayores longitudes de puerta mostraron una mayor reducción de su funcionamiento, lo cual se atribuye a que la drift velocity disminuye más considerablemente con la temperatura cuando el campo eléctrico es pequeño. De manera similar, al aumentar la distancia entre la puerta y el drenador, el funcionamiento del HEMT presentó una mayor reducción con la temperatura. Por lo tanto, se puede deducir que la degradación del funcionamiento de los HEMTs causada por el aumento de la temperatura depende tanto de la longitud de la puerta como de la distancia entre la puerta y el drenador. Por otra parte, la alta densidad de potencia generada en la región activa de estos transistores conlleva el auto calentamiento de los mismos por efecto Joule, lo cual puede degradar su funcionamiento y Habilidad. Durante esta tesis se ha desarrollado un simple método para la determinación de la temperatura del canal basado en medidas eléctricas. La aplicación de dicha técnica junto con la realización de simulaciones electrotérmicas han posibilitado el estudio de varios aspectos relacionados con el autocalentamiento. Por ejemplo, se han evaluado sus efectos en dispositivos sobre Si, SiC, y zafiro. Los transistores sobre SiC han mostrado menores efectos gracias a la mayor conductividad térmica del SiC, lo cual confirma el papel clave que desempeña el sustrato en el autocalentamiento. Se ha observado que la geometría del dispositivo tiene cierta influencia en dichos efectos, destacando que la distribución del calor generado en la zona del canal depende de la distancia entre la puerta y el drenador. Además, se ha demostrado que la temperatura ambiente tiene un considerable impacto en el autocalentamiento, lo que se atribuye principalmente a la dependencia térmica de la conductividad térmica de las capas y sustrato que forman la heterostructura. Por último, se han realizado numerosas medidas en pulsado para estudiar el atrapamiento de carga en HEMTs sobre sustratos de SiC con barreras de AlGaN y de InAlN. Los resultados obtenidos en los transistores con barrera de AlGaN han presentado una disminución de la corriente de drenador y de la transconductancia sin mostrar un cambio en la tensión umbral. Por lo tanto, se puede deducir que la posible localización de las trampas es la región de acceso entre la puerta y el drenador. Por el contrario, la reducción de la corriente de drenador observada en los dispositivos con barrera de InAlN llevaba asociado un cambio significativo en la tensión umbral, lo que implica la existencia de trampas situadas en la zona debajo de la puerta. Además, el significativo aumento del valor de la resistencia-ON y la degradación de la transconductancia revelan la presencia de trampas en la zona de acceso entre la puerta y el drenador. La evaluación de los efectos del atrapamiento de carga en dispositivos con diferentes geometrías ha demostrado que dichos efectos son menos notables en aquellos transistores con mayor longitud de puerta o mayor distancia entre puerta y drenador. Esta dependencia con la geometría se puede explicar considerando que la longitud y densidad de trampas de la puerta virtual son independientes de las dimensiones del dispositivo. Finalmente se puede deducir que para conseguir el diseño óptimo durante la fase de diseño no sólo hay que tener en cuenta la aplicación final sino también la influencia que tiene la geometría en los diferentes aspectos estudiados (funcionamiento a alta temperatura, autocalentamiento, y atrapamiento de carga). ABSTRACT GaN-based high electron mobility transistors have been under extensive research due to the excellent electrical properties of GaN and its related alloys (high carrier concentration, high mobility, and high critical electric field). Although these devices have been recently included in commercial applications, some performance and reliability issues need to be addressed for their expansion in the market. Some of these relevant aspects have been studied during this thesis; for instance, the fabrication of enhancement mode HEMTs, the device performance at high temperature, the self-heating and the charge trapping. Enhancement mode HEMTs have become more attractive mainly because their use leads to a significant reduction of the power consumption during the stand-by state. Moreover, they enable the fabrication of simpler power amplifier circuits and high-power switches because they allow the elimination of negativepolarity voltage supply, reducing significantly the circuit complexity and system cost. In this thesis, different techniques for the fabrication of these devices have been assessed: wet-etching for achieving the gate-recess in InAl(Ga)N/GaN devices and two different fluorine-based treatments (CF4 plasma and F implantation). Regarding the wet-etching, experiments have been carried out in InAl(Ga)N/GaN grown on different substrates: Si, sapphire, and SiC. The total recess of the barrier was achieved after 3 min of etching in devices grown on Si substrate. This suggests that the etch rate can critically depend on the dislocations present in the structure, since the Si exhibits the highest mismatch to GaN. Concerning the fluorine-based treatments, a post-gate thermal annealing was required to recover the damages caused to the structure during the fluorine-treatments. The study of the threshold voltage as a function of this annealing time has revealed that in the case of the plasma-treated devices it become more negative with the time increase. On the contrary, the threshold voltage of implanted HEMTs showed a positive shift when the annealing time was increased, which is attributed to the deep F implantation profile. Plasma-treated HEMTs have exhibited better DC performance at room temperature than the implanted devices. Their study at high temperature has revealed that their performance decreases with temperature. The initial performance measured at room temperature was recovered after the thermal cycle regardless of the fluorine treatment; therefore, the thermal effects were reversible. Thermal issues related to the device performance at different temperature have been addressed. Firstly, AlGaN/GaN HEMTs grown on Si substrate with different cap layers: GaN, in situ SiN, or in situ SiN/GaN, have been assessed from 25 K to 550 K. In situ SiN cap layer has been demonstrated to improve the device performance since HEMTs with this cap layer have exhibited the highest drain current and transconductance values, the lowest on-resistance, as well as the best off-state characteristics. Moreover, the evaluation of thermal stress impact on the device performance has confirmed the robustness of devices with in situ cap. Secondly, the high temperature performance of InAlN/GaN HEMTs with different layouts and geometries have been assessed. The devices under study have exhibited an almost linear reduction of the main DC parameters operating in a temperature range from room temperature to 225°C. This was mainly due to the thermal dependence of the electron mobility, and secondly to the drift velocity decrease with temperature. Moreover, HEMTs with large gate length values have exhibited a great reduction of the device performance. This was attributed to the greater decrease of the drift velocity for low electric fields. Similarly, the increase of the gate-to-drain distance led to a greater reduction of drain current and transconductance values. Therefore, this thermal performance degradation has been found to be dependent on both the gate length and the gate-to-drain distance. It was observed that the very high power density in the active region of these transistors leads to Joule self-heating, resulting in an increase of the device temperature, which can degrade the device performance and reliability. A simple electrical method have been developed during this work to determine the channel temperature. Furthermore, the application of this technique together with the performance of electro-thermal simulations have enabled the evaluation of different aspects related to the self-heating. For instance, the influence of the substrate have been confirmed by the study of devices grown on Si, SiC, and Sapphire. HEMTs grown on SiC substrate have been confirmed to exhibit the lowest self-heating effects thanks to its highest thermal conductivity. In addition to this, the distribution of the generated heat in the channel has been demonstrated to be dependent on the gate-to-drain distance. Besides the substrate and the geometry of the device, the ambient temperature has also been found to be relevant for the self-heating effects, mainly due to the temperature-dependent thermal conductivity of the layers and the substrate. Trapping effects have been evaluated by means of pulsed measurements in AlGaN and InAIN barrier devices. AlGaN barrier HEMTs have exhibited a de crease in drain current and transconductance without measurable threshold voltage change, suggesting the location of the traps in the gate-to-drain access region. On the contrary, InAIN barrier devices have showed a drain current associated with a positive shift of threshold voltage, which indicated that the traps were possibly located under the gate region. Moreover, a significant increase of the ON-resistance as well as a transconductance reduction were observed, revealing the presence of traps on the gate-drain access region. On the other hand, the assessment of devices with different geometries have demonstrated that the trapping effects are more noticeable in devices with either short gate length or the gate-to-drain distance. This can be attributed to the fact that the length and the trap density of the virtual gate are independent on the device geometry. Finally, it can be deduced that besides the final application requirements, the influence of the device geometry on the performance at high temperature, on the self-heating, as well as on the trapping effects need to be taken into account during the device design stage to achieve the optimal layout.

A genetic algorithm for slope stability analyses with concave slip surfaces using custom operators

Heuristic methods are popular tools to find critical slip surfaces in slope stability analyses. A new genetic algorithm (GA) is proposed in this work that has a standard structure but a novel encoding and generation of individuals with custom-designed operators for mutation and crossover that produce kinematically feasible slip surfaces with a high probability. In addition, new indices to assess the efficiency of operators in their search for the minimum factor of safety (FS) are proposed. The proposed GA is applied to traditional benchmark examples from the literature, as well as to a new practical example. Results show that the proposed GA is reliable, flexible and robust: it provides good minimum FS estimates that are not very sensitive to the number of nodes and that are very similar for different replications

Determination of critical slip surfaces using mutative scale chaos optimization

Limit equilibrium is a common method used to analyze the stability of a slope, and minimization of the factor of safety or identification of critical slip surfaces is a classical geotechnical problem in the context of limit equilibrium methods for slope stability analyses. A mutative scale chaos optimization algorithm is employed in this study to locate the noncircular critical slip surface with Spencer’s method being employed to compute the factor of safety. Four examples from the literature—one homogeneous slope and three layered slopes—are employed to identify the efficiency and accuracy of this approach. Results indicate that the algorithm is flexible and that although it does not generally provide the minimum FS, it provides results that are close to the minimum, an improvement over other solutions proposed in the literature and with small relative errors with respect to other minimum factor of safety (FS) values reported in the literature.

Offsets, Conchoids and Pedal Surfaces

We discuss three geometric constructions and their relations, namely the offset, the conchoid and the pedal construction. The offset surface F d of a given surface F is the set of points at fixed normal distance d of F. The conchoid surface G d of a given surface G is obtained by increasing the radius function by d with respect to a given reference point O. There is a nice relation between offsets and conchoids: The pedal surfaces of a family of offset surfaces are a family of conchoid surfaces. Since this relation is birational, a family of rational offset surfaces corresponds to a family of rational conchoid surfaces and vice versa. We present theoretical principles of this mapping and apply it to ruled surfaces and quadrics. Since these surfaces have rational offsets and conchoids, their pedal and inverse pedal surfaces are new classes of rational conchoid surfaces and rational offset surfaces.

Temperature performance of AlGaN/GaN MOS-HEMTs on Si substrates using Gd2O3 as gate dielectric

GaN based high electron mobility transistors have draw great attention due to its potential in high temperature, high power and high frequency applications [1, 2]. However, significant gate leakage current is still one of the issues which need to be solved to improve the performance and reliability of the devices [3]. Several research groups have contributed to solve this problem by using metal–oxide–semiconductor HEMTs (MOSHEMTs), with a thin dielectric layer, such as SiO2 [4], Al2O3 [5], HfO2 [6] and Gd2O3 [7] between the gate and the barrier layer on AlGaN/GaN heterostructures. Gd2O3 has shown low interfacial density of states(Dit) with GaN and a high dielectric constant and low electrical leakage currents [8], thus is considered as a promising candidate for the gate dielectrics on GaN. MOS-HEMTs using Gd2O3 grown by electron-beam heating [7] or molecular beam epitaxy (MBE) [8] on GaN or AlGan/GaN structure have been investigated, but further research is still needed in Gd2O3 based AlGaN/GaN MOSHEMTs.

Stabilization of embankments on inclined surfaces by micropiles

Embankments constructed on hillsides can have serious problems of stability, generally created by the action of water com-bined with the inclination of the hillside. In order to increase the stability or correct problems of instability already present, there are various methods that can be used: surface and deep drainage, reinforcements with anchored beams, medium and large diameter piles, etc. Standing out among these systems (for its versatility) is the use of micropiles which ?sew? the embankment to a non-unstable area of the hillside. This paper presents research undertaken by means of a finite element code for studying the effect and stress of the micropiles, comparing the results with real measurements taken in the south of Spain.

Examining wheat yield sensitivity to temperature and precipitation changes for a large ensemble of crop models using impact response surfaces

Impact response surfaces (IRSs) depict the response of an impact variable to changes in two explanatory variables as a plotted surface. Here, IRSs of spring and winter wheat yields were constructed from a 25-member ensemble of process-based crop simulation models. Twenty-one models were calibrated by different groups using a common set of calibration data, with calibrations applied independently to the same models in three cases. The sensitivity of modelled yield to changes in temperature and precipitation was tested by systematically modifying values of 1981-2010 baseline weather data to span the range of 19 changes projected for the late 21st century at three locations in Europe.

Evaluation of the surface free energy of plant surfaces: toward standardizing the procedure

Plant surfaces have been found to have a major chemical and physical heterogeneity and play a key protecting role against multiple stress factors. During the last decade, there is a raising interest in examining plant surface properties for the development of biomimetic materials. Contact angle measurement of different liquids is a common tool for characterizing synthetic materials, which is just beginning to be applied to plant surfaces. However, some studies performed with polymers and other materials showed that for the same surface, different surface free energy values may be obtained depending on the number and nature of the test liquids analyzed, materials' properties, and surface free energy calculation methods employed. For 3 rough and 3 rather smooth plant materials, we calculated their surface free energy using 2 or 3 test liquids and 3 different calculation methods. Regardless of the degree of surface roughness, the methods based on 2 test liquids often led to the under- or over-estimation of surface free energies as compared to the results derived from the 3-Liquids method. Given the major chemical and structural diversity of plant surfaces, it is concluded that 3 different liquids must be considered for characterizing materials of unknown physico-chemical properties, which may significantly differ in terms of polar and dispersive interactions. Since there are just few surface free energy data of plant surfaces with the aim of standardizing the calculation procedure and interpretation of the results among for instance, different species, organs, or phenological states, we suggest the use of 3 liquids and the mean surface tension values provided in this study.

Silicon oxides as alignment surfaces for vertically-aligned nematics in photonic devices

A comparative study on alignment performance and microstructure of inorganic layers used for liquid crystal cell conditioning has been carried out. The study has focused on two specific materials, SiOx and SiO2, deposited under different conditions. The purpose was to establish a relationship between layer microstructure and liquid crystal alignment. The surface morphology has been studied by FESEM and AFM. An analysis on liquid crystal alignment, pretilt angle, response time, contrast ratio and the conditions to develop backflow effect (significant rise time increase due to pure homeotropic alignment) on vertically-aligned nematic cells has been carried out. A technique to overcome the presence of backflow has been identified. The full comparative study of SiOx and SiO2 layer properties and their influence over liquid crystal alignment and electrooptic response is presented.

Restauración de las iglesias de los municipios de la comarca del Bajo Martín (Teruel): Jatiel, Samper De Calanda, Urrea De Gaén e Híjar

En el ámbito aragonés durante los últimos diez años se han llevado a cabo numerosas actuaciones de distintos intereses y calados en el patrimonio histórico artístico vinculado principalmente a edificios destinados al culto religioso. Cabe destacar la restauración de cuatro templos de la Comarca del Bajo Martín, en la provincia de Teruel.

Ricci flows on surfaces related to the Einstein weyl and Abelian vortex equations

There are described equations for a pair comprising a Riemannian metric and a Killing field on a surface that contain as special cases the Einstein Weyl equations (in the sense of D. Calderbank) and a real version of a special case of the Abelian vortex equations, and it is shown that the property that a metric solve these equations is preserved by the Ricci flow. The equations are solved explicitly, and among the metrics obtained are all steady gradient Ricci solitons (e.g. the cigar soliton) and the sausage metric; there are found other examples of eternal, ancient, and immortal Ricci flows, as well as some Ricci flows with conical singularities.