955 resultados para Transistor circuits.
A LIN inspired optical bus for signal isolation in multilevel or modular power electronic converters
Resumo:
Proposed in this paper is a low-cost, half-duplex optical communication bus for control signal isolation in modular or multilevel power electronic converters. The concept is inspired by the Local Interconnect Network (LIN) serial network protocol as used in the automotive industry. The proposed communications bus utilises readily available optical transceivers and is suitable for use with low-cost microcontrollers for distributed control of multilevel converters. As a signal isolation concept, the proposed optical bus enables very high cell count modular multilevel cascaded converters (MMCCs) for high-bandwidth, high-voltage and high-power applications. Prototype hardware is developed and the optical bus concept is validated experimentally in a 33-level MMCC converter operating at 120 Vrms and 60 Hz.
Resumo:
Embedded many-core architectures contain dozens to hundreds of CPU cores that are connected via a highly scalable NoC interconnect. Our Multiprocessor-System-on-Chip CoreVAMPSoC combines the advantages of tightly coupled bus-based communication with the scalability of NoC approaches by adding a CPU cluster as an additional level of hierarchy. In this work, we analyze different cluster interconnect implementations with 8 to 32 CPUs and compare them in terms of resource requirements and performance to hierarchical NoCs approaches. Using 28nm FD-SOI technology the area requirement for 32 CPUs and AXI crossbar is 5.59mm2 including 23.61% for the interconnect at a clock frequency of 830 MHz. In comparison, a hierarchical MPSoC with 4 CPU cluster and 8 CPUs in each cluster requires only 4.83mm2 including 11.61% for the interconnect. To evaluate the performance, we use a compiler for streaming applications to map programs to the different MPSoC configurations. We use this approach for a design-space exploration to find the most efficient architecture and partitioning for an application.
Resumo:
The highly complex structure of the human brain is strongly shaped by genetic influences. Subcortical brain regions form circuits with cortical areas to coordinate movement, learning, memory and motivation, and altered circuits can lead to abnormal behaviour and disease. To investigate how common genetic variants affect the structure of these brain regions, here we conduct genome-wide association studies of the volumes of seven subcortical regions and the intracranial volume derived from magnetic resonance images of 30,717 individuals from 50 cohorts. We identify five novel genetic variants influencing the volumes of the putamen and caudate nucleus. We also find stronger evidence for three loci with previously established influences on hippocampal volume and intracranial volume. These variants show specific volumetric effects on brain structures rather than global effects across structures. The strongest effects were found for the putamen, where a novel intergenic locus with replicable influence on volume (rs945270; P = 1.08×10 -33; 0.52% variance explained) showed evidence of altering the expression of the KTN1 gene in both brain and blood tissue. Variants influencing putamen volume clustered near developmental genes that regulate apoptosis, axon guidance and vesicle transport. Identification of these genetic variants provides insight into the causes of variability in human brain development, and may help to determine mechanisms of neuropsychiatric dysfunction.
Resumo:
Frequency Domain Spectroscopy (FDS) is one of the major techniques used for determining the condition of the cellulose based paper and pressboard components in large oil/paper insulated power transformers. This technique typically makes use of a sinusoidal voltage source swept from 0.1 mHz to 1 kHz. The excitation test voltage source used must meet certain characteristics, such as high output voltage, high fidelity, low noise and low harmonic content. The amplifier used; in the test voltage source; must be able to drive highly capacitive loads. This paper proposes that a switch-mode assisted linear amplifier (SMALA) can be used in the test voltage source to meet these criteria. A three level SMALA prototype amplifier was built to experimentally demonstrate the effectiveness of this proposal. The developed SMALA prototype shows no discernable harmonic distortion in the output voltage waveform, or the need for output filters, and is therefore seen as a preferable option to pulse width modulated digital amplifiers. The lack of harmonic distortion and high frequency switching noise in the output voltage of this SMALA prototype demonstrates its feasibility for applications in FDS, particularly on highly capacitive test objects such as transformer insulation systems.
Resumo:
Light-emitting field effect transistors (LEFETs) are an emerging class of multifunctional optoelectronic devices. It combines the light emitting function of an OLED with the switching function of a transistor in a single device architecture the dual functionality of LEFETs has the potential applications in active matrix displays. However, the key problem of existing LEFETs thus far has been their low EQEs at high brightness, poor ON/OFF and poorly defined light emitting area-a thin emissive zone at the edge of the electrodes. Here we report heterostructure LEFETs based on solution processed unipolar charge transport and an emissive polymer that have an EQE of up to 1% at a brightness of 1350a €...cd/m 2, ON/OFF ratio > 10 4 and a well-defined light emitting zone suitable for display pixel design. We show that a non-planar hole-injecting electrode combined with a semi-transparent electron-injecting electrode enables to achieve high EQE at high brightness and high ON/OFF ratio. Furthermore, we demonstrate that heterostructure LEFETs have a better frequency response (f cut-off = 2.6a €...kHz) compared to single layer LEFETs the results presented here therefore are a major step along the pathway towards the realization of LEFETs for display applications.
Resumo:
Light emitting field effect transistors (LEFETs) are emerging as a multi-functional class of optoelectronic devices. LEFETs can simultaneously execute light emission and the standard logic functions of a transistor in a single architecture. However, current LEFET architectures deliver either high brightness or high efficiency but not both concurrently, thus limiting their use in technological applications. Here we show an LEFET device strategy that simultaneously improves brightness and efficiency. The key step change in LEFET performance arises from the bottom gate top-contact device architecture in which the source/drain electrodes are semitransparent and the active channel contains a bi-layer comprising of a high mobility charge-transporting polymer, and a yellow-green emissive polymer. A record external quantum efficiency (EQE) of 2.1% at 1000cd/m2 is demonstrated for polymer based bilayer LEFETs.
Resumo:
An innovative design strategy for light emitting field effect transistors (LEFETs) to harvest higher luminance and switching is presented. The strategy uses a non-planar electrode geometry in tri-layer LEFETs for simultaneous enhancement of the key parameters of quantum efficiency, brightness, switching, and mobility across the RGB color gamut.
Resumo:
Rail joints are provided with a gap to account for thermal movement and to maintain electrical insulation for the control of signals and/or broken rail detection circuits. The gap in the rail joint is regarded as a source of significant problems for the rail industry since it leads to a very short rail service life compared with other track components due to the various, and difficult to predict, failure modes – thus increasing the risk for train operations. Many attempts to improve the life of rail joints have led to a large number of patents around the world; notable attempts include strengthening through larger-sized joint bars, an increased number of bolts and the use of high yield materials. Unfortunately, no design to date has shown the ability to prolong the life of the rail joints to values close to those for continuously welded rail (CWR). This paper reports the results of a fundamental study that has revealed that the wheel contact at the free edge of the railhead is a major problem since it generates a singularity in the contact pressure and railhead stresses. A design was therefore developed using an optimisation framework that prevents wheel contact at the railhead edge. Finite element modelling of the design has shown that the contact pressure and railhead stress singularities are eliminated, thus increasing the potential to work as effectively as a CWR that does not have a geometric gap. An experimental validation of the finite element results is presented through an innovative non-contact measurement of strains. Some practical issues related to grinding rails to the optimal design are also discussed.
Resumo:
The reliability of micro inverters is an important factor as it would be necessary to reduce cost and maintenance of the small and medium scale distributed PV power conversion systems. Electrolytic capacitors and active power decouple circuits can be avoided in micro inverters with the use of medium voltage DC-link. Such a DC-link based micro inverter is proposed with a front-end dual inductor current-fed push-pull converter. The primary side power switches of the front-end converter have reduced switching losses due to multi-resonant operation. In addition, the voltage and current stresses on the diodes of the secondary diode voltage doubler rectifier are reduced due to the presence of a series resonant circuit in the front-end converter. The operation of the proposed micro inverter is explained using an in-depth analysis of the switching characteristics of the power semiconductor devices. The theoretical analysis of the proposed micro inverter is validated using simulation result.
Resumo:
There is strong evidence to suggest that the combination of alcohol and chronic repetitive stress leads to long-lasting effects on brain function, specifically areas associated with stress, motivation and decision-making such as the amygdala, nucleus accumbens and prefrontal cortex. Alcohol and stress together facilitate the imprinting of long-lasting memories. The molecular mechanisms and circuits involved are being studied but are not fully understood. Current evidence suggests that corticosterone (animals) or cortisol (humans), in addition to direct transcriptional effects on the genome, can directly regulate pre- and postsynaptic synaptic transmission through membrane bound glucocorticoid receptors (GR). Indeed, corticosterone-sensitive synaptic receptors may be critical sites for stress regulation of synaptic responses. Direct modulation of synaptic transmission by corticosterone may contribute to the regulation of synaptic plasticity and memory during stress (Johnson et al., 2005; Prager et al., 2010). Specifically, previous data has shown that long term alcohol (1) increases the expression of NR2Bcontaining NMDA receptors at glutamate synapses, (2) changes receptor density, and (3) changes morphology of dendritic spines (Prendergast and Mulholland; 2012). During alcohol withdrawal these changes are associated with increased glucocorticoid signalling and increased neuronal excitability. It has therefore been proposed that these synapse changes lead to the anxiety and alcohol craving associated with withdrawal (Prendergast and Mulholland; 2012). My lab is targeting this receptor system and the amygdala in order to understand the effect of combining alcohol and stress on these pathways. Lastly, we are testing GR specific compounds as potential new medications to promote the development of resilience to developing addiction.
Resumo:
A whole of factory model of a raw sugar factory was developed in SysCAD software to assess and improve factory operations. The integrated sugar factory model ‘Sugar-SysCAD’ includes individual models for milling, heating and clarification, evaporation, crystallisation, steam cycle, sugar dryer and process and injection water circuits. These individual unit operation models can be either used as standalone models to optimise the unit operation or in the integrated mode to provide more accurate prediction of the effects of changes in any part of the process on the outputs of the whole factory process. Using the integrated sugar factory model, the effect of specific process operations can be understood and practical solutions can be determined to address process problems. The paper presents two factory scenarios to show the capabilities of the whole of factory model.
Resumo:
We report a circuit technique to measure the on-chip delay of an individual logic gate (both inverting and non-inverting) in its unmodified form using digitally reconfigurable ring oscillator (RO). Solving a system of linear equations with different configuration setting of the RO gives delay of an individual gate. Experimental results from a test chip in 65nm process node show the feasibility of measuring the delay of an individual inverter to within 1pS accuracy. Delay measurements of different nominally identical inverters in close physical proximity show variations of up to 26% indicating the large impact of local or within-die variations.
Resumo:
As the conventional MOSFET's scaling is approaching the limit imposed by short channel effects, Double Gate (DG) MOS transistors are appearing as the most feasible candidate in terms of technology in sub-45nm technology nodes. As the short channel effect in DG transistor is controlled by the device geometry, undoped or lightly doped body is used to sustain the channel. There exits a disparity in threshold voltage calculation criteria of undoped-body symmetric double gate transistors which uses two definitions, one is potential based and the another is charge based definition. In this paper, a novel concept of "crossover point'' is introduced, which proves that the charge-based definition is more accurate than the potential based definition.The change in threshold voltage with body thickness variation for a fixed channel length is anomalous as predicted by potential based definition while it is monotonous for charge based definition.The threshold voltage is then extracted from drain currant versus gate voltage characteristics using linear extrapolation and "Third Derivative of Drain-Source Current'' method or simply "TD'' method. The trend of threshold voltage variation is found same in both the cases which support charge-based definition.
Resumo:
As the conventional MOSFETs scaling is approaching the limit imposed by short channel effects, Double Gate (DG) MOS transistors are appearing as the most feasible andidate in terms of technology in sub-45nm technology nodes. As the short channel effect in DG transistor is controlled by the device geometry, undoped or lightly doped body, is used to sustain the channel. There exits a disparity in threshold voltage calculation criteria of undoped-body symmetric double gate transistors which uses two definitions, one is potential based and the another is charge based definition. In this paper, a novel concept of "crossover point" is introduced, which proves that the charge-based definition is more accurate than the potential based definition. The change in threshold voltage with body thickness variation for a fixed channel length is anomalous as predicted by, potential based definition while it is monotonous for change based definition. The threshold voltage is then extracted from drain currant versus gate voltage characteristics using linear extrapolation and "Third Derivative of Drain-Source Current" method or simply "TD" method. The trend of threshold voltage variation is found some in both the cases which support charge-based definition.
Resumo:
We present a technique for an all-digital on-chip delay measurement system to measure the skews in a clock distribution network. It uses the principle of sub-sampling. Measurements from a prototype fabricated in a 65 nm industrial process, indicate the ability to measure delays with a resolution of 0.5ps and a DNL of 1.2 ps.