Group coordination and cooperative control of steered particles in the plane

The paper overviews recent and ongoing efforts by the authors to develop a design methodology to stabilize isolated relative equilibria in a kinematic model of identical particles moving in the plane at unit speed. Isolated relative equilibria correspond to either parallel motion of all particles with fixed relative spacing or to circular motion of all particles about the same center with fixed relative headings. © Springer-Verlag Berlin Heidelberg 2006.

A 40 Gb/s scalable optical polymer backplane using a regenerative shared bus architecture

The first multi-channel optical backplane demonstrator using on-board multimode polymer waveguides and a scalable shared-bus regenerative architecture is reported. The system allows bus extension by cascading multiple polymeric bus modules, and enables error-free 4×10 Gb/s interconnection between any two card interfaces on the bus.

A trichordal temporal approach to digital coordination: the sociomaterial mangling of the CERN grid

This paper develops a sociomaterial perspective on digital coordination. It extends Pickering’s mangle of practice by using a trichordal approach to temporal emergence. We provide new understanding as to how the nonhuman and human agencies involved in coordination are embedded in the past, present, and future. We draw on an in-depth field study conducted between 2006 and 2010 of the development, introduction, and use of a computing grid infrastructure by the CERN particle physics community. Three coordination tensions are identified at different temporal dimensions, namelyobtaining adequate transparency in the present, modeling a future infrastructure, and the historical disciplining of social and material inertias. We propose and develop the concept of digital coordination, and contribute a trichordal temporal approach to understanding the development and use of digital infrastructure as being orientated to the past and future while emerging in the present.

An architecture design with data model for product recovery management systems

Due to concerns about environmental protection and resource utilization, product lifecycle management for end-of-life (EOL) has received increasing attention in many industrial sectors including manufacturing, maintenance/repair, and recycling/refurbishing of the product. To support these functions, crucial issues are studied to realize a product recovery management system (PRMS), including: (1) an architecture design for EOL services, such as remanufacturing and recycling; (2) a product data model required for EOL activity based on international standards; and (3) an infrastructure for information acquisition and mapping to product lifecycle information. The presented works are illustrated via a realistic scenario. © 2008 Elsevier B.V. All rights reserved.

Modular hybrid dilated Mach-Zehnder switch with integrated SOAs for large port count switches

A modular dilated MZI based optical switch with integrated SOAs is demonstrated with excellent -40dB crosstalk/extinction ratio, 3ns switching time and nearly penalty-free operation. Studies show an 8×8 switch with 14dB IPDR for 0.5dB penalty. © 2014 OSA.

Effect of plant architecture on the structure of epiphytic macro invertebrate communities in a Chinese lake

We examined the effect of different plant architecture types on epiphytic macroinvertebrates of a shallow macrophyte-dominated lake in China. Macroinvertebrates were sampled from four dominant submersed macrophytes in the lake - two dissected plants (Myriophyllum spicatum L. and Ceratophyllum demersum L.) and two undissected plants (Potamogeton maackianus A. Benn. and Vallisneria spiralis L.). Macro invertebrate richness showed significant differences among four submersed macrophyte habitats, and higher density per g of dry plant were associated with dissected plants than undissected plants. The average abundance in dissected plants was as three-six times as in undissected plants. The biodiversity of epiphytic macroinvertebrates was higher in dissected plants than undissected plants. Our results suggest that dissected plants provide different habitat for macroinvertebrates than dissected plant, and this concurs with the hypothesis that the former could support more epiphytic macroinvertebrates than the latter.

Synchronization in a coupled architecture of microelectromechanical oscillators

There has been much recent interest in engineering the phenomenon of synchronization in coupled micro-/nano-scale oscillators for applications ranging from precision time and frequency references to new approaches to information processing. This paper presents descriptive modelling detail and further experimental validation of the phenomenon of mutual synchronization in coupled MEMS oscillators building upon recent experimental validation of this concept by the present authors. In particular, the underlying dependence of the observation of synchronization on system parameters is studied through numerical and analytical modelling while considering essential nonlinearities in both the resonator and circuit domain. Experimental results demonstrating synchronized response are elaborated based on the realization of electrically coupled MEMS resonator based square-wave oscillators. The experimental results on frequency entrainment are found to be in general agreement with results obtained through analytical modeling and numerical simulation. The concept presented here is scalable and could be used to investigate the dynamics of large-arrays of coupled MEMS oscillators. © 2014 AIP Publishing LLC.

Enhanced robotic body extension with modular units

The adaptation of robots to changing tasks has been explored in modular self-reconfigurable robot research, where the robot structure is altered by adapting the connectivity of its constituent modules. As these modules are generally complex and large, an upper bound is imposed on the resolution of the built structures. Inspired by growth of plants or animals, robotic body extension (RBE) based on hot melt adhesives allows a robot to additively fabricate and assemble tools, and integrate them into its own body. This enables the robot to achieve tasks which it could not achieve otherwise. The RBE tools are constructed from hot melt adhesives and therefore generally small and only passive. In this paper, we seek to show physical extension of a robotic system in the order of magnitude of the robot, with actuation of integrated body parts, while maintaining the ability of RBE to construct parts with high resolution. Therefore, we present an enhancement of RBE based on hot melt adhesives with modular units, combining the flexibility of RBE with the advantages of simple modular units. We explain the concept of this new approach and demonstrate with two simple unit types, one fully passive and the other containing a single motor, how the physical range of a robot arm can be extended and additional actuation can be added to the robot body. © 2012 IEEE.

A Complex BPF with On Chip Auto-tuning Architecture for Wireless Receivers

A 3(rd) order complex band-pass filter (BPF) with auto-tuning architecture is proposed in this paper. It is implemented in 0.18um standard CMOS technology. The complex filter is centered at 4.092MHz with bandwidth of 2.4MHz. The in-band 3(rd) order harmonic input intercept point (IIP3) is larger than 16.2dBm, with 50 Omega as the source impedance. The input referred noise is about 80uV(rms). The RC tuning is based on Binary Search Algorithm (BSA) with tuning accuracy of 3%. The chip area of the tuning system is 0.28 x 0.22 mm(2), less than 1/8 of that of the main-filter which is 0.92 x 0.59 mm(2). After tuning is completed, the tuning system will be turned off automatically to save power and to avoid interference. The complex filter consumes 2.6mA with a 1.8V power supply.

A Complex BPF with On Chip Auto-tuning Architecture for Low-IF Receivers

A 3(rd) order complex band-pass filter (BPF) with auto-tuning architecture is proposed in this paper. It is implemented in 0.18 mu m standard CMOS technology. The complex filter is centered at 4.092MHz with bandwidth of 2.4MHz. The in-band 3(rd) order harmonic input intercept point (IIP3) is larger than 19dBm, with 50 Omega as the source impedance. The input referred noise is about 80 mu V-rms. The RC tuning is based on Binary Search Algorithm (BSA) with tuning accuracy of 3%. The chip area of the tuning system is 0.28x0.22mm(2), less than 1/8 of that of the main-filter which is 0.92x0.59mm(2). After tuning is completed, the tuning system will be turned off automatically to save power and to avoid interference. The complex filter consumes 2.6mA with a 1.8V power supply.

An adaptive frequency synthesizer architecture reducing reference sidebands

An adaptive phase-locked loop (PLL) frequency synthesizer architecture for reducing reference sidebands at the output of the frequency synthesizer is described. The architecture combines two tuning loops: one is the main loop for locking the PLL frequency synthesizer and operating all the time, the other one is auxiliary loop for reducing reference sidebands and operating only when the main loop is closely locked. A 1.8V 1GHz fully integrated CMOS dual-loop frequency synthesizer is designed in a 0.18um CMOS process. The suppression of the reference sidebands of the proposed frequency synthesizer is 13.8dB more than that of the general frequency synthesizer.

A two-step backoff scheme for improving the performance of the IEEE 802.11 distributed coordination function

This paper describes the binary exponential backoff mechanism of 802.11 distributed coordination function (DCF), and introduces some methods of modifying the backoff scheme. Then a novel backoff scheme, called Two-step Backoff scheme, is presented and illustrated. The simulation process in OPNET environment has been described also. At last, the analysis and simulation results show that the Two-step backoff scheme can enhance the performance of the IEEE 802.11 DCF.

A Novel Architecture of Vision Chip for Fast Traffic Lane Detection and FPGA Implementation

This paper presents a novel architecture of vision chip for fast traffic lane detection (FTLD). The architecture consists of a 32*32 SIMD processing element (PE) array processor and a dual-core RISC processor. The PE array processor performs low-level pixel-parallel image processing at high speed and outputs image features for high-level image processing without I/O bottleneck. The dual-core processor carries out high-level image processing. A parallel fast lane detection algorithm for this architecture is developed. The FPGA system with a CMOS image sensor is used to implement the architecture. Experiment results show that the system can perform the fast traffic lane detection at 50fps rate. It is much faster than previous works and has good robustness that can operate in various intensity of light. The novel architecture of vision chip is able to meet the demand of real-time lane departure warning system.

Performance of an embedded optical vector matrix multiplication processor architecture

An embedded architecture of optical vector matrix multiplier (OVMM) is presented. The embedded architecture is aimed at optimising the data flow of vector matrix multiplier (VMM) to promote its performance. Data dependence is discussed when the OVMM is connected to a cluster system. A simulator is built to analyse the performance according to the architecture. According to the simulation, Amdahl's law is used to analyse the hybrid opto-electronic system. It is found that the electronic part and its interaction with optical part form the bottleneck of system.