929 resultados para bioelettronica, organica, neuroni, PEDOT, PSS, perilene, transistor, elettrochimici, organici, OCST
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A contribuicao da agricultura para as emissoes de gases de efeito estufa tem sido discutida em varios estudos. No que se refere as emissoes de CH4 (metano) e N2O (oxido nitroso), tem sido demostrado que a contribuicao dela esta em torno de 65% e 90% do total das emissoes antropogenicas respectivamente. O metano e produzido pela decomposicao anaerobica da materia organica no solo, queima de residuos e fermentacao de ruminantes. O cosumo desse gas ocorre pela oxidacao de radicais OH na troposfera e por oxidacao microbiologica no solo. O oxido nitroso e igualmente distribuido na troposfera e apresenta um tempo de resistencia bem maior do que o metano. Esse gas e produzido nos solos por processos biologicos e não-bioloicos, a partir de tranformacoes microbianas de nitrogenio inorganico nos solos, sendo a denitrifigacao e a nitrifigacao, os processos microbiologicos que mais contribuem para a emissao de N2O. A conversao de floresta para o uso agricola tem sido indicado como causador do aumento no fluxos de N2O, no entanto, neste estudo, em areas de Cerrado, emissoes muito reduzidas foram medidas. A capacidade de solos da Regiao do Cerrado consumir CH4 foi demostrada neste estudo. Embora tenha sido observada uma variacao sazonal dos fluxos, em nenhum periodo foi medida emissao desse gas, mesmo durante o periodo chuvoso. A possível reducao nas taxas de oxidacao de metano como resultado do aumento de fontes nitrogenadas em areas cultivadas, indicada por trabalhos anteriores, não e verificada pelo estudo.
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2013
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No ano de 2000, o desempenho dos laboratorios participantes do Programa de Analise de Qualidade de Laboratorios de Fertilidade (PAQLF) foi avaliado atraves dos resultados analiticos de 8 amostras de terra. Os participantes analisaram, obrigatoriamente, P e K (Mehlich-1); ph (agua; Ca, Mg e Al (KCl); H+Al (acetato de Ca ou SMP); e, facultativamente, materia organica (colorimetrico ou Walkey-Black) e os micronutrientes B (agua quente), Cu, Fe, Mn e Zn (Mehlich-1). Os resultados foram avaliados quanto a exatidao (acerto) e precisao (repeticao) e, entao, se calculou o Indice de Excelencia, atribuindo-se conceitos. Dos 79 laboratorios avaliados, 63% apresentaram conceitos A ou B ( 10 destes obtiveram conceito A), sendo habilitados ao uso do selo de qualidade. Foram apresentados os coeficientes de variacao dos parametros analisados e os resultados discrepantes das 8 amostras, no ano, pelos 79 participantes. De modo geral, os parametros que apresentaram resultados mais variaveis foram P, Al, Ca, Mg e K. Materia organica e A+Al foram intermediarios e as menores variacoes foram observadas para pH. Para os micronutrientes, as menores variacoes ocorrem nas determinacoes de Zn.
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Por ser especie heliofila, a seringueira e' plantada em pleno sol. Por esse motivo, foi testado o comportamento de plantio, em trilhas abertas na capoeira, de toco alto que, por medir de 2,10m a 2,40m de altura e possuir maior quantidade de reservas do que as mudas tradicionais, traria as vantagens de reducao do custo de preparo da area, evitando a derruba e queima, com preservacao da materia organica do solo, alem da incorporacao gradual da biomassa da capoeira. As copas de Hevea pauciflora apresentam derrama natural tardia, sugerindo que seu ponto de compensacao luminosa e' mais baixo do que o de H. brasiliensis. Desse modo, copas enxertadas com H. pauciflora poderiam tolerar melhor a fase de crescimento a sombra parcial da capoeira. O tratamento com copa propria apresentou o menor perimetro de caule, com valores tambem baixos nos blocos em pleno sol. Os incrementos anuais em perimetro de caule, apos a decapitacao dos enxerto de copa, permaneceram muito baixos na capoeira, nos tres anos consecutivos, e atingiram valores sucessivamente mais altos em pleno sol, exceto com a copa propria. Os resultados com as copas enxertadas de H. pauciflora demostram, portanto, ser inviavel o plantio em capoeira, nas condicoes descritas neste trabalho.
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2014
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Lee M.H., Qualitative Modelling of Linear Networks in ECAD Applications, Expert Update, Vol. 3, Num. 2, pp23-32, BCS SGES, Summer 2000. Qualitative modeling of linear networks in ecad applications (1999) by M Lee Venue: Pages 146?152 of: Proceedings 13th international workshop on qualitative reasoning, QR ?99
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Grande, Manuel; Kellett, B.; Howe, C.; Perry, C.H., 'The D-CIXS X-ray spectrometer on the SMART-1 mission to the Moon - First Results', Planetary And Space Science (2007) 55(4) pp.494-502 RAE2008
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This thesis is focused on the application of numerical atomic basis sets in studies of the structural, electronic and transport properties of silicon nanowire structures from first-principles within the framework of Density Functional Theory. First we critically examine the applied methodology and then offer predictions regarding the transport properties and realisation of silicon nanowire devices. The performance of numerical atomic orbitals is benchmarked against calculations performed with plane waves basis sets. After establishing the convergence of total energy and electronic structure calculations with increasing basis size we have shown that their quality greatly improves with the optimisation of the contraction for a fixed basis size. The double zeta polarised basis offers a reasonable approximation to study structural and electronic properties and transferability exists between various nanowire structures. This is most important to reduce the computational cost. The impact of basis sets on transport properties in silicon nanowires with oxygen and dopant impurities have also been studied. It is found that whilst transmission features quantitatively converge with increasing contraction there is a weaker dependence on basis set for the mean free path; the double zeta polarised basis offers a good compromise whereas the single zeta basis set yields qualitatively reasonable results. Studying the transport properties of nanowire-based transistor setups with p+-n-p+ and p+-i-p+ doping profiles it is shown that charge self-consistency affects the I-V characteristics more significantly than the basis set choice. It is predicted that such ultrascaled (3 nm length) transistors would show degraded performance due to relatively high source-drain tunnelling currents. Finally, it is shown the hole mobility of Si nanowires nominally doped with boron decreases monotonically with decreasing width at fixed doping density and increasing dopant concentration. Significant mobility variations are identified which can explain experimental observations.
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Technology boosters, such as strain, HKMG and FinFET, have been introduced into semiconductor industry to extend Moore’s law beyond 130 nm technology nodes. New device structures and channel materials are highly demanded to keep performance enhancement when the device scales beyond 22 nm. In this work, the properties and feasibility of the proposed Junctionless transistor (JNT) have been evaluated for both Silicon and Germanium channels. The performance of Silicon JNTs with 22 nm gate length have been characterized at elevated temperature and stressed conditions. Furthermore, steep Subthreshold Slopes (SS) in JNT and IM devices are compared. It is observed that the floating body in JNT is relatively dynamic comparing with that in IM devices and proper design of the device structure may further reduce the VD for a sub- 60 mV/dec subthreshold slope. Diode configuration of the JNT has also been evaluated, which demonstrates the first diode without junctions. In order to extend JNT structure into the high mobility material Germanium (Ge), a full process has been develop for Ge JNT. Germanium-on-Insulator (GeOI) wafers were fabricated using Smart-Cut with low temperature direct wafer bonding method. Regarding the lithography and pattern transfer, a top-down process of sub-50-nm width Ge nanowires is developed in this chapter and Ge nanowires with 35 nm width and 50 nm depth are obtained. The oxidation behaviour of Ge by RTO has been investigated and high-k passivation scheme using thermally grown GeO2 has been developed. With all developed modules, JNT with Ge channels have been fabricated by the CMOScompatible top-down process. The transistors exhibit the lowest subthreshold slope to date for Ge JNT. The devices with a gate length of 3 μm exhibit a SS of 216 mV/dec with an ION/IOFF current ratio of 1.2×103 at VD = -1 V and DIBL of 87 mV/V.
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Semiconductor nanowires, particularly group 14 semiconductor nanowires, have been the subject of intensive research in the recent past. They have been demonstrated to provide an effective, versatile route towards the continued miniaturisation and improvement of microelectronics. This thesis aims to highlight some novel ways of fabricating and controlling various aspects of the growth of Si and Ge nanowires. Chapter 1 highlights the primary technique used for the growth of nanowires in this study, namely, supercritical fluid (SCF) growth reactions. The advantages (and disadvantages) of this technique for the growth of Si and Ge nanowires are highlighted, citing numerous examples from the past ten years. The many variables involved in this technique are discussed along with the resultant characteristics of nanowires produced (diameter, doping, orientation etc.). Chapter 2 outlines the experimental methodologies used in this thesis. The analytical techniques used for the structural characterisation of nanowires produced are also described as well as the techniques used for the chemical analysis of various surface terminations. Chapter 3 describes the controlled self-seeded growth of highly crystalline Ge nanowires, in the absence of conventional metal seed catalysts, using a variety of oligosilylgermane precursors and mixtures of germane and silane compounds. A model is presented which describes the main stages of self-seeded Ge nanowire growth (nucleation, coalescence and Ostwald ripening) from the oligosilylgermane precursors and in conjunction with TEM analysis, a mechanism of growth is proposed. Chapter 4 introduces the metal assisted etching (MAE) of Si substrates to produce Si nanowires. A single step metal-assisted etch (MAE) process, utilising metal ion-containing HF solutions in the absence of an external oxidant, was developed to generate heterostructured Si nanowires with controllable porous (isotropically etched) and non-porous (anisotropically etched) segments. In Chapter 5 the bottom-up growth of Ge nanowires, similar to that described in Chapter 3, and the top down etching of Si, described in Chapter 4, are combined. The introduction of a MAE processing step in order to “sink” the Ag seeds into the growth substrate, prior to nanowire growth, is shown to dramatically decrease the mean nanowire diameters and to narrow the diameter distributions. Finally, in Chapter 6, the biotin – streptavidin interaction was explored for the purposes of developing a novel Si junctionless nanowire transistor (JNT) sensor.
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In this work by employing numerical three-dimensional simulations we study the electrical performance and short channel behavior of several multi-gate transistors based on advanced SOI technology. These include FinFETs, triple-gate and gate-all-around nanowire FETs with different channel material, namely Si, Ge, and III-V compound semiconductors, all most promising candidates for future nanoscale CMOS technologies. Also, a new type of transistor called “junctionless nanowire transistor” is presented and extensive simulations are carried out to study its electrical characteristics and compare with the conventional inversion- and accumulation-mode transistors. We study the influence of device properties such as different channel material and orientation, dimensions, and doping concentration as well as quantum effects on the performance of multi-gate SOI transistors. For the modeled n-channel nanowire devices we found that at very small cross sections the nanowires with silicon channel are more immune to short channel effects. Interestingly, the mobility of the channel material is not as significant in determining the device performance in ultrashort channels as other material properties such as the dielectric constant and the effective mass. Better electrostatic control is achieved in materials with smaller dielectric constant and smaller source-to-drain tunneling currents are observed in channels with higher transport effective mass. This explains our results on Si-based devices. In addition to using the commercial TCAD software (Silvaco and Synopsys TCAD), we have developed a three-dimensional Schrödinger-Poisson solver based on the non-equilibrium Green’s functions formalism and in the framework of effective mass approximation. This allows studying the influence of quantum effects on electrical performance of ultra-scaled devices. We have implemented different mode-space methodologies in our 3D quantum-mechanical simulator and moreover introduced a new method to deal with discontinuities in the device structures which is much faster than the coupled-mode-space approach.
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High-permittivity ("high-k") dielectric materials are used in the transistor gate stack in integrated circuits. As the thickness of silicon oxide dielectric reduces below 2 nm with continued downscaling, the leakage current because of tunnelling increases, leading to high power consumption and reduced device reliability. Hence, research concentrates on finding materials with high dielectric constant that can be easily integrated into a manufacturing process and show the desired properties as a thin film. Atomic layer deposition (ALD) is used practically to deposit high-k materials like HfO2, ZrO2, and Al2O3 as gate oxides. ALD is a technique for producing conformal layers of material with nanometer-scale thickness, used commercially in non-planar electronics and increasingly in other areas of science and technology. ALD is a type of chemical vapor deposition that depends on self-limiting surface chemistry. In ALD, gaseous precursors are allowed individually into the reactor chamber in alternating pulses. Between each pulse, inert gas is admitted to prevent gas phase reactions. This thesis provides a profound understanding of the ALD of oxides such as HfO2, showing how the chemistry affects the properties of the deposited film. Using multi-scale modelling of ALD, the kinetics of reactions at the growing surface is connected to experimental data. In this thesis, we use density functional theory (DFT) method to simulate more realistic models for the growth of HfO2 from Hf(N(CH3)2)4/H2O and HfCl4/H2O and for Al2O3 from Al(CH3)3/H2O.Three major breakthroughs are discovered. First, a new reaction pathway, ’multiple proton diffusion’, is proposed for the growth of HfO2 from Hf(N(CH3)2)4/H2O.1 As a second major breakthrough, a ’cooperative’ action between adsorbed precursors is shown to play an important role in ALD. By this we mean that previously-inert fragments can become reactive once sufficient molecules adsorb in their neighbourhood during either precursor pulse. As a third breakthrough, the ALD of HfO2 from Hf(N(CH3)2)4 and H2O is implemented for the first time into 3D on-lattice kinetic Monte-Carlo (KMC).2 In this integrated approach (DFT+KMC), retaining the accuracy of the atomistic model in the higher-scale model leads to remarkable breakthroughs in our understanding. The resulting atomistic model allows direct comparison with experimental techniques such as X-ray photoelectron spectroscopy and quartz crystal microbalance.
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The continued advancement of metal oxide semiconductor field effect transistor (MOSFET) technology has shifted the focus from Si/SiO2 transistors towards high-κ/III-V transistors for high performance, faster devices. This has been necessary due to the limitations associated with the scaling of the SiO2 thickness below ~1 nm and the associated increased leakage current due to direct electron tunnelling through the gate oxide. The use of these materials exhibiting lower effective charge carrier mass in conjunction with the use of a high-κ gate oxide allows for the continuation of device scaling and increases in the associated MOSFET device performance. The high-κ/III-V interface is a critical challenge to the integration of high-κ dielectrics on III-V channels. The interfacial chemistry of the high-κ/III-V system is more complex than Si, due to the nature of the multitude of potential native oxide chemistries at the surface with the resultant interfacial layer showing poor electrical insulating properties when high-κ dielectrics are deposited directly on these oxides. It is necessary to ensure that a good quality interface is formed in order to reduce leakage and interface state defect density to maximise channel mobility and reduce variability and power dissipation. In this work, the ALD growth of aluminium oxide (Al2O3) and hafnium oxide (HfO2) after various surface pre-treatments was carried out, with the aim of improving the high-κ/III-V interface by reducing the Dit – the density of interface defects caused by imperfections such as dangling bonds, dimers and other unsatisfied bonds at the interfaces of materials. A brief investigation was performed into the structural and electrical properties of Al2O3 films deposited on In0.53Ga0.47As at 200 and 300oC via a novel amidinate precursor. Samples were determined to experience a severe nucleation delay when deposited directly on native oxides, leading to diminished functionality as a gate insulator due to largely reduced growth per cycle. Aluminium oxide MOS capacitors were prepared by ALD and the electrical characteristics of GaAs, In0.53Ga0.47As and InP capacitors which had been exposed to pre-pulse treatments from triethyl gallium and trimethyl indium were examined, to determine if self-cleaning reactions similar to those of trimethyl aluminium occur for other alkyl precursors. An improved C-V characteristic was observed for GaAs devices indicating an improved interface possibly indicating an improvement of the surface upon pre-pulsing with TEG, conversely degraded electrical characteristics observed for In0.53Ga0.47As and InP MOS devices after pre-treatment with triethyl gallium and trimethyl indium respectively. The electrical characteristics of Al2O3/In0.53Ga0.47As MOS capacitors after in-situ H2/Ar plasma treatment or in-situ ammonium sulphide passivation were investigated and estimates of interface Dit calculated. The use of plasma reduced the amount of interface defects as evidenced in the improved C-V characteristics. Samples treated with ammonium sulphide in the ALD chamber were found to display no significant improvement of the high-κ/III-V interface. HfO2 MOS capacitors were fabricated using two different precursors comparing the industry standard hafnium chloride process with deposition from amide precursors incorporating a ~1nm interface control layer of aluminium oxide and the structural and electrical properties investigated. Capacitors furnished from the chloride process exhibited lower hysteresis and improved C-V characteristics as compared to that of hafnium dioxide grown from an amide precursor, an indication that no etching of the film takes place using the chloride precursor in conjunction with a 1nm interlayer. Optimisation of the amide process was carried out and scaled samples electrically characterised in order to determine if reduced bilayer structures display improved electrical characteristics. Samples were determined to exhibit good electrical characteristics with a low midgap Dit indicative of an unpinned Fermi level
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The objective of this thesis is the exploration and characterization of novel Au nanorod-semiconductor nanowire hybrid nanostructures. I provide a comprehensive bottom-up approach in which, starting from the synthesis and theoretical investigation of the optical properties of Au nanorods, I design, nanofabricate and characterize Au nanorods-semiconductor nanowire hybrid nanodevices with novel optoelectronic capabilities compared to the non-hybrid counterpart. In this regards, I first discuss the seed-mediated protocols to synthesize Au nanorods with different sizes and the influence of nanorod geometries and non-homogeneous surrounding medium on the optical properties investigated by theoretical simulation. Novel methodologies for assembling Au nanorods on (i) a Si/SiO2 substrate with highly-ordered architecture and (ii) on semiconductor nanowires with spatial precision are developed and optimized. By exploiting these approaches, I demonstrate that Raman active modes of an individual ZnO nanowire can be detected in non-resonant conditions by exploring the longitudinal plasmonic resonance mediation of chemical-synthesized Au nanorods deposited on the nanowire surface otherwise not observable on bare ZnO nanowire. Finally, nanofabrication and detailed electrical characterization of ZnO nanowire field-effect transistor (FET) and optoelectronic properties of Au nanorods - ZnO nanowire FET tunable near-infrared photodetector are investigated. In particular we demonstrated orders of magnitude enhancement in the photocurrent intensity in the explored range of wavelengths and 40 times faster time response compared to the bare ZnO FET detector. The improved performance, attributed to the plasmonicmediated hot-electron generation and injection mechanism underlying the photoresponse is investigated both experimentally and theoretically. The miniaturized, tunable and integrated capabilities offered by metal nanorodssemicondictor nanowire device architectures presented in this thesis work could have an important impact in many application fields such as opto-electronic sensors, photodetectors and photovoltaic devices and open new avenues for designing of novel nanoscale optoelectronic devices.
Insertion of metal oxides into block copolymer nanopatterns as robust etch masks for nanolithography
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Directed self-assembly (DSA) of block copolymers (BCPs) is a prime candidate to further extend dimensional scaling of silicon integrated circuit features for the nanoelectronic industry. Top-down optical techniques employed for photoresist patterning are predicted to reach an endpoint due to diffraction limits. Additionally, the prohibitive costs for “fabs” and high volume manufacturing tools are issues that have led the search for alternative complementary patterning processes. This thesis reports the fabrication of semiconductor features from nanoscale on-chip etch masks using “high χ” BCP materials. Fabrication of silicon and germanium nanofins via metal-oxide enhanced BCP on-chip etch masks that might be of importance for future Fin-field effect transistor (FinFETs) application are detailed.