Current Sheet Regulation of Solar Near-relativistic Electron Injection Histories

We present a sample of three large near-relativistic (>50 keV) electron events observed in 2001 by both the ACE and the Ulysses spacecraft, when Ulysses was at high-northern latitudes (>60◦) and close to 2 AU. Despite the large latitudinal distance between the two spacecraft, electrons injected near the Sun reached both heliospheric locations. All three events were associated with large solar flares, strong decametric type II radio bursts and accompanied by wide (>212◦) and fast (>1400 km s−1) coronal mass ejections (CMEs). We use advanced interplanetary transport simulations and make use of the directional intensities observed in situ by the spacecraft to infer the electron injection profile close to the Sun and the interplanetary transport conditions at both low and high latitudes. For the three selected events, we find similar interplanetary transport conditions at different heliolatitudes for a given event, with values of the mean free path ranging from 0.04 AU to 0.27 AU. We find differences in the injection profiles inferred for each spacecraft. We investigate the role that sector boundaries of the heliospheric current sheet (HCS) have on determining the characteristics of the electron injection profiles. Extended injection profiles, associated with coronal shocks, are found if the magnetic footpoints of the spacecraft lay in the same magnetic sector as the associated flare, while intermittent sparse injection episodes appear when the spacecraft footpoints are in the opposite sector or a wrap in the HCS bounded the CME structure.

Architectural characterization of a delta-front reservoir analogue combining ground penetrating radar and electrical resistivity tomography: Roda Sandstone (Lower Eocene, Graus-Tremp basin, Spain)

Three-dimensional reconstruction of reservoir analogues can be improved combining data from different geophysical methods. Ground Penetrating Radar (GPR) and Electrical Resistivity Tomography (ERT) data are valuable tools, since they provide subsurface information from internal architecture and facies distribution of sedimentary rock bodies, enabling the upgrading of depositional models and heterogeneity reconstruction. The Lower Eocene Roda Sandstone is a well-known deltaic complex widely studied as a reservoir analogue that displays a series of sandstone wedges with a general NE to SW progradational trend. To provide a better understanding of internal heterogeneity of a 10m-thick progradational delta-front sandstone unit, 3D GPR data were acquired. In addition, common midpoints (CMP) to measure the sandstone subsoil velocity, test profiles with different frequency antennas (25, 50 and 100MHz) and topographic data for subsequent correction in the geophysical data were also obtained. Three ERT profiles were also acquired to further constrain GPR analysis. These geophysical results illustrate the geometry of reservoir analogue heterogeneities both depositional and diagenetic in nature, improving and complementing previous outcrop-derived data. GPR interpretation using radar stratigraphy principles and attributes analysis provided: 1)tridimensional geometry of major stratigraphic surfaces that define four units in the GPR Prism, 2) image the internal architecture of the units and their statistical study of azimuth and dips, useful for a quick determination of paleocurrent directions. These results were used to define the depositional architecture of the progradational sandbody that shows an arrangement in very-high-frequency sequences characterized by clockwise paleocurrent variations and decrease of the sedimentary flow, similar to those observed at a greater scale in the same system. This high-frequency sequential arrangement has been attributed to the autocyclic dynamics of a supply-dominated delta- front where fluvial and tidal currents are in competition. The resistivity models enhanced the viewing of reservoir quality associated with cement distribution caused by depositional and early diagenetic processes related to the development of transgressive and regressive systems tracts in igh-frequency sequences.

Current Sheet Regulation of Solar Near-Relativistic Electron Injection Histories

We present a sample of three large near-relativistic (>50 keV) electron events observed in 2001 by both the ACE and the Ulysses spacecraft, when Ulysses was at high-northern latitudes (>60°) and close to 2 AU. Despite the large latitudinal distance between the two spacecraft, electrons injected near the Sun reached both heliospheric locations. All three events were associated with large solar flares, strong decametric type II radio bursts and accompanied by wide (>212°) and fast (>1400 km s-1) coronal mass ejections (CMEs). We use advanced interplanetary transport simulations and make use of the directional intensities observed in situ by the spacecraft to infer the electron injection profile close to the Sun and the interplanetary transport conditions at both low and high latitudes. For the three selected events, we find similar interplanetary transport conditions at different heliolatitudes for a given event, with values of the mean free path ranging from 0.04 AU to 0.27 AU. We find differences in the injection profiles inferred for each spacecraft. We investigate the role that sector boundaries of the heliospheric current sheet (HCS) have on determining the characteristics of the electron injection profiles. Extended injection profiles, associated with coronal shocks, are found if the magnetic footpoints of the spacecraft lay in the same magnetic sector as the associated flare, while intermittent sparse injection episodes appear when the spacecraft footpoints are in the opposite sector or a wrap in the HCS bounded the CME structure.

Extension of the impedance field method to the noise analysis of a semiconductor junction: Analytical approach

We present an analytical procedure to perform the local noise analysis of a semiconductor junction when both the drift and diffusive parts of the current are important. The method takes into account space-inhomogeneous and hot-carriers conditions in the framework of the drift-diffusion model, and it can be effectively applied to the local noise analysis of different devices: n+nn+ diodes, Schottky barrier diodes, field-effect transistors, etc., operating under strongly inhomogeneous distributions of the electric field and charge concentration

Extension of the impedance field method to the noise analysis of a semiconductor junction: Analytical approach

We present an analytical procedure to perform the local noise analysis of a semiconductor junction when both the drift and diffusive parts of the current are important. The method takes into account space-inhomogeneous and hot-carriers conditions in the framework of the drift-diffusion model, and it can be effectively applied to the local noise analysis of different devices: n+nn+ diodes, Schottky barrier diodes, field-effect transistors, etc., operating under strongly inhomogeneous distributions of the electric field and charge concentration

Multifractal dimension of chaotic attractors in a driven semiconductor superlattice

The multifractal dimension of chaotic attractors has been studied in a weakly coupled superlattice driven by an incommensurate sinusoidal voltage as a function of the driving voltage amplitude. The derived multifractal dimension for the observed bifurcation sequence shows different characteristics for chaotic, quasiperiodic, and frequency-locked attractors. In the chaotic regime, strange attractors are observed. Even in the quasiperiodic regime, attractors with a certain degree of strangeness may exist. From the observed multifractal dimensions, the deterministic nature of the chaotic oscillations is clearly identified.

Welding of Sheet metal using Modified short arc MIG/MAG welding process

In this research work, the results of an investigation dealing with welding of sheet metals with diverse air gap using FastROOT modified short arc welding method and short circuit MAG welding processes have been presented. Welding runs were made under different conditions and, during each run, the different process parameters were continuously monitored. It was found that maximum welding speed and less HAZ are reached under specific welding conditions with FastROOT method with the emphasis on arc stability. Welding results show that modified short arc exhibits a higher electrode melting coefficient and with virtually spatter free droplet transition. By adjusting the short circuit duration the penetration can be controlled with only a small change in electrode deposition. Furthermore, by mixing pulsed MIG welding with modified arc welding the working envelope of the process is greatly extended allowing thicker material sections to be welded with improved weld bead aesthetics. FastROOT is a modified short arc welding process using mechanized or automated welding process based on dip transfer welding, characterized by controlled material deposition during the short circuit of the wire electrode to the workpiece.

Thermal modelling of semiconductor switches in three-level Neutral Point Clamped Medium Voltage DTC-inverter

The aim of this thesis is to investigate the thermal loading of medium voltage three-level NPC inverter’s semiconductor IGCT switches in different operation points. The objective is to reach both a fairly accurate off-line simulation program and also so simple a simulation model that its implementation into an embedded system could be reasonable in practice and a real time use should become feasible. Active loading limitation of the inverter can be realized with a thermal model which is practical in a real time use. Determining of the component heating has been divided into two parts; defining of component losses and establishing the structure of a thermal network. Basics of both parts are clarified. The simulation environment is Matlab-Simulink. Two different models are constructed – a more accurate one and a simplified one. Potential simplifications are clarified with the help of the first one. Simplifications are included in the latter model and the functionalities of both models are compared. When increasing the calculation time step a decreased number of considered components and time constants of the thermal network can be used in the simplified model. Heating of a switching component is dependent on its topological position and inverter’s operation point. The output frequency of the converter defines mainly which one of the switching components is – because of its losses and heating – the performance limiting component of the converter. Comparison of results given by different thermal models demonstrates that with larger time steps, describing of fast occurring switching losses becomes difficult. Generally articles and papers dealing with this subject are written for two-level inverters. Also inverters which apply direct torque control (DTC) are investigated rarely from the heating point of view. Hence, this thesis completes the former material.

Supply chain costs of a small board lot: sheet cutting and logistics

Succeeding in small board lot (0-20 tons) deliveries, is not always prosperous and failures as well as extra costs compared to standard costs arise. Failure deliveries from converting plants to customer locations tie a lot of unwanted and unexpected costs. Extra costs are handled as quality costs and more precise, internal failure costs. These costs revolve from unsuccessful truck payloads, redundant warehousing or unfavorable routing as examples. Quality costs are becoming more and more important factor in company’s financial decision making. Actual, realized truck payload correlates with the extra costs occurring, so filling the truck payload all get-out well is a key to lower the extra costs. Case company in this study is Corporation A, business segment Boards. Boards have outsourced half of their converting in order to gain better customer service via flexibility, lead time reductions and logistics efficiency improvements. Examination period of the study is first two quarters of year 2008 and deliveries examined are from converters to the customer locations. In Corporation A’s case, the total loss in failure deliveries is hundreds of thousands of Euros during the examination period. So, the logistics goal of getting the right product to the right place and right time for the least cost, does not completely realize.

Photoelectrocatalytical degradation of basic blue 41 dye using nanoporous semiconductor of Ti/TiO2

O presente trabalho investiga a degradação fotoeletrocatalítica do corante Azul Básico 41 (AB 41) amplamente utilizado na tintura de fibras sintéticas, utilizando um semicondutor Ti/TiO2 como fotoanodo. 100% de degradação foi obtida após 60 min de tratamento de 8,33x10-5 mol L-1 do corante em 0,1 mol L−1 Na2SO4, pH 2 sob densidade de corrente de 0,40 mA cm−2 e irradiação UV. Ainda foi obtido 80% de remoção de carbono orgânico total, cuja oxidação segue uma reação de pseudo-primeira ordem com constante de velocidade inicial de -0,040 mim-1 e uma eficiência de corrente de 51%. Os resultados são superiores á fotocatálise convencional nas mesmas condições sem a polarização do fotoanodo que leva a 65% de mineralização sob constante de velocidade de -0,024 mim-1.

Galvanomagnetic effects in InGaAs nanostructure

Investigation of galvanomagnetic effects in nanostructure GaAs/Mn/GaAs/In0.15Ga0.85As/ GaAs is presented. This nanostructure is classified as diluted magnetic semiconductor (DMS). Temperature dependence of transverse magnetoresistivity of the sample was studied. The anomalous Hall effect was detected and subtracted from the total Hall component. Special attention was paid to the measurements of Shubnikov-de Haas oscillations, which exists only in the case of magnetic field aligned perpendicularly to the plane of the sample. This confirms two-dimensional character of the hole energy spectrum in the quantum well. Such important characteristics as cyclotron mass, the Fermi energy and the Dingle temperature were calculated, using experimental data of Shubnikov-de Haas oscillations. The hole concentration and hole mobility in the quantum well also were estimated for the sample. At 4.2 K spin splitting of the maxima of transverse resistivity was observed and g-factor was calculated for that case. The values of the Dingle temperatures were obtained by two different approaches. From the comparison of these values it was concluded that the broadening of Landau levels in the investigated structure is mainly defined by the scattering of charge carriers on the defects of the crystal lattice

Research and development of III-V semiconductor surfaces for improved device interfaces

This thesis is devoted to understanding and improving technologically important III-V compound semiconductor (e.g. GaAs, InAs, and InSb) surfaces and interfaces for devices. The surfaces and interfaces of crystalline III-V materials have a crucial role in the operation of field-effect-transistors (FET) and highefficiency solar-cells, for instance. However, the surfaces are also the most defective part of the semiconductor material and it is essential to decrease the amount of harmful surface or interface defects for the next-generation III-V semiconductor device applications. Any improvement in the crystal ordering at the semiconductor surface reduces the amount of defects and increases the material homogeneity. This is becoming more and more important when the semiconductor device structures decrease to atomic-scale dimensions. Toward that target, the effects of different adsorbates (i.e., Sn, In, and O) on the III-V surface structures and properties have been investigated in this work. Furthermore, novel thin-films have been synthesized, which show beneficial properties regarding the passivation of the reactive III-V surfaces. The work comprises ultra-high-vacuum (UHV) environment for the controlled fabrication of atomically ordered III-V(100) surfaces. The surface sensitive experimental methods [low energy electron diffraction (LEED), scanning tunneling microscopy/spectroscopy (STM/STS), and synchrotron radiation photoelectron spectroscopy (SRPES)] and computational density-functionaltheory (DFT) calculations are utilized for elucidating the atomic and electronic properties of the crucial III-V surfaces. The basic research results are also transferred to actual device tests by fabricating metal-oxide-semiconductor capacitors and utilizing the interface sensitive measurement techniques [capacitance voltage (CV) profiling, and photoluminescence (PL) spectroscopy] for the characterization. This part of the thesis includes the instrumentation of home-made UHV-compatible atomic-layer-deposition (ALD) reactor for growing good quality insulator layers. The results of this thesis elucidate the atomic structures of technologically promising Sn- and In-stabilized III-V compound semiconductor surfaces. It is shown that the Sn adsorbate induces an atomic structure with (1×2)/(1×4) surface symmetry which is characterized by Sn-group III dimers. Furthermore, the stability of peculiar ζa structure is demonstrated for the GaAs(100)-In surface. The beneficial effects of these surface structures regarding the crucial III-V oxide interface are demonstrated. Namely, it is found that it is possible to passivate the III-V surface by a careful atomic-scale engineering of the III-V surface prior to the gate-dielectric deposition. The thin (1×2)/(1×4)-Sn layer is found to catalyze the removal of harmful amorphous III-V oxides. Also, novel crystalline III-V-oxide structures are synthesized and it is shown that these structures improve the device characteristics. The finding of crystalline oxide structures is exploited by solving the atomic structure of InSb(100)(1×2) and elucidating the electronic structure of oxidized InSb(100) for the first time.

Instability of a square sheet under symmetric biaxial loading

An early experiment found that a square rubber sheet under symmetric biaxial loading may not remain square. This curious result has been one of the most instructive examples in finite elasticity. Here thermodynamic considerations are used to analyze this instability.

Transient current technique simulation of semiconductor detectors

Nowadays advanced simulation technologies of semiconductor devices occupies an important place in microelectronics production process. Simulation helps to understand devices internal processes physics, detect new effects and find directions for optimization. Computer calculation reduces manufacturing costs and time. Modern simulation suits such as Silcaco TCAD allow simulating not only individual semiconductor structures, but also these structures in the circuit. For that purpose TCAD include MixedMode tool. That tool can simulate circuits using compact circuit models including semiconductor structures with their physical models. In this work, MixedMode is used for simulating transient current technique setup, which include detector and supporting electrical circuit. This technique was developed by RD39 collaboration project for investigation radiation detectors radiation hard properties.

Power semiconductor nonlinearities in active du/dt output filtering

This doctoral thesis introduces an improved control principle for active du/dt output filtering in variable-speed AC drives, together with performance comparisons with previous filtering methods. The effects of power semiconductor nonlinearities on the output filtering performance are investigated. The nonlinearities include the timing deviation and the voltage pulse waveform distortion in the variable-speed AC drive output bridge. Active du/dt output filtering (ADUDT) is a method to mitigate motor overvoltages in variable-speed AC drives with long motor cables. It is a quite recent addition to the du/dt reduction methods available. This thesis improves on the existing control method for the filter, and concentrates on the lowvoltage (below 1 kV AC) two-level voltage-source inverter implementation of the method. The ADUDT uses narrow voltage pulses having a duration in the order of a microsecond from an IGBT (insulated gate bipolar transistor) inverter to control the output voltage of a tuned LC filter circuit. The filter output voltage has thus increased slope transition times at the rising and falling edges, with an opportunity of no overshoot. The effect of the longer slope transition times is a reduction in the du/dt of the voltage fed to the motor cable. Lower du/dt values result in a reduction in the overvoltage effects on the motor terminals. Compared with traditional output filtering methods to accomplish this task, the active du/dt filtering provides lower inductance values and a smaller physical size of the filter itself. The filter circuit weight can also be reduced. However, the power semiconductor nonlinearities skew the filter control pulse pattern, resulting in control deviation. This deviation introduces unwanted overshoot and resonance in the filter. The controlmethod proposed in this thesis is able to directly compensate for the dead time-induced zero-current clamping (ZCC) effect in the pulse pattern. It gives more flexibility to the pattern structure, which could help in the timing deviation compensation design. Previous studies have shown that when a motor load current flows in the filter circuit and the inverter, the phase leg blanking times distort the voltage pulse sequence fed to the filter input. These blanking times are caused by excessively large dead time values between the IGBT control pulses. Moreover, the various switching timing distortions, present in realworld electronics when operating with a microsecond timescale, bring additional skew to the control. Left uncompensated, this results in distortion of the filter input voltage and a filter self-induced overvoltage in the form of an overshoot. This overshoot adds to the voltage appearing at the motor terminals, thus increasing the transient voltage amplitude at the motor. This doctoral thesis investigates the magnitude of such timing deviation effects. If the motor load current is left uncompensated in the control, the filter output voltage can overshoot up to double the input voltage amplitude. IGBT nonlinearities were observed to cause a smaller overshoot, in the order of 30%. This thesis introduces an improved ADUDT control method that is able to compensate for phase leg blanking times, giving flexibility to the pulse pattern structure and dead times. The control method is still sensitive to timing deviations, and their effect is investigated. A simple approach of using a fixed delay compensation value was tried in the test setup measurements. The ADUDT method with the new control algorithm was found to work in an actual motor drive application. Judging by the simulation results, with the delay compensation, the method should ultimately enable an output voltage performance and a du/dt reduction that are free from residual overshoot effects. The proposed control algorithm is not strictly required for successful ADUDT operation: It is possible to precalculate the pulse patterns by iteration and then for instance store them into a look-up table inside the control electronics. Rather, the newly developed control method is a mathematical tool for solving the ADUDT control pulses. It does not contain the timing deviation compensation (from the logic-level command to the phase leg output voltage), and as such is not able to remove the timing deviation effects that cause error and overshoot in the filter. When the timing deviation compensation has to be tuned-in in the control pattern, the precalculated iteration method could prove simpler and equally good (or even better) compared with the mathematical solution with a separate timing compensation module. One of the key findings in this thesis is the conclusion that the correctness of the pulse pattern structure, in the sense of ZCC and predicted pulse timings, cannot be separated from the timing deviations. The usefulness of the correctly calculated pattern is reduced by the voltage edge timing errors. The doctoral thesis provides an introductory background chapter on variable-speed AC drives and the problem of motor overvoltages and takes a look at traditional solutions for overvoltage mitigation. Previous results related to the active du/dt filtering are discussed. The basic operation principle and design of the filter have been studied previously. The effect of load current in the filter and the basic idea of compensation have been presented in the past. However, there was no direct way of including the dead time in the control (except for solving the pulse pattern manually by iteration), and the magnitude of nonlinearity effects had not been investigated. The enhanced control principle with the dead time handling capability and a case study of the test setup timing deviations are the main contributions of this doctoral thesis. The simulation and experimental setup results show that the proposed control method can be used in an actual drive. Loss measurements and a comparison of active du/dt output filtering with traditional output filtering methods are also presented in the work. Two different ADUDT filter designs are included, with ferrite core and air core inductors. Other filters included in the tests were a passive du/dtfilter and a passive sine filter. The loss measurements incorporated a silicon carbide diode-equipped IGBT module, and the results show lower losses with these new device technologies. The new control principle was measured in a 43 A load current motor drive system and was able to bring the filter output peak voltage from 980 V (the previous control principle) down to 680 V in a 540 V average DC link voltage variable-speed drive. A 200 m motor cable was used, and the filter losses for the active du/dt methods were 111W–126 W versus 184 W for the passive du/dt. In terms of inverter and filter losses, the active du/dt filtering method had a 1.82-fold increase in losses compared with an all-passive traditional du/dt output filter. The filter mass with the active du/dt method was 17% (2.4 kg, air-core inductors) compared with 14 kg of the passive du/dt method filter. Silicon carbide freewheeling diodes were found to reduce the inverter losses in the active du/dt filtering by 18% compared with the same IGBT module with silicon diodes. For a 200 m cable length, the average peak voltage at the motor terminals was 1050 V with no filter, 960 V for the all-passive du/dt filter, and 700 V for the active du/dt filtering applying the new control principle.