994 resultados para code-switching


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With the rapid development of world-wide wind energy generation using doubly fed induction generations (DFIGs), low voltage ride through (LVRT) has become a great concern. This paper focuses on a unique topology of DFIG called IG connection mode to help the DFIG ride through grid faults smoothly. Transient analysis of IG connection mode is carried out to derive the generator currents. With this analysis, the control strategy for IG connection mode DFIG was developed. From the simulation results, it is clearly visible that IG mode could work in both normal and low grid voltage conditions. Simulation results clearly show that the DFIG with the proposed mode switching control could smoothly ride through low voltage grid faults while satisfying grid code requirements.

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A code-label recognition time of less than 500ps is demonstrated using low-cost FIRfilters. The electronically-processed label provides a control signal from an auto-correlated label. Error-free electronic code-label switching of an optical 10Gb/s signal is demonstrated. © 2010 Optical Society of America.

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Embedded systems are usually designed for a single or a specified set of tasks. This specificity means the system design as well as its hardware/software development can be highly optimized. Embedded software must meet the requirements such as high reliability operation on resource-constrained platforms, real time constraints and rapid development. This necessitates the adoption of static machine codes analysis tools running on a host machine for the validation and optimization of embedded system codes, which can help meet all of these goals. This could significantly augment the software quality and is still a challenging field.Embedded systems are usually designed for a single or a specified set of tasks. This specificity means the system design as well as its hardware/software development can be highly optimized. Embedded software must meet the requirements such as high reliability operation on resource-constrained platforms, real time constraints and rapid development. This necessitates the adoption of static machine codes analysis tools running on a host machine for the validation and optimization of embedded system codes, which can help meet all of these goals. This could significantly augment the software quality and is still a challenging field.Embedded systems are usually designed for a single or a specified set of tasks. This specificity means the system design as well as its hardware/software development can be highly optimized. Embedded software must meet the requirements such as high reliability operation on resource-constrained platforms, real time constraints and rapid development. This necessitates the adoption of static machine codes analysis tools running on a host machine for the validation and optimization of embedded system codes, which can help meet all of these goals. This could significantly augment the software quality and is still a challenging field.Embedded systems are usually designed for a single or a specified set of tasks. This specificity means the system design as well as its hardware/software development can be highly optimized. Embedded software must meet the requirements such as high reliability operation on resource-constrained platforms, real time constraints and rapid development. This necessitates the adoption of static machine codes analysis tools running on a host machine for the validation and optimization of embedded system codes, which can help meet all of these goals. This could significantly augment the software quality and is still a challenging field.This dissertation contributes to an architecture oriented code validation, error localization and optimization technique assisting the embedded system designer in software debugging, to make it more effective at early detection of software bugs that are otherwise hard to detect, using the static analysis of machine codes. The focus of this work is to develop methods that automatically localize faults as well as optimize the code and thus improve the debugging process as well as quality of the code.Validation is done with the help of rules of inferences formulated for the target processor. The rules govern the occurrence of illegitimate/out of place instructions and code sequences for executing the computational and integrated peripheral functions. The stipulated rules are encoded in propositional logic formulae and their compliance is tested individually in all possible execution paths of the application programs. An incorrect sequence of machine code pattern is identified using slicing techniques on the control flow graph generated from the machine code.An algorithm to assist the compiler to eliminate the redundant bank switching codes and decide on optimum data allocation to banked memory resulting in minimum number of bank switching codes in embedded system software is proposed. A relation matrix and a state transition diagram formed for the active memory bank state transition corresponding to each bank selection instruction is used for the detection of redundant codes. Instances of code redundancy based on the stipulated rules for the target processor are identified.This validation and optimization tool can be integrated to the system development environment. It is a novel approach independent of compiler/assembler, applicable to a wide range of processors once appropriate rules are formulated. Program states are identified mainly with machine code pattern, which drastically reduces the state space creation contributing to an improved state-of-the-art model checking. Though the technique described is general, the implementation is architecture oriented, and hence the feasibility study is conducted on PIC16F87X microcontrollers. The proposed tool will be very useful in steering novices towards correct use of difficult microcontroller features in developing embedded systems.

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This article explains the relevance of the Code and its place in the regulatory framework, discusses some of the key issues arising in the recent review (as identified by consumer advocates1), and explains the relationship between the Code and the Financial Ombudsman Service.

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“Hardware in the Loop” (HIL) testing is widely used in the automotive industry. The sophisticated electronic control units used for vehicle control are usually tested and evaluated using HIL-simulations. The HIL increases the degree of realistic testing of any system. Moreover, it helps in designing the structure and control of the system under test so that it works effectively in the situations that will be encountered in the system. Due to the size and the complexity of interaction within a power network, most research is based on pure simulation. To validate the performance of physical generator or protection system, most testing is constrained to very simple power network. This research, however, examines a method to test power system hardware within a complex virtual environment using the concept of the HIL. The HIL testing for electronic control units and power systems protection device can be easily performed at signal level. But performance of power systems equipments, such as distributed generation systems can not be evaluated at signal level using HIL testing. The HIL testing for power systems equipments is termed here as ‘Power Network in the Loop’ (PNIL). PNIL testing can only be performed at power level and requires a power amplifier that can amplify the simulation signal to the power level. A power network is divided in two parts. One part represents the Power Network Under Test (PNUT) and the other part represents the rest of the complex network. The complex network is simulated in real time simulator (RTS) while the PNUT is connected to the Voltage Source Converter (VSC) based power amplifier. Two way interaction between the simulator and amplifier is performed using analog to digital (A/D) and digital to analog (D/A) converters. The power amplifier amplifies the current or voltage signal of simulator to the power level and establishes the power level interaction between RTS and PNUT. In the first part of this thesis, design and control of a VSC based power amplifier that can amplify a broadband voltage signal is presented. A new Hybrid Discontinuous Control method is proposed for the amplifier. This amplifier can be used for several power systems applications. In the first part of the thesis, use of this amplifier in DSTATCOM and UPS applications are presented. In the later part of this thesis the solution of network in the loop testing with the help of this amplifier is reported. The experimental setup for PNIL testing is built in the laboratory of Queensland University of Technology and the feasibility of PNIL testing has been evaluated using the experimental studies. In the last section of this thesis a universal load with power regenerative capability is designed. This universal load is used to test the DG system using PNIL concepts. This thesis is composed of published/submitted papers that form the chapters in this dissertation. Each paper has been published or submitted during the period of candidature. Chapter 1 integrates all the papers to provide a coherent view of wide bandwidth switching amplifier and its used in different power systems applications specially for the solution of power systems testing using PNIL.

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This report is the culmination of a two-stage research project to inform the Australian property and construction industry generally, in addition to providing the Australian Building Codes Board (ABCB) with information to allow it to determine whether or not sustainability requirements are necessary in the Future Building Code of Australia (BCA21). The Australian Building Codes Board is a joint initiative of all levels of government in Australia. The Board’s mission is to provide for efficiency and cost effectiveness in meeting community expectations for health, safety and amenity in the design, construction and use of buildings through the creation of nationally consistent building codes, standards, regulatory requirements and regulatory systems. The Stage 1 (literature review) and Stage 2 (workshops) reports are intended to be read in conjunction with one another. These reports and the Database are provided as appendices. The Conclusions of this, the final report, are the result of the overall program of work.

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This paper presents a database ATP (Alternative Transient Program) simulated waveforms for shunt reactor switching cases with vacuum breakers in motor circuits following interruption of the starting current. The targeted objective is to provide multiple reignition simulated data for diagnostic and prognostic algorithms development, but also to help ATP users with practical study cases and component data compilation for shunt reactor switching. This method can be easily applied with different data for the different dielectric curves of circuit-breakers and networks. This paper presents design details, discusses some of the available cases and the advantages of such simulated data.

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Most buildings constructed in Australia must comply with the Building Code of Australia (BCA). Checking for compliance against the BCA is a major task for both designers and building surveyors. This project carries out a prototype research using the EDM Model Checker and the SMC Model Checker for automated design checking against the Building Codes of Australia for use in professional practice. In this project, we develop a means of encoding design requirements and domain specific knowledge for building codes and investigate the flexibility of building models to contain design information. After assessing two implementations of EDM and SMC that check compliance against deemed-to-satisfy provision of building codes relevant to access by people with disabilities, an approach to automated code checking using a shared object-oriented database is established. This project can be applied in other potential areas – including checking a building design for non-compliance of many types of design requirements. Recommendations for future development and use in other potential areas in construction industries are discussed

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The Australian construction industry is moving towards the implementation of a voluntary code of practice (VCP) for occupational health and safety (OHS). The evidence suggests that highly-visible clients and project management firms, in addition to their subcontractors, will embrace such a code, while smaller firms not operating in high-profile contracting regimes may prove reticent. This paper incorporates qualitative data from a research project commissioned by Engineers Australia and supported by the Australian Contractors’ Association, Property Council of Australia, Royal Australian Institute of Architects, Association of Consulting Engineers Australia, Australian Procurement and Construction Council, Master Builders Australia and the Australian CRC for Construction Innovation. The paper aims to understand the factors that facilitate or prevent the uptake of the proposed VCP by smaller firms, together with pathways to adoption.

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The Australian construction industry, reflecting a global trend, is moving towards the implementation of a voluntary code of practice (hereafter VCP) for occupational health and safety. The evidence suggests that highlyvisible clients and project management firms, in addition to their subcontractors, look set to embrace such a code. However, smaller firms not operating in high-profile contracting regimes may prove reticent to adopt a VCP. This paper incorporates qualitative data from a high-profile research project commissioned by Engineers Australia and supported by the Australian Contractors’ Association, Property Council of Australia, Royal Australian Institute of Architects, Association of Consulting Engineers Australia, Australian Procurement and Construction Council, Master Builders Australia and the Australian CRC for Construction Innovation. The paper aims to understand the factors that facilitate or prevent the uptake of the VCP by smaller firms, together with pathways to the adoption of a VCP by industry.

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The majority of Australian construction firms are small businesses, with 97% of general construction businesses employing less than 20 employees and 85% employing less than five employees (Lin and Mills, 2001; Lingard and Holmes, 2001). The Australian Bureau of Statistics’ definition of a small to medium enterprise was used for the purpose of this study (McLennan, 2000). This included small business employing less than twenty people and medium business employing less than 200 people. Although small to medium enterprises (SME) make up the major share of construction organisations in Australia, there is a paucity of published research in relation to occupational health and safety (OHS) issues for this group. Typically, SME organisations “are frequently undercapitalized and depend on continuous cash flow for their continued business” (Cole, 2003; 12). Research by Lin and Mills (2001) indicates that these factors influence the smaller operators’ ability and motivation to achieve high levels of OHS compared to larger firms which tend to integrate OHS into their management systems. According to Lin and Mills (2001; 137) small firms “do not feel the need to focus on OHS in their management systems, instead they often believe that the control of risk is the responsibility of employees”. This report documents findings from a qualitative research study that examined SME organisations’ views of a newly developed voluntary code of practice (VCOP), and ways in which they might implement the code in their businesses. The research also explored respondents’ awareness of current safety issues in industry in the context of their personal experiences.