Development of diagnostic and prognostic algorithms for SF6 puffer circuit breakers from transient waveforms : a validation proposal

- This paper presents a validation proposal for development of diagnostic and prognostic algorithms for SF6 puffer circuit-breakers reproduced from actual site waveforms. The re-ignition/restriking rates are duplicated in given circuits and the cumulative energy dissipated in interrupters by the restriking currents. The targeted objective is to provide a simulated database for diagnosis of re-ignition/restrikes relating to the phase to earth voltage and the number of re-ignition/restrikes as well as estimating the remaining life of SF6 circuit-breakers. The model-based diagnosis of a tool will be useful in monitoring re-ignition/restrikes as well as predicting a nozzle’s lifetime. This will help ATP users with practical study cases and component data compilation for shunt reactor switching and capacitor switching. This method can be easily applied with different data for the different dielectric curves of circuit breakers and networks. This paper presents modelling details and some of the available cases, required project support, the validation proposal, the specific plan for implementation and the propsed main contributions.

EMI issues in high power and high level diode-clamped converters

Planar busbar is a good candidate to reduce interconnection inductance in high power inverters compared with cables. However, power switching components with fast switching combined with hard switched-converters produce high di/dt during turn off time and busbar stray inductance then becomes an important issue which creates overvoltage. It is necessary to keep the busbar stray inductance as low as possible to decrease overvoltage and Electromagnetic Interference (EMI) noise. In this paper, the effect of different transient current loops on busbar physical structure of the high-voltage high-level diode-clamped converters will be highlighted. Design considerations of proper planar busbar will also be presented to optimise the overall design of diode-clamped converters.

Efficient Voltage/Current Spike Reduction by Active Gate Signaling

This paper presents an Active Gate Signaling scheme to reduce voltage/current spikes across insulated gate power switches in hard switching power electronic circuits. Voltage and/or current spikes may cause EMI noise. In addition, they increase voltage/current stress on the switch. Traditionally, a higher gate resistance is chosen to reduce voltage/current spikes. Since the switching loss will increase remarkably, an active gate voltage control scheme is developed to improve efficiency of hard switching circuits while the undesirable voltage and/or current spikes are minimized.

Modeling web search : preliminary results

This paper reports preliminary results from a study modeling the interplay between multitasking, cognitive coordination, and cognitive shifts during Web search. Study participants conducted three Web searches on personal information problems. Data collection techniques included pre- and post-search questionnaires; think-aloud protocols, Web search logs, observation, and post-search interviews. Key findings include: (1) users Web searches included multitasking, cognitive shifting and cognitive coordination processes, (2) cognitive coordination is the hinge linking multitasking and cognitive shifting that enables Web search construction, (3) cognitive shift levels determine the process of cognitive coordination, and (4) cognitive coordination is interplay of task, mechanism and strategy levels that underpin multitasking and task switching. An initial model depicts the interplay between multitasking, cognitive coordination, and cognitive shifts during Web search. Implications of the findings and further research are also discussed.

An exploration of varieties of visual attention : ERP findings

A set of five tasks was designed to examine dynamic aspects of visual attention: selective attention to color, selective attention to pattern, dividing and switching attention between color and pattern, and selective attention to pattern with changing target. These varieties of visual attention were examined using the same set of stimuli under different instruction sets; thus differences between tasks cannot be attributed to differences in the perceptual features of the stimuli. ERP data are presented for each of these tasks. A within-task analysis of different stimulus types varying in similarity to the attended target feature revealed that an early frontal selection positivity (FSP) was evident in selective attention tasks, regardless of whether color was the attended feature. The scalp distribution of a later posterior selection negativity (SN) was affected by whether the attended feature was color or pattern. The SN was largely unaffected by dividing attention across color and pattern. A large widespread positivity was evident in most conditions, consisting of at least three subcomponents which were differentially affected by the attention conditions. These findings are discussed in relation to prior research and the time course of visual attention processes in the brain.

Asymmetrical DC link voltage configuration for a diode-clamped inverter

There is a trade off between a number of output voltage levels and the reliability and efficiency of a multilevel converter. A new configuration of diode-clamped multilevel inverters with a different combination of DC link capacitors voltage has been proposed in this paper. Two different symmetrical and asymmetrical unequal arrangements for a four-level diode-clamped inverter have been compared, in order to find an optimum arrangement with lower switching losses and optimised output voltage quality. The simulation and hardware results for a four-level inverter show that the asymmetrical configuration can obtain more output voltage levels with the same number of components compared with a conventional four-level inverter and this will lead to the reduction of the harmonic content of the output voltage. A new family of multi-output DC-DC converters with a simple control strategy has been utilised as a front-end converter to supply the DC link capacitor voltages for the optimised configuration.

Using a current source to improve efficiency of a plasma system

This paper presents the possibility of utilizing a current source topology instead of a voltage source as an efficient, flexible and reliable power supply for plasma applications. A buck-boost converter with a current controller has been used to transfer energy from an inductor to a plasma system. A control strategy has also been designed to satisfy all the desired purposes. The main concept behind this topology is to provide high dv/dt regardless of the switching speed of a power switch and to control the current level to properly transfer adequate energy to various plasma applications.

A novel high voltage pulsed power supply based on low voltage switch-capacitor units

This paper presents a high voltage pulsed power system based on low voltage switch-capacitor units connected to a current source for several applications such as plasma systems. A buck-boost converter topology is used to utilize the current source and a series of low voltage switch-capacitor units is connected to the current source in order to provide high voltage with high voltage stress (dv/dt) as demanded by loads. This pulsed power converter is flexible in terms of energy control, in that the stored energy in the current source can be adjusted by changing the current magnitude to significantly improve the efficiency of various systems with different requirements. Output voltage magnitude and stress (dv/dt) can be controlled by a proper selection of components and control algorithm to turn on and off switching devices.

EMI in modern AC motor drive systems

In this paper, several aspects of high frequency related issues of modern AC motor drive systems, such as common mode voltage, shaft voltage and resultant bearing current and leakage currents, have been discussed. Conducted emission is a major problem in modern motor drives that produce undesirable effects on electronic devices. In modern power electronic systems, increasing power density and decreasing cost and size of system are market requirements. Switching losses, harmonics and EMI are the key factors which should be considered at the beginning stage of a design to optimise a drive system.

A new predictive current control technique for multilevel converters

Multilevel inverters provide an attractive solution for power electronics when both reduced harmonic contents and high voltages are required. In this paper, a novel predictive current control technique is proposed for a three-phase multilevel inverter, which controls the capacitors voltages and load currents with low switching losses. The advantage of this contribution is that the technique can be applied to more voltage levels without significantly changing the control circuit. The three-phase three-level inverter with a pure inductive load has been implemented to track reference currents using analogue circuits and programmable logic device.

Accelerated computation of cyclic steady state for simulated-moving-bed processes

Industrial applications of the simulated-moving-bed (SMB) chromatographic technology have brought an emergent demand to improve the SMB process operation for higher efficiency and better robustness. Improved process modelling and more-efficient model computation will pave a path to meet this demand. However, the SMB unit operation exhibits complex dynamics, leading to challenges in SMB process modelling and model computation. One of the significant problems is how to quickly obtain the steady state of an SMB process model, as process metrics at the steady state are critical for process design and real-time control. The conventional computation method, which solves the process model cycle by cycle and takes the solution only when a cyclic steady state is reached after a certain number of switching, is computationally expensive. Adopting the concept of quasi-envelope (QE), this work treats the SMB operation as a pseudo-oscillatory process because of its large number of continuous switching. Then, an innovative QE computation scheme is developed to quickly obtain the steady state solution of an SMB model for any arbitrary initial condition. The QE computation scheme allows larger steps to be taken for predicting the slow change of the starting state within each switching. Incorporating with the wavelet-based technique, this scheme is demonstrated to be effective and efficient for an SMB sugar separation process. Moreover, investigations are also carried out on when the computation scheme should be activated and how the convergence of the scheme is affected by a variable stepsize.

Yield-factor volatility models

The term structure of interest rates is often summarized using a handful of yield factors that capture shifts in the shape of the yield curve. In this paper, we develop a comprehensive model for volatility dynamics in the level, slope, and curvature of the yield curve that simultaneously includes level and GARCH effects along with regime shifts. We show that the level of the short rate is useful in modeling the volatility of the three yield factors and that there are significant GARCH effects present even after including a level effect. Further, we find that allowing for regime shifts in the factor volatilities dramatically improves the model’s fit and strengthens the level effect. We also show that a regime-switching model with level and GARCH effects provides the best out-of-sample forecasting performance of yield volatility. We argue that the auxiliary models often used to estimate term structure models with simulation-based estimation techniques should be consistent with the main features of the yield curve that are identified by our model.