A novel fast lock-in phase-locked loop frequency synthesizer with direct frequency presetting circuit

This paper proposes a novel, fast lock-in, phase-locked loop (PLL) frequency synthesizer. The synthesizer includes a novel mixed-signal voltage-controlled oscillator (VCO) with a direct frequency presetting circuit. The frequency presetting circuit can greatly speed up the lock-in process by accurately the presetting oscillation frequency of the VCO. We fully integrated the synthesizer in standard 0.35 mu m, 3.3 V complementary metal-oxide-semiconductors (CMOS) process. The entire chip area is only 0.4 mm(2). The measured results demonstrate that the synthesizer can speed up the lock-in process significantly and the lock-in time is less than 10 mu s over the entire oscillation frequency range. The measured phase noise of the synthesizer is -85 dBc/Hz at 10 kHz offset. The synthesizer avoids the tradeoff between the lock-in speed and the phase noise/spurs. The synthesizer monitors the chip temperature and automatically compensates for the variation in frequency with temperature.

Monolithic integration of electroabsorption modulator and DFB laser for 10-Gb/s transmission

A strained InGaAsP-InP multiple-quantum-well DFB laser monolithically integrated with electroabsorption modulator by ultra-low-pressure (22 mbar) selective-area-growth is presented. The integrated chip exhibits superior characteristics, such as low threshold current of 19 mA, single-mode operation around 1550 nm range with side-mode suppression ratio over 40 dB, and larger than 16 dB extinction ratio when coupled into a single-mode fiber. More than 10 GHz modulation bandwidth is also achieved. After packaged in a compact module, the device successfully performs 10-Gb/s NRZ transmission experiments through 53.3 km of standard fiber with 8.7 dB dynamic extinction ratio. A receiver sensitivity of -18.9 dBm at bit-error-rate of 10(-1)0 is confirmed. (c) 2005 Elsevier B.V. All rights reserved.

Electroabsoorption-modulated laser light-source module using selective area growth for 10 Gb/s transmission

In this work, a novel light source of strained InGaAsP/InGaAsP MQW EAM monolithically integrated with DFB laser is fabricated by ultra-low-pressure (22 x 10(2) Pa) selective area growth ( SAG) MOCVD technique. Superior device performances have been obtained, sue h as low threshold current of 19 mA, output light power of about 7 mW, and over 16 dB extinction ratio at 5 V applied voltage when coupled into a single mode fiber. Over 10 GHz 3 dB bandwidth in EAM part is developed with a driving voltage of 3 V. After the chip is packaged into a 7-pin butterfly compact module, 10-Gb/s NRZ transmission experiments are successfully performed in standard fiber. A clearly-open eye diagram is achieved in the module output with over 8.3 dB dynamic extinction ratio. Power penalty less than 1.5 dB has been obtained after transmission through 53.3 km of standard fiber, which demonstrates that high-speed, low chirp EAM/DFB integrated light source can be obtained by ultra-low-pressure (22 x 102 Pa) SAG method.

Compact SOI arrayed waveguide grating demultiplexer with broad spectral response

A compact eight-channel flat spectral response arrayed waveguide grating (AWG) multiplexer based on siliconon-insulator (SOI) materials has been fabricated on the planar lightwave circuit (PLC). The 1-dB bandwidth of 48 GHz and 3-dB bandwidth of 69 GHz are obtained for the 100 GHz channel spacing. Not only non-adjacent crosstalk but also adjacent crosstalk are less than -25 dB. The on-chip propagation loss range is from 3.5 to 3.9 dB, and the 2 total device size is 1.5 x 1.0 cm(2). (c) 2005 Elsevier B.V. All rights reserved.

Scattering-parameter measurements of laser diodes

An accurate and simple technique for measuring the input reflection coefficient and the frequency response of semiconductor laser diode chips is proposed and demonstrated. All the packaging parasitics could be obtained accurately using a calibrated probe, and the impedance of the intrinsic diode chip is deduced from the directly measured reflection coefficient. The directly measured impedance of a laser diode is affected strongly by the short bond wire. In the frequency response (S(2)1) measurements of semiconductor laser diode chips, the test fixture consists of a microwave probe, a submount, and a bond wire. The S-parameters of the probe could be determined using the short-open-match (SOM) method. Both the attenuation and the reflection of the test fixture have a strong influence on the directly measured frequency response, and in our proposed technique, the effect of test fixture is completely removed.

Fabrication of 4 x 4 tapered MMI coupler with large cross section

MMI coupler with large cross section has low coupling loss between the device and fiber. However, large chip area is required. Recently proposed N x N tapered MMI coupler shows a substantial reduction in device geometry. No such kind of devices with N > 2 has yet been realized up to now. The authors have demonstrated a 4 x 4 parabolically tapered MMI coupler with large cross section that can match the SM fiber in silicon-on-insulator (SOI) technology. The device exhibits a minimum uniformity of 0.36 dB and excess loss of 3.7 dB, It represents a key component for realization of MMI-based silicon integrated optical circuit technology.

Effective method for evaluation of semiconductor laser quality

The measurements of one hundred 1.3 mu m planar buried crescent (PBC) structure InGaAsP/InP lasers demonstrate that parameters given by the electrical derivative of varied temperature and the variation of the parameters with temperature can be used to appraise the quality and reliability of semiconductor lasers effectual. By measurement of electrical derivative curves one can evaluate the quality of epitaxial wafer and chip, find the problems in the material and the technology, offer the useful information on increasing the quality and improving the technology of devices. (C) 2000 Elsevier Science Ltd. All rights reserved.

High efficiency fiber to waveguide optical coupler in silicon-on-insulator-based slot waveguides - art. no. 68310R

We propose a novel optical fiber-to-waveguide coupler for integrated optical circuits. The proper materials and structural parameters of the coupler, which is based on a slot waveguide, are carefully analyzed using a full-vectorial three dimensional mode solver. Because the effective refractive index of the mode in a silicon-on-insulator-based slot waveguide can be extremely close to that of the fiber, a highly efficient fiber-to-waveguide coupling application can be realized. For a TE-like mode, the calculated minimum mismatch loss is about 1.8dB at 1550nm, and the mode conversion loss can be less than 0.5dB. The discussion of the present state-of-the-art is also involved. The proposed coupler can be used in chip-to-chip communication.

Optimized design on high-power GaN-based Micro-LEDs - art. no. 684108

The structure of micro-LEDs was optimized designed. Optical, electrical and thermal characteristics of micro-LEDs were improved. The optimized design make micro-LEDs suitable for high-power device. The light extraction efficiency of micro-LEDs was analyzed by the means of ray tracing. The results shows that increasing the inclination angle of sidewall and height of mesa, and reducing the absorption of p and n electrode can enhance the light extraction efficiency of micro-LEDs. Furthermore, the total light output power can be boosted by increasing the density of micro-structures on the device. The high-power flip-chip micro-LEDs were fabricated, which has higher quantum efficiency than conventional BALED's. When the number of microstructure in micro-LEDs was increased by 57%, the light output power was enhanced 24%. Light output power is 82.88mW at the current of 350mA and saturation current is up to 800mA, all of these are better than BALED which was fabricated in the same epitaxial wafer. The IN characteristics of micro-LEDs are almost identical to BALED.

The effects of sapphire substrates processes to the LED efficiency - art. no. 68410M

We investigate the relation between the thickness of sapphire substrates and the extraction efficiency of LED. The increasing about 5% was observed in the simulations and experiments when the sapphire thickness changed from 100um to 200um. But the output power increasing is inconspicuous when the thickness is more than 200um. The structure on bottom face of sapphire substrates can enhance the extraction efficiency of GaN-based LED, too. The difference of output power between the flip-chip LED with smooth bottom surface and the LED with roughness bottom surface is about 50%, where only a common sapphire grinding process is used. But for those LEDs grown on patterned sapphire substrate the difference is only about 10%. Another kind of periodic pattern on the bottom of sapphire is fabricated by the dry etch method, and the output of the back-etched LEDs is improved about 50% than a common. case.

A 10-bit 2GHz current-steering CMOS D/A converter

This paper presents a 2GS/s 10-bit CMOS digital-to-analog converter (DAC). This DAC consists of a unit current-cell matrix for 6MSBs and another unit current-cell matrix for 4LSBs, trading off between the precision and size of the chip. The Current Mode Logic (CML) is used to ensure high speed, and a double Centro-symmetric current matrix is designed by the Q(2) random walk strategy in order to ensure the linearity of the DAC. The DAC occupies 2.2 x 2.2 mm2 of die area, and consumes 790mw at a single 3.3V power supply.

A 5.6-mW Power Dissipation CMOS Frequency Synthesizer for L1/L2 Dual-Band GPS Application

This paper presents a wide tuning range CMOS frequency synthesizer for dual-band GPS receiver, which has been fabricated in a standard 0.18-um RF CMOS process. With a high Q on-chip inductor, the wide-band VCO shows a tuning range from 2 to 3.6GHz to cover 2.45GHz and 3.14GHz in case of process corner or temperature variation, with a current consumption varying accordingly from 0.8mA to 0.4mA, from a 1.8V supply voltage. The measurement results show that the whole frequency synthesizer costs a very low power consumption of 5.6mW working at L I band with in-band phase noise less than -82dBc/Hz and out-of-band phase noise about -112 dBc/Hz at 1MHz offset from a 3.142GHz carrier.

A widely tunable continuous-time LPF for a direct conversion DBS Tuner

A continuous-time 7th-order Butterworth Gm-C low pass filter (LPF) with on-chip automatic tuning circuit has been implemented for a direct conversion DBS tuner in a 0.35um SiGe BiCMOS technology. The filter's -3dB cutoff frequency f(0) can be tuned from 4MHz to 40MHz. A novel translinear transconductor (Gm) cell is used to implement the widely tunable and high linear filter. The filter has -0.5dB passband gain, 28nV/Hz(1/2) input referred noise, -2dBVrms passband IIP3, 24dBVrms stopband IIP3. The I/Q LPFs with the tuning circuit draw 16mA (with f(0)=20MHz) from 3.3 V supply, and occupy an area of 0.45 mm(2).

Design and Verification of the Programming Circuit in an Application-Specific FPGA

In this paper we present a methodology and its implementation for the design and verification of programming circuit used in a family of application-specific FPGAs that share a common architecture. Each member of the family is different either in the types of functional blocks contained or in the number of blocks of each type. The parametrized design methodology is presented here to achieve this goal. Even though our focus is on the programming circuitry that provides the interface between the FPGA core circuit and the external programming hardware, the parametrized design method can be generalized to the design of entire chip for all members in the FPGA family. The method presented here covers the generation of the design RTL files and the support files for synthesis, place-and-route layout and simulations. The proposed method is proven to work smoothly within the complete chip design methodology. We will describe the implementation of this method to the design of the programming circuit in details including the design flow from the behavioral-level design to the final layout as well as the verification. Different package options and different programming modes are included in the description of the design. The circuit design implementation is based on SMIC 0.13-micron CMOS technology.

A Novel Low-Power Digital Baseband Circuit for UHF RFID Tag with Sensors

A novel low-power digital baseband circuit for UHF RFID tag with sensors is presented in this paper. It proposes a novel baseband architecture and a new operating scheme to fulfill the sensor functions and to reduce power consumption. It is also compatible with the EPC C1G2 UHF RFID protocol. It adopts some advanced low power techniques for system design and circuit design: adaptive clock-gating, multi-clock domain and asynchronous circuit. The baseband circuit is implemented in 0.18um 1P3M standard CMOS process. ne chip area is 0.28 mm(2) excluding test pads. Its power consumption is 25uW under 1.1V power supply.