923 resultados para Children’s time-space


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This paper presents a time-domain stochastic system identification method based on Maximum Likelihood Estimation and the Expectation Maximization algorithm that is applied to the estimation of modal parameters from system input and output data. The effectiveness of this structural identification method is evaluated through numerical simulation. Modal parameters (eigenfrequencies, damping ratios and mode shapes) of the simulated structure are estimated applying the proposed identification method to a set of 100 simulated cases. The numerical results show that the proposed method estimates the modal parameters with precision in the presence of 20% measurement noise even. Finally, advantages and disadvantages of the method have been discussed.

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El entorno espacial actual hay un gran numero de micro-meteoritos y basura espacial generada por el hombre, lo cual plantea un riesgo para la seguridad de las operaciones en el espacio. La situación se agrava continuamente a causa de las colisiones de basura espacial en órbita, y los nuevos lanzamientos de satélites. Una parte significativa de esta basura son satélites muertos, y fragmentos de satélites resultantes de explosiones y colisiones de objetos en órbita. La mitigación de este problema se ha convertido en un tema de preocupación prioritario para todas las instituciones que participan en operaciones espaciales. Entre las soluciones existentes, las amarras electrodinámicas (EDT) proporcionan un eficiente dispositivo para el rápido de-orbitado de los satélites en órbita terrestre baja (LEO), al final de su vida útil. El campo de investigación de las amarras electrodinámicas (EDT) ha sido muy fructífero desde los años 70. Gracias a estudios teóricos, y a misiones para la demostración del funcionamiento de las amarras en órbita, esta tecnología se ha desarrollado muy rápidamente en las últimas décadas. Durante este período de investigación, se han identificado y superado múltiples problemas técnicos de diversa índole. Gran parte del funcionamiento básico del sistema EDT depende de su capacidad de supervivencia ante los micro-meteoritos y la basura espacial. Una amarra puede ser cortada completamente por una partícula cuando ésta tiene un diámetro mínimo. En caso de corte debido al impacto de partículas, una amarra en sí misma, podría ser un riesgo para otros satélites en funcionamiento. Por desgracia, tras varias demostraciones en órbita, no se ha podido concluir que este problema sea importante para el funcionamiento del sistema. En esta tesis, se presenta un análisis teórico de la capacidad de supervivencia de las amarras en el espacio. Este estudio demuestra las ventajas de las amarras de sección rectangular (cinta), en cuanto a la probabilidad de supervivencia durante la misión, frente a las amarras convencionales (cables de sección circular). Debido a su particular geometría (longitud mucho mayor que la sección transversal), una amarra puede tener un riesgo relativamente alto de ser cortado por un único impacto con una partícula de pequeñas dimensiones. Un cálculo analítico de la tasa de impactos fatales para una amarra cilindrica y de tipo cinta de igual longitud y masa, considerando el flujo de partículas de basura espacial del modelo ORDEM2000 de la NASA, muestra mayor probabilidad de supervivencia para las cintas. Dicho análisis ha sido comparado con un cálculo numérico empleando los modelos de flujo el ORDEM2000 y el MASTER2005 de ESA. Además se muestra que, para igual tiempo en órbita, una cinta tiene una probabilidad de supervivencia un orden y medio de magnitud mayor que una amarra cilindrica con igual masa y longitud. Por otra parte, de-orbitar una cinta desde una cierta altitud, es mucho más rápido, debido a su mayor perímetro que le permite capturar más corriente. Este es un factor adicional que incrementa la probabilidad de supervivencia de la cinta, al estar menos tiempo expuesta a los posibles impactos de basura espacial. Por este motivo, se puede afirmar finalmente y en sentido práctico, que la capacidad de supervivencia de la cinta es bastante alta, en comparación con la de la amarra cilindrica. El segundo objetivo de este trabajo, consiste en la elaboración de un modelo analítico, mejorando la aproximación del flujo de ORDEM2000 y MASTER2009, que permite calcular con precisión, la tasa de impacto fatal al año para una cinta en un rango de altitudes e inclinaciones, en lugar de unas condiciones particulares. Se obtiene el numero de corte por un cierto tiempo en función de la geometría de la cinta y propiedades de la órbita. Para las mismas condiciones, el modelo analítico, se compara con los resultados obtenidos del análisis numérico. Este modelo escalable ha sido esencial para la optimización del diseño de la amarra para las misiones de de-orbitado de los satélites, variando la masa del satélite y la altitud inicial de la órbita. El modelo de supervivencia se ha utilizado para construir una función objetivo con el fin de optimizar el diseño de amarras. La función objectivo es el producto del cociente entre la masa de la amarra y la del satélite y el numero de corte por un cierto tiempo. Combinando el modelo de supervivencia con una ecuación dinámica de la amarra donde aparece la fuerza de Lorentz, se elimina el tiempo y se escribe la función objetivo como función de la geometría de la cinta y las propietades de la órbita. Este modelo de optimización, condujo al desarrollo de un software, que esta en proceso de registro por parte de la UPM. La etapa final de este estudio, consiste en la estimación del número de impactos fatales, en una cinta, utilizando por primera vez una ecuación de límite balístico experimental. Esta ecuación ha sido desarollada para cintas, y permite representar los efectos tanto de la velocidad de impacto como el ángulo de impacto. Los resultados obtenidos demuestran que la cinta es altamente resistente a los impactos de basura espacial, y para una cinta con una sección transversal definida, el número de impactos críticos debidos a partículas no rastreables es significativamente menor. ABSTRACT The current space environment, consisting of man-made debris and tiny meteoroids, poses a risk to safe operations in space, and the situation is continuously deteriorating due to in-orbit debris collisions and to new satellite launches. Among these debris a significant portion is due to dead satellites and fragments of satellites resulted from explosions and in-orbit collisions. Mitigation of space debris has become an issue of first concern for all the institutions involved in space operations. Bare electrodynamic tethers (EDT) can provide an efficient mechanism for rapid de-orbiting of defunct satellites from low Earth orbit (LEO) at end of life. The research on EDT has been a fruitful field since the 70’s. Thanks to both theoretical studies and in orbit demonstration missions, this technology has been developed very fast in the following decades. During this period, several technical issues were identified and overcome. The core functionality of EDT system greatly depends on their survivability to the micrometeoroids and orbital debris, and a tether can become itself a kind of debris for other operating satellites in case of cutoff due to particle impact; however, this very issue is still inconclusive and conflicting after having a number of space demonstrations. A tether can be completely cut by debris having some minimal diameter. This thesis presents a theoretical analysis of the survivability of tethers in space. The study demonstrates the advantages of tape tethers over conventional round wires particularly on the survivability during the mission. Because of its particular geometry (length very much larger than cross-sectional dimensions), a tether may have a relatively high risk of being severed by the single impact of small debris. As a first approach to the problem, survival probability has been compared for a round and a tape tether of equal mass and length. The rates of fatal impact of orbital debris on round and tape tether, evaluated with an analytical approximation to debris flux modeled by NASA’s ORDEM2000, shows much higher survival probability for tapes. A comparative numerical analysis using debris flux model ORDEM2000 and ESA’s MASTER2005 shows good agreement with the analytical result. It also shows that, for a given time in orbit, a tape has a probability of survival of about one and a half orders of magnitude higher than a round tether of equal mass and length. Because de-orbiting from a given altitude is much faster for the tape due to its larger perimeter, its probability of survival in a practical sense is quite high. As the next step, an analytical model derived in this work allows to calculate accurately the fatal impact rate per year for a tape tether. The model uses power laws for debris-size ranges, in both ORDEM2000 and MASTER2009 debris flux models, to calculate tape tether survivability at different LEO altitudes. The analytical model, which depends on tape dimensions (width, thickness) and orbital parameters (inclinations, altitudes) is then compared with fully numerical results for different orbit inclinations, altitudes and tape width for both ORDEM2000 and MASTER2009 flux data. This scalable model not only estimates the fatal impact count but has proved essential in optimizing tether design for satellite de-orbit missions varying satellite mass and initial orbital altitude and inclination. Within the frame of this dissertation, a simple analysis has been finally presented, showing the scalable property of tape tether, thanks to the survivability model developed, that allows analyze and compare de-orbit performance for a large range of satellite mass and orbit properties. The work explicitly shows the product of tether-to-satellite mass-ratio and fatal impact count as a function of tether geometry and orbital parameters. Combining the tether dynamic equation involving Lorentz drag with space debris impact survivability model, eliminates time from the expression. Hence the product, is independent of tether de-orbit history and just depends on mission constraints and tether length, width and thickness. This optimization model finally led to the development of a friendly software tool named BETsMA, currently in process of registration by UPM. For the final step, an estimation of fatal impact rate on a tape tether has been done, using for the first time an experimental ballistic limit equation that was derived for tapes and accounts for the effects of both the impact velocity and impact angle. It is shown that tape tethers are highly resistant to space debris impacts and considering a tape tether with a defined cross section, the number of critical events due to impact with non-trackable debris is always significantly low.

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Air Mines The sky over the city's port was the color of a faulty screen, only partly lit up. As the silhouette of nearby buildings became darker, but more clearly visible against the fading blur-filter of a background, the realization came about how persistent a change had been taking place. Slowly, old wooden water reservoirs and rattling HVAC systems stopped being the only inhabitants of roofs. Slightly trembling, milkish jellyfish-translucent air volumes had joined the show in multiples. A few years ago artists and architects seized upon the death of buildings as their life-saving media. Equipped with constructive atlases and instruments they started disemboweling their subjects, poking about their systems, dumping out on the street the battered ugliness of their embarrassing bits and pieces, so rightly hidden by facades and height from everyday view. But, would you believe it? Even ?old ladies?, investment bankers or small children failed to get upset. Of course, old ladies are not what they used to be. It was old ladies themselves that made it happen after years of fights with the town hall, imaginative proposals and factual arguments. An industry with little financial gains but lots of welcome externalities was not, in fact, the ground for investment bankers. But they too had to admit that having otherwise stately buildings make fine particulate pencils with their facades was not the worse that could happen. Yes, making soot pencils had been found an interesting and visible end product of the endeavor, a sort of mining the air for vintage writing tools one can actually touch. The new view from the street did not seem as solid or dignified as that of old, and they hated that the market for Fine Particulates Extraction (FPE, read efpee) had to be applied on a matrix of blocks and streets that prevented undue concentration of the best or worse solutions. It had to be an evenly distributed city policy in order for the city to apply for cleaning casino money. Once the first prototypes had been deployed in buildings siding Garden Avenue or Bulwark Street even fast movers appreciated the sidekick of flower and plant smell dripping down the Urban Space Stations (USS, read use; USSs, read uses) as air and walls cooled off for a few hours after sunset. Enough. It was all nice to remember, but it was now time to go up and start the lightweight afternoon maintenance of their USS. Coop discussions had taken place all through the planning and continued through the construction phase as to how maintenance was going to be organized. Fasters had voted for a pro, pay a small amount and let them use it for rent and produce. In the end some neighbors decided they were slow enough to take care and it was now the turn. Regret came periodically, sometimes a week before, and lasted until work actually started. But lately it had been replaced by anxiety when it needed to be passed over to the next caretaker. It did not look their shift was good enough and couldn?t wait to fix it. Today small preparations needed to be made for a class visit next day from a nearby cook school. They were frequenters. It had not been easy, but it shouldn?t have been that hard. In the end, even the easiest things are hard if they involve a city, buildings and neighbors. On the face of the data, the technicalities and the way final designs had been worked out for adaptation to the different settings, the decision of where to go was self evident, but organization issues and the ever-growing politics of taste in a city of already-gentrified-rodents almost put the project in the frozen orbit of timeless beautiful future possibilities. This is how it was. A series of designs by XClinic and OSS had made it possible to adapt to different building structures, leave in most cases the roof untouched and adapted a new technology of flexing fiberglass tubes that dissipated wind pressure in smooth bending.......

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La telepesencia combina diferentes modalidades sensoriales, incluyendo, entre otras, la visual y la del tacto, para producir una sensación de presencia remota en el operador. Un elemento clave en la implementación de sistemas de telepresencia para permitir una telemanipulación del entorno remoto es el retorno de fuerza. Durante una telemanipulación, la energía mecánica es transferida entre el operador humano y el entorno remoto. En general, la energía es una propiedad de los objetos físicos, fundamental en su mutual interacción. En esta interacción, la energía se puede transmitir entre los objetos, puede cambiar de forma pero no puede crearse ni destruirse. En esta tesis, se aplica este principio fundamental para derivar un nuevo método de control bilateral que permite el diseño de sistemas de teleoperación estables para cualquier arquitectura concebible. El razonamiento parte del hecho de que la energía mecánica insertada por el operador humano en el sistema debe transferirse hacia el entorno remoto y viceversa. Tal como se verá, el uso de la energía como variable de control permite un tratamiento más general del sistema que el control convencional basado en variables específicas del sistema. Mediante el concepto de Red de Potencia de Retardo Temporal (RPRT), el problema de definir los flujos de energía en un sistema de teleoperación es solucionado con independencia de la arquitectura de comunicación. Como se verá, los retardos temporales son la principal causa de generación de energía virtual. Este hecho se observa con retardos a partir de 1 milisegundo. Esta energía virtual es añadida al sistema de forma intrínseca y representa la causa principal de inestabilidad. Se demuestra que las RPRTs son transportadoras de la energía deseada intercambiada entre maestro y esclavo pero a la vez generadoras de energía virtual debido al retardo temporal. Una vez estas redes son identificadas, el método de Control de Pasividad en el Dominio Temporal para RPRTs se propone como mecanismo de control para asegurar la pasividad del sistema, y as__ la estabilidad. El método se basa en el simple hecho de que esta energía virtual debido al retardo debe transformarse en disipación. As__ el sistema se aproxima al sistema deseado, donde solo la energía insertada desde un extremo es transferida hacia el otro. El sistema resultante presenta dos cualidades: por un lado la estabilidad del sistema queda garantizada con independencia de la arquitectura del sistema y del canal de comunicación; por el otro, el rendimiento es maximizado en términos de fidelidad de transmisión energética. Los métodos propuestos se sustentan con sistemas experimentales con diferentes arquitecturas de control y retardos entre 2 y 900 ms. La tesis concluye con un experimento que incluye una comunicación espacial basada en el satélite geoestacionario ASTRA. ABSTRACT Telepresence combines different sensorial modalities, including vision and touch, to produce a feeling of being present in a remote location. The key element to successfully implement a telepresence system and thus to allow telemanipulation of a remote environment is force feedback. In a telemanipulation, mechanical energy must convey from the human operator to the manipulated object found in the remote environment. In general, energy is a property of all physical objects, fundamental to their mutual interactions in which the energy can be transferred among the objects and can change form but cannot be created or destroyed. In this thesis, we exploit this fundamental principle to derive a novel bilateral control mechanism that allows designing stable teleoperation systems with any conceivable communication architecture. The rationale starts from the fact that the mechanical energy injected by a human operator into the system must be conveyed to the remote environment and Vice Versa. As will be seen, setting energy as the control variable allows a more general treatment of the controlled system in contrast to the more conventional control of specific systems variables. Through the Time Delay Power Network (TDPN) concept, the issue of defining the energy flows involved in a teleoperation system is solved with independence of the communication architecture. In particular, communication time delays are found to be a source of virtual energy. This fact is observed with delays starting from 1 millisecond. Since this energy is added, the resulting teleoperation system can be non-passive and thus become unstable. The Time Delay Power Networks are found to be carriers of the desired exchanged energy but also generators of virtual energy due to the time delay. Once these networks are identified, the Time Domain Passivity Control approach for TDPNs is proposed as a control mechanism to ensure system passivity and therefore, system stability. The proposed method is based on the simple fact that this intrinsically added energy due to the communication must be transformed into dissipation. Then the system becomes closer to the ambitioned one, where only the energy injected from one end of the system is conveyed to the other one. The resulting system presents two benefits: On one hand, system stability is guaranteed through passivity independently from the chosen control architecture and communication channel; on the other, performance is maximized in terms of energy transfer faithfulness. The proposed methods are sustained with a set of experimental implementations using different control architectures and communication delays ranging from 2 to 900 milliseconds. An experiment that includes a communication Space link based on the geostationary satellite ASTRA concludes this thesis.

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The ability to accurately observe the Earth's carbon cycles from space gives scientists an important tool to analyze climate change. Current space-borne Integrated-Path Differential Absorption (IPDA) Iidar concepts have the potential to meet this need. They are mainly based on the pulsed time-offlight principle, in which two high energy pulses of different wavelengths interrogate the atmosphere for its transmission properties and are backscattered by the ground. In this paper, feasibility study results of a Pseudo-Random Single Photon Counting (PRSPC) IPDA lidar are reported. The proposed approach replaces the high energy pulsed source (e.g. a solidstate laser), with a semiconductor laser in CW operation with a similar average power of a few Watts, benefiting from better efficiency and reliability. The auto-correlation property of Pseudo-Random Binary Sequence (PRBS) and temporal shifting of the codes can be utilized to transmit both wavelengths simultaneously, avoiding the beam misalignment problem experienced by pulsed techniques. The envelope signal to noise ratio has been analyzed, and various system parameters have been selected. By restricting the telescopes field-of-view, the dominant noise source of ambient light can be suppressed, and in addition with a low noise single photon counting detector, a retrieval precision of 1.5 ppm over 50 km along-track averaging could be attained. We also describe preliminary experimental results involving a negative feedback Indium Gallium Arsenide (InGaAs) single photon avalanche photodiode and a low power Distributed Feedback laser diode modulated with PRBS driven acoustic optical modulator. The results demonstrate that higher detector saturation count rates will be needed for use in future spacebourne missions but measurement linearity and precision should meet the stringent requirements set out by future Earthobserving missions.

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Energy storage at low maintenance cost is one of the key challenges for generating electricity from the solar energy. This paper presents the theoretical analysis (verified by CFD) of the night time performance of a recently proposed conceptual system that integrates thermal storage (via phase change materials) and thermophotovoltaics for power generation. These storage integrated solar thermophotovoltaic (SISTPV) systems are attractive owing to their simple design (no moving parts) and modularity compared to conventional Concentrated Solar Power (CSP) technologies. Importantly, the ability of high temperature operation of these systems allows the use of silicon (melting point of 1680 K) as the phase change material (PCM). Silicon's very high latent heat of fusion of 1800 kJ/kg and low cost ($1.70/kg), makes it an ideal heat storage medium enabling for an extremely high storage energy density and low weight modular systems. In this paper, the night time operation of the SISTPV system optimised for steady state is analysed. The results indicate that for any given PCM length, a combination of small taper ratio and large inlet hole-to-absorber area ratio are essential to increase the operation time and the average power produced during the night time. Additionally, the overall results show that there is a trade-off between running time and the average power produced during the night time. Average night time power densities as high as 30 W/cm(2) are possible if the system is designed with a small PCM length (10 cm) to operate just a few hours after sun-set, but running times longer than 72 h (3 days) are possible for larger lengths (50 cm) at the expense of a lower average power density of about 14 W/cm(2). In both cases the steady state system efficiency has been predicted to be about 30%. This makes SISTPV systems to be a versatile solution that can be adapted for operation in a broad range of locations with different climate conditions, even being used off-grid and in space applications.

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Operational Modal Analysis consists on estimate the modal parameters of a structure (natural frequencies, damping ratios and modal vectors) from output-only vibration measurements. The modal vectors can be only estimated where a sensor is placed, so when the number of available sensors is lower than the number of tested points, it is usual to perform several tests changing the position of the sensors from one test to the following (multiple setups of sensors): some sensors stay at the same position from setup to setup, and the other sensors change the position until all the tested points are covered. The permanent sensors are then used to merge the mode shape estimated at each setup (or partial modal vectors) into global modal vectors. Traditionally, the partial modal vectors are estimated independently setup by setup, and the global modal vectors are obtained in a postprocess phase. In this work we present two state space models that can be used to process all the recorded setups at the same time, and we also present how these models can be estimated using the maximum likelihood method. The result is that the global mode shape of each mode is obtained automatically, and subsequently, a single value for the natural frequency and damping ratio of the mode is computed. Finally, both models are compared using real measured data.

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A Space tether is a thin, multi-kilometers long conductive wire, joining a satellite and some opposite end mass, and keeping vertical in orbit by the gravity-gradient. The ambient plasma, being highly conductive, is equipotential in its own co-moving frame. In the tether frame, in relative motion however, there is in the plasma a motional electric field of order of 100 V/km, product of (near) orbital velocity and geomagnetic field. The electromotive force established over the tether length allows plasma contactor devices to collect electrons at one polarized-positive (anodic) end and eject electrons at the opposite end, setting up a current along a standard, fully insulated tether. The Lorentz force exerted on the current by the geomagnetic field itself is always drag; this relies on just thermodynamics, like air drag. The bare tether concept, introduced in 1992 at the Universidad Politécnica de Madrid (UPM), takes away the insulation and has electrons collected over the tether segment coming out polarized positive; the concept rests on 2D (Langmuir probe) current-collection in plasmas being greatly more efficient than 3D collection. A Plasma Contactor ejects electrons at the cathodic end. A bare tether with a thin-tape cross section has much greater perimeter and de-orbits much faster than a (corresponding) round bare tether of equal length and mass. Further, tethers being long and thin, they are prone to cuts by abundant small space debris, but BETs has shown that the tape has a probability of being cut per unit time smaller by more than one order of magnitude than the corresponding round tether (debris comparable to its width are much less abundant than debris comparable to the radius of the corresponding round tether). Also, the tape collects much more current, and de-orbits much faster, than a corresponding multi-line “tape” made of thin round wires cross-connected to survive debris cuts. Tethers use a dissipative mechanism quite different from air drag and can de-orbit in just a few months; also, tape tethers are much lighter than round tethers of equal length and perimeter, which can capture equal current. The 3 disparate tape dimensions allow easily scalable design. Switching the cathodic Contactor off-on allows maneuvering to avoid catastrophic collisions with big tracked debris. Lorentz braking is as reliable as air drag. Tethers are still reasonably effective at high inclinations, where the motional field is small, because the geomagnetic field is not just a dipole along the Earth polar axis. BETs is the EC FP7/Space Project 262972, financed in about 1.8 million euros, from 1 November 2010 to 31 January 2014, and carrying out RTD work on de-orbiting space debris. Coordinated by UPM, it has partners Università di Padova, ONERA-Toulouse, Colorado State University, SME Emxys, DLR–Bremen, and Fundación Tecnalia. BETs work involves 1) Designing, building, and ground-testing basic hardware subsystems Cathodic Plasma Contactor, Tether Deployment Mechanism, Power Control Module, and Tape with crosswise and lengthwise structure. 2) Testing current collection and verifying tether dynamical stability. 3) Preliminary design of tape dimensions for a generic mission, conducive to low system-to-satellite mass ratio and probability of cut by small debris, and ohmic-effects regime of tether current for fast de-orbiting. Reaching TRL 4-5, BETs appears ready for in-orbit demostration.

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Esta tesis doctoral se enmarca dentro del campo de los sistemas embebidos reconfigurables, redes de sensores inalámbricas para aplicaciones de altas prestaciones, y computación distribuida. El documento se centra en el estudio de alternativas de procesamiento para sistemas embebidos autónomos distribuidos de altas prestaciones (por sus siglas en inglés, High-Performance Autonomous Distributed Systems (HPADS)), así como su evolución hacia el procesamiento de alta resolución. El estudio se ha llevado a cabo tanto a nivel de plataforma como a nivel de las arquitecturas de procesamiento dentro de la plataforma con el objetivo de optimizar aspectos tan relevantes como la eficiencia energética, la capacidad de cómputo y la tolerancia a fallos del sistema. Los HPADS son sistemas realimentados, normalmente formados por elementos distribuidos conectados o no en red, con cierta capacidad de adaptación, y con inteligencia suficiente para llevar a cabo labores de prognosis y/o autoevaluación. Esta clase de sistemas suele formar parte de sistemas más complejos llamados sistemas ciber-físicos (por sus siglas en inglés, Cyber-Physical Systems (CPSs)). Los CPSs cubren un espectro enorme de aplicaciones, yendo desde aplicaciones médicas, fabricación, o aplicaciones aeroespaciales, entre otras muchas. Para el diseño de este tipo de sistemas, aspectos tales como la confiabilidad, la definición de modelos de computación, o el uso de metodologías y/o herramientas que faciliten el incremento de la escalabilidad y de la gestión de la complejidad, son fundamentales. La primera parte de esta tesis doctoral se centra en el estudio de aquellas plataformas existentes en el estado del arte que por sus características pueden ser aplicables en el campo de los CPSs, así como en la propuesta de un nuevo diseño de plataforma de altas prestaciones que se ajuste mejor a los nuevos y más exigentes requisitos de las nuevas aplicaciones. Esta primera parte incluye descripción, implementación y validación de la plataforma propuesta, así como conclusiones sobre su usabilidad y sus limitaciones. Los principales objetivos para el diseño de la plataforma propuesta se enumeran a continuación: • Estudiar la viabilidad del uso de una FPGA basada en RAM como principal procesador de la plataforma en cuanto a consumo energético y capacidad de cómputo. • Propuesta de técnicas de gestión del consumo de energía en cada etapa del perfil de trabajo de la plataforma. •Propuestas para la inclusión de reconfiguración dinámica y parcial de la FPGA (por sus siglas en inglés, Dynamic Partial Reconfiguration (DPR)) de forma que sea posible cambiar ciertas partes del sistema en tiempo de ejecución y sin necesidad de interrumpir al resto de las partes. Evaluar su aplicabilidad en el caso de HPADS. Las nuevas aplicaciones y nuevos escenarios a los que se enfrentan los CPSs, imponen nuevos requisitos en cuanto al ancho de banda necesario para el procesamiento de los datos, así como en la adquisición y comunicación de los mismos, además de un claro incremento en la complejidad de los algoritmos empleados. Para poder cumplir con estos nuevos requisitos, las plataformas están migrando desde sistemas tradicionales uni-procesador de 8 bits, a sistemas híbridos hardware-software que incluyen varios procesadores, o varios procesadores y lógica programable. Entre estas nuevas arquitecturas, las FPGAs y los sistemas en chip (por sus siglas en inglés, System on Chip (SoC)) que incluyen procesadores embebidos y lógica programable, proporcionan soluciones con muy buenos resultados en cuanto a consumo energético, precio, capacidad de cómputo y flexibilidad. Estos buenos resultados son aún mejores cuando las aplicaciones tienen altos requisitos de cómputo y cuando las condiciones de trabajo son muy susceptibles de cambiar en tiempo real. La plataforma propuesta en esta tesis doctoral se ha denominado HiReCookie. La arquitectura incluye una FPGA basada en RAM como único procesador, así como un diseño compatible con la plataforma para redes de sensores inalámbricas desarrollada en el Centro de Electrónica Industrial de la Universidad Politécnica de Madrid (CEI-UPM) conocida como Cookies. Esta FPGA, modelo Spartan-6 LX150, era, en el momento de inicio de este trabajo, la mejor opción en cuanto a consumo y cantidad de recursos integrados, cuando además, permite el uso de reconfiguración dinámica y parcial. Es importante resaltar que aunque los valores de consumo son los mínimos para esta familia de componentes, la potencia instantánea consumida sigue siendo muy alta para aquellos sistemas que han de trabajar distribuidos, de forma autónoma, y en la mayoría de los casos alimentados por baterías. Por esta razón, es necesario incluir en el diseño estrategias de ahorro energético para incrementar la usabilidad y el tiempo de vida de la plataforma. La primera estrategia implementada consiste en dividir la plataforma en distintas islas de alimentación de forma que sólo aquellos elementos que sean estrictamente necesarios permanecerán alimentados, cuando el resto puede estar completamente apagado. De esta forma es posible combinar distintos modos de operación y así optimizar enormemente el consumo de energía. El hecho de apagar la FPGA para ahora energía durante los periodos de inactividad, supone la pérdida de la configuración, puesto que la memoria de configuración es una memoria volátil. Para reducir el impacto en el consumo y en el tiempo que supone la reconfiguración total de la plataforma una vez encendida, en este trabajo, se incluye una técnica para la compresión del archivo de configuración de la FPGA, de forma que se consiga una reducción del tiempo de configuración y por ende de la energía consumida. Aunque varios de los requisitos de diseño pueden satisfacerse con el diseño de la plataforma HiReCookie, es necesario seguir optimizando diversos parámetros tales como el consumo energético, la tolerancia a fallos y la capacidad de procesamiento. Esto sólo es posible explotando todas las posibilidades ofrecidas por la arquitectura de procesamiento en la FPGA. Por lo tanto, la segunda parte de esta tesis doctoral está centrada en el diseño de una arquitectura reconfigurable denominada ARTICo3 (Arquitectura Reconfigurable para el Tratamiento Inteligente de Cómputo, Confiabilidad y Consumo de energía) para la mejora de estos parámetros por medio de un uso dinámico de recursos. ARTICo3 es una arquitectura de procesamiento para FPGAs basadas en RAM, con comunicación tipo bus, preparada para dar soporte para la gestión dinámica de los recursos internos de la FPGA en tiempo de ejecución gracias a la inclusión de reconfiguración dinámica y parcial. Gracias a esta capacidad de reconfiguración parcial, es posible adaptar los niveles de capacidad de procesamiento, energía consumida o tolerancia a fallos para responder a las demandas de la aplicación, entorno, o métricas internas del dispositivo mediante la adaptación del número de recursos asignados para cada tarea. Durante esta segunda parte de la tesis se detallan el diseño de la arquitectura, su implementación en la plataforma HiReCookie, así como en otra familia de FPGAs, y su validación por medio de diferentes pruebas y demostraciones. Los principales objetivos que se plantean la arquitectura son los siguientes: • Proponer una metodología basada en un enfoque multi-hilo, como las propuestas por CUDA (por sus siglas en inglés, Compute Unified Device Architecture) u Open CL, en la cual distintos kernels, o unidades de ejecución, se ejecuten en un numero variable de aceleradores hardware sin necesidad de cambios en el código de aplicación. • Proponer un diseño y proporcionar una arquitectura en la que las condiciones de trabajo cambien de forma dinámica dependiendo bien de parámetros externos o bien de parámetros que indiquen el estado de la plataforma. Estos cambios en el punto de trabajo de la arquitectura serán posibles gracias a la reconfiguración dinámica y parcial de aceleradores hardware en tiempo real. • Explotar las posibilidades de procesamiento concurrente, incluso en una arquitectura basada en bus, por medio de la optimización de las transacciones en ráfaga de datos hacia los aceleradores. •Aprovechar las ventajas ofrecidas por la aceleración lograda por módulos puramente hardware para conseguir una mejor eficiencia energética. • Ser capaces de cambiar los niveles de redundancia de hardware de forma dinámica según las necesidades del sistema en tiempo real y sin cambios para el código de aplicación. • Proponer una capa de abstracción entre el código de aplicación y el uso dinámico de los recursos de la FPGA. El diseño en FPGAs permite la utilización de módulos hardware específicamente creados para una aplicación concreta. De esta forma es posible obtener rendimientos mucho mayores que en el caso de las arquitecturas de propósito general. Además, algunas FPGAs permiten la reconfiguración dinámica y parcial de ciertas partes de su lógica en tiempo de ejecución, lo cual dota al diseño de una gran flexibilidad. Los fabricantes de FPGAs ofrecen arquitecturas predefinidas con la posibilidad de añadir bloques prediseñados y poder formar sistemas en chip de una forma más o menos directa. Sin embargo, la forma en la que estos módulos hardware están organizados dentro de la arquitectura interna ya sea estática o dinámicamente, o la forma en la que la información se intercambia entre ellos, influye enormemente en la capacidad de cómputo y eficiencia energética del sistema. De la misma forma, la capacidad de cargar módulos hardware bajo demanda, permite añadir bloques redundantes que permitan aumentar el nivel de tolerancia a fallos de los sistemas. Sin embargo, la complejidad ligada al diseño de bloques hardware dedicados no debe ser subestimada. Es necesario tener en cuenta que el diseño de un bloque hardware no es sólo su propio diseño, sino también el diseño de sus interfaces, y en algunos casos de los drivers software para su manejo. Además, al añadir más bloques, el espacio de diseño se hace más complejo, y su programación más difícil. Aunque la mayoría de los fabricantes ofrecen interfaces predefinidas, IPs (por sus siglas en inglés, Intelectual Property) comerciales y plantillas para ayudar al diseño de los sistemas, para ser capaces de explotar las posibilidades reales del sistema, es necesario construir arquitecturas sobre las ya establecidas para facilitar el uso del paralelismo, la redundancia, y proporcionar un entorno que soporte la gestión dinámica de los recursos. Para proporcionar este tipo de soporte, ARTICo3 trabaja con un espacio de soluciones formado por tres ejes fundamentales: computación, consumo energético y confiabilidad. De esta forma, cada punto de trabajo se obtiene como una solución de compromiso entre estos tres parámetros. Mediante el uso de la reconfiguración dinámica y parcial y una mejora en la transmisión de los datos entre la memoria principal y los aceleradores, es posible dedicar un número variable de recursos en el tiempo para cada tarea, lo que hace que los recursos internos de la FPGA sean virtualmente ilimitados. Este variación en el tiempo del número de recursos por tarea se puede usar bien para incrementar el nivel de paralelismo, y por ende de aceleración, o bien para aumentar la redundancia, y por lo tanto el nivel de tolerancia a fallos. Al mismo tiempo, usar un numero óptimo de recursos para una tarea mejora el consumo energético ya que bien es posible disminuir la potencia instantánea consumida, o bien el tiempo de procesamiento. Con el objetivo de mantener los niveles de complejidad dentro de unos límites lógicos, es importante que los cambios realizados en el hardware sean totalmente transparentes para el código de aplicación. A este respecto, se incluyen distintos niveles de transparencia: • Transparencia a la escalabilidad: los recursos usados por una misma tarea pueden ser modificados sin que el código de aplicación sufra ningún cambio. • Transparencia al rendimiento: el sistema aumentara su rendimiento cuando la carga de trabajo aumente, sin cambios en el código de aplicación. • Transparencia a la replicación: es posible usar múltiples instancias de un mismo módulo bien para añadir redundancia o bien para incrementar la capacidad de procesamiento. Todo ello sin que el código de aplicación cambie. • Transparencia a la posición: la posición física de los módulos hardware es arbitraria para su direccionamiento desde el código de aplicación. • Transparencia a los fallos: si existe un fallo en un módulo hardware, gracias a la redundancia, el código de aplicación tomará directamente el resultado correcto. • Transparencia a la concurrencia: el hecho de que una tarea sea realizada por más o menos bloques es transparente para el código que la invoca. Por lo tanto, esta tesis doctoral contribuye en dos líneas diferentes. En primer lugar, con el diseño de la plataforma HiReCookie y en segundo lugar con el diseño de la arquitectura ARTICo3. Las principales contribuciones de esta tesis se resumen a continuación. • Arquitectura de la HiReCookie incluyendo: o Compatibilidad con la plataforma Cookies para incrementar las capacidades de esta. o División de la arquitectura en distintas islas de alimentación. o Implementación de los diversos modos de bajo consumo y políticas de despertado del nodo. o Creación de un archivo de configuración de la FPGA comprimido para reducir el tiempo y el consumo de la configuración inicial. • Diseño de la arquitectura reconfigurable para FPGAs basadas en RAM ARTICo3: o Modelo de computación y modos de ejecución inspirados en el modelo de CUDA pero basados en hardware reconfigurable con un número variable de bloques de hilos por cada unidad de ejecución. o Estructura para optimizar las transacciones de datos en ráfaga proporcionando datos en cascada o en paralelo a los distinto módulos incluyendo un proceso de votado por mayoría y operaciones de reducción. o Capa de abstracción entre el procesador principal que incluye el código de aplicación y los recursos asignados para las diferentes tareas. o Arquitectura de los módulos hardware reconfigurables para mantener la escalabilidad añadiendo una la interfaz para las nuevas funcionalidades con un simple acceso a una memoria RAM interna. o Caracterización online de las tareas para proporcionar información a un módulo de gestión de recursos para mejorar la operación en términos de energía y procesamiento cuando además se opera entre distintos nieles de tolerancia a fallos. El documento está dividido en dos partes principales formando un total de cinco capítulos. En primer lugar, después de motivar la necesidad de nuevas plataformas para cubrir las nuevas aplicaciones, se detalla el diseño de la plataforma HiReCookie, sus partes, las posibilidades para bajar el consumo energético y se muestran casos de uso de la plataforma así como pruebas de validación del diseño. La segunda parte del documento describe la arquitectura reconfigurable, su implementación en varias FPGAs, y pruebas de validación en términos de capacidad de procesamiento y consumo energético, incluyendo cómo estos aspectos se ven afectados por el nivel de tolerancia a fallos elegido. Los capítulos a lo largo del documento son los siguientes: El capítulo 1 analiza los principales objetivos, motivación y aspectos teóricos necesarios para seguir el resto del documento. El capítulo 2 está centrado en el diseño de la plataforma HiReCookie y sus posibilidades para disminuir el consumo de energía. El capítulo 3 describe la arquitectura reconfigurable ARTICo3. El capítulo 4 se centra en las pruebas de validación de la arquitectura usando la plataforma HiReCookie para la mayoría de los tests. Un ejemplo de aplicación es mostrado para analizar el funcionamiento de la arquitectura. El capítulo 5 concluye esta tesis doctoral comentando las conclusiones obtenidas, las contribuciones originales del trabajo y resultados y líneas futuras. ABSTRACT This PhD Thesis is framed within the field of dynamically reconfigurable embedded systems, advanced sensor networks and distributed computing. The document is centred on the study of processing solutions for high-performance autonomous distributed systems (HPADS) as well as their evolution towards High performance Computing (HPC) systems. The approach of the study is focused on both platform and processor levels to optimise critical aspects such as computing performance, energy efficiency and fault tolerance. HPADS are considered feedback systems, normally networked and/or distributed, with real-time adaptive and predictive functionality. These systems, as part of more complex systems known as Cyber-Physical Systems (CPSs), can be applied in a wide range of fields such as military, health care, manufacturing, aerospace, etc. For the design of HPADS, high levels of dependability, the definition of suitable models of computation, and the use of methodologies and tools to support scalability and complexity management, are required. The first part of the document studies the different possibilities at platform design level in the state of the art, together with description, development and validation tests of the platform proposed in this work to cope with the previously mentioned requirements. The main objectives targeted by this platform design are the following: • Study the feasibility of using SRAM-based FPGAs as the main processor of the platform in terms of energy consumption and performance for high demanding applications. • Analyse and propose energy management techniques to reduce energy consumption in every stage of the working profile of the platform. • Provide a solution with dynamic partial and wireless remote HW reconfiguration (DPR) to be able to change certain parts of the FPGA design at run time and on demand without interrupting the rest of the system. • Demonstrate the applicability of the platform in different test-bench applications. In order to select the best approach for the platform design in terms of processing alternatives, a study of the evolution of the state-of-the-art platforms is required to analyse how different architectures cope with new more demanding applications and scenarios: security, mixed-critical systems for aerospace, multimedia applications, or military environments, among others. In all these scenarios, important changes in the required processing bandwidth or the complexity of the algorithms used are provoking the migration of the platforms from single microprocessor architectures to multiprocessing and heterogeneous solutions with more instant power consumption but higher energy efficiency. Within these solutions, FPGAs and Systems on Chip including FPGA fabric and dedicated hard processors, offer a good trade of among flexibility, processing performance, energy consumption and price, when they are used in demanding applications where working conditions are very likely to vary over time and high complex algorithms are required. The platform architecture proposed in this PhD Thesis is called HiReCookie. It includes an SRAM-based FPGA as the main and only processing unit. The FPGA selected, the Xilinx Spartan-6 LX150, was at the beginning of this work the best choice in terms of amount of resources and power. Although, the power levels are the lowest of these kind of devices, they can be still very high for distributed systems that normally work powered by batteries. For that reason, it is necessary to include different energy saving possibilities to increase the usability of the platform. In order to reduce energy consumption, the platform architecture is divided into different power islands so that only those parts of the systems that are strictly needed are powered on, while the rest of the islands can be completely switched off. This allows a combination of different low power modes to decrease energy. In addition, one of the most important handicaps of SRAM-based FPGAs is that they are not alive at power up. Therefore, recovering the system from a switch-off state requires to reload the FPGA configuration from a non-volatile memory device. For that reason, this PhD Thesis also proposes a methodology to compress the FPGA configuration file in order to reduce time and energy during the initial configuration process. Although some of the requirements for the design of HPADS are already covered by the design of the HiReCookie platform, it is necessary to continue improving energy efficiency, computing performance and fault tolerance. This is only possible by exploiting all the opportunities provided by the processing architectures configured inside the FPGA. Therefore, the second part of the thesis details the design of the so called ARTICo3 FPGA architecture to enhance the already intrinsic capabilities of the FPGA. ARTICo3 is a DPR-capable bus-based virtual architecture for multiple HW acceleration in SRAM-based FPGAs. The architecture provides support for dynamic resource management in real time. In this way, by using DPR, it will be possible to change the levels of computing performance, energy consumption and fault tolerance on demand by increasing or decreasing the amount of resources used by the different tasks. Apart from the detailed design of the architecture and its implementation in different FPGA devices, different validation tests and comparisons are also shown. The main objectives targeted by this FPGA architecture are listed as follows: • Provide a method based on a multithread approach such as those offered by CUDA (Compute Unified Device Architecture) or OpenCL kernel executions, where kernels are executed in a variable number of HW accelerators without requiring application code changes. • Provide an architecture to dynamically adapt working points according to either self-measured or external parameters in terms of energy consumption, fault tolerance and computing performance. Taking advantage of DPR capabilities, the architecture must provide support for a dynamic use of resources in real time. • Exploit concurrent processing capabilities in a standard bus-based system by optimizing data transactions to and from HW accelerators. • Measure the advantage of HW acceleration as a technique to boost performance to improve processing times and save energy by reducing active times for distributed embedded systems. • Dynamically change the levels of HW redundancy to adapt fault tolerance in real time. • Provide HW abstraction from SW application design. FPGAs give the possibility of designing specific HW blocks for every required task to optimise performance while some of them include the possibility of including DPR. Apart from the possibilities provided by manufacturers, the way these HW modules are organised, addressed and multiplexed in area and time can improve computing performance and energy consumption. At the same time, fault tolerance and security techniques can also be dynamically included using DPR. However, the inherent complexity of designing new HW modules for every application is not negligible. It does not only consist of the HW description, but also the design of drivers and interfaces with the rest of the system, while the design space is widened and more complex to define and program. Even though the tools provided by the majority of manufacturers already include predefined bus interfaces, commercial IPs, and templates to ease application prototyping, it is necessary to improve these capabilities. By adding new architectures on top of them, it is possible to take advantage of parallelization and HW redundancy while providing a framework to ease the use of dynamic resource management. ARTICo3 works within a solution space where working points change at run time in a 3D space defined by three different axes: Computation, Consumption, and Fault Tolerance. Therefore, every working point is found as a trade-off solution among these three axes. By means of DPR, different accelerators can be multiplexed so that the amount of available resources for any application is virtually unlimited. Taking advantage of DPR capabilities and a novel way of transmitting data to the reconfigurable HW accelerators, it is possible to dedicate a dynamically-changing number of resources for a given task in order to either boost computing speed or adding HW redundancy and a voting process to increase fault-tolerance levels. At the same time, using an optimised amount of resources for a given task reduces energy consumption by reducing instant power or computing time. In order to keep level complexity under certain limits, it is important that HW changes are transparent for the application code. Therefore, different levels of transparency are targeted by the system: • Scalability transparency: a task must be able to expand its resources without changing the system structure or application algorithms. • Performance transparency: the system must reconfigure itself as load changes. • Replication transparency: multiple instances of the same task are loaded to increase reliability and performance. • Location transparency: resources are accessed with no knowledge of their location by the application code. • Failure transparency: task must be completed despite a failure in some components. • Concurrency transparency: different tasks will work in a concurrent way transparent to the application code. Therefore, as it can be seen, the Thesis is contributing in two different ways. First with the design of the HiReCookie platform and, second with the design of the ARTICo3 architecture. The main contributions of this PhD Thesis are then listed below: • Architecture of the HiReCookie platform including: o Compatibility of the processing layer for high performance applications with the Cookies Wireless Sensor Network platform for fast prototyping and implementation. o A division of the architecture in power islands. o All the different low-power modes. o The creation of the partial-initial bitstream together with the wake-up policies of the node. • The design of the reconfigurable architecture for SRAM FPGAs: ARTICo3: o A model of computation and execution modes inspired in CUDA but based on reconfigurable HW with a dynamic number of thread blocks per kernel. o A structure to optimise burst data transactions providing coalesced or parallel data to HW accelerators, parallel voting process and reduction operation. o The abstraction provided to the host processor with respect to the operation of the kernels in terms of the number of replicas, modes of operation, location in the reconfigurable area and addressing. o The architecture of the modules representing the thread blocks to make the system scalable by adding functional units only adding an access to a BRAM port. o The online characterization of the kernels to provide information to a scheduler or resource manager in terms of energy consumption and processing time when changing among different fault-tolerance levels, as well as if a kernel is expected to work in the memory-bounded or computing-bounded areas. The document of the Thesis is divided into two main parts with a total of five chapters. First, after motivating the need for new platforms to cover new more demanding applications, the design of the HiReCookie platform, its parts and several partial tests are detailed. The design of the platform alone does not cover all the needs of these applications. Therefore, the second part describes the architecture inside the FPGA, called ARTICo3, proposed in this PhD Thesis. The architecture and its implementation are tested in terms of energy consumption and computing performance showing different possibilities to improve fault tolerance and how this impact in energy and time of processing. Chapter 1 shows the main goals of this PhD Thesis and the technology background required to follow the rest of the document. Chapter 2 shows all the details about the design of the FPGA-based platform HiReCookie. Chapter 3 describes the ARTICo3 architecture. Chapter 4 is focused on the validation tests of the ARTICo3 architecture. An application for proof of concept is explained where typical kernels related to image processing and encryption algorithms are used. Further experimental analyses are performed using these kernels. Chapter 5 concludes the document analysing conclusions, comments about the contributions of the work, and some possible future lines for the work.

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Glutamate transporters in the central nervous system are expressed in both neurons and glia, they mediate high affinity, electrogenic uptake of glutamate, and they are associated with an anion conductance that is stoichiometrically uncoupled from glutamate flux. Although a complete cycle of transport may require 50–100 ms, previous studies suggest that transporters can alter synaptic currents on a much faster time scale. We find that application of l-glutamate to outside-out patches from cerebellar Bergmann glia activates anion-potentiated glutamate transporter currents that activate in <1 ms, suggesting an efficient mechanism for the capture of extrasynaptic glutamate. Stimulation in the granule cell layer in cerebellar slices elicits all or none α-amino-3-hydroxy-5-methyl-4-isoxazolepropionate receptor and glutamate transporter currents in Bergmann glia that have a rapid onset, suggesting that glutamate released from climbing fiber terminals escapes synaptic clefts and reaches glial membranes shortly after release. Comparison of the concentration dependence of both α-amino-3-hydroxy-5-methyl-4-isoxazolepropionate receptor and glutamate transporter kinetics in patches with the time course of climbing fiber-evoked responses indicates that the glutamate transient at Bergmann glial membranes reaches a lower concentration than attained in the synaptic cleft and remains elevated in the extrasynaptic space for many milliseconds.

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The conformational space annealing (CSA) method for global optimization has been applied to the 10-55 fragment of the B-domain of staphylococcal protein A (protein A) and to a 75-residue protein, apo calbindin D9K (PDB ID code 1CLB), by using the UNRES off-lattice united-residue force field. Although the potential was not calibrated with these two proteins, the native-like structures were found among the low-energy conformations, without the use of threading or secondary-structure predictions. This is because the CSA method can find many distinct families of low-energy conformations. Starting from random conformations, the CSA method found that there are two families of low-energy conformations for each of the two proteins, the native-like fold and its mirror image. The CSA method converged to the same low-energy folds in all cases studied, as opposed to other optimization methods. It appears that the CSA method with the UNRES force field, which is based on the thermodynamic hypothesis, can be used in prediction of protein structures in real time.

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Spin glasses are a longstanding model for the sluggish dynamics that appear at the glass transition. However, spin glasses differ from structural glasses in a crucial feature: they enjoy a time reversal symmetry. This symmetry can be broken by applying an external magnetic field, but embarrassingly little is known about the critical behavior of a spin glass in a field. In this context, the space dimension is crucial. Simulations are easier to interpret in a large number of dimensions, but one must work below the upper critical dimension (i.e., in d < 6) in order for results to have relevance for experiments. Here we show conclusive evidence for the presence of a phase transition in a four-dimensional spin glass in a field. Two ingredients were crucial for this achievement: massive numerical simulations were carried out on the Janus special-purpose computer, and a new and powerful finite-size scaling method.

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This dissertation examines the role of worldview and language in the cultural framework of American Indian people. In it I develop a theory of worldview which can be defined as an interrelated set of logics that orients a culture to space (land), time, the rest of life, and provides a prescription for understanding that life. Considering the strong links between language and worldview, it is methodologically necessary to focus on a particular language and culture to decolonize concepts of and relationships to land. In particular, this dissertation focuses on an Anishinaabe worldview as consisting of four components, which are; (1) an intimate relationship to a localized space; (2) a cyclical understanding of time; (3) living in a web of relatedness with all life, and (4) understanding the world around us in terms of balance. The methodological approach draws from Anishinaabemowin, the traditional Anishinaabe language, as a starting place for negotiating a linguistic-conceptual analysis of these logics to decolonize the understandings of land, time, relatedness and balance. This dissertation helps to demonstrate that the religious language as codified in the 1st Amendment to the United States Constitution as religious freedom is unable to carry the meaning of the fundamental relationships to land that are embedded in Anishinaabemowin and culture. I compare the above Anishinaabe worldview to that of the eurowestern culture in America, which is; (1) the domination of space; (2) a linear progression of time; (3) a hierarchical organization of life; and (4) understanding the world as a Manichean battle of good versus evil. This dissertation seeks to decolonize American Indian translational methodologies and undermine the assumptions of eurowestern cultural universality.

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La interacción de redes sociales y productos televisivos ha dado pie al nacimiento de la televisión social en la que el espectador participa activamente en el desarrollo de los espacios. Este fenómeno emergente está siendo objeto de múltiples investigaciones en el campo de las audiencias por las posibilidades y el potencial que supone para el medio a la hora de conocer e interactuar con los espectadores. El objetivo de este trabajo es realizar una comparación entre la audiencia real y la audiencia social (o impacto social) de los programas emitidos en prime-time durante varias semanas de los meses de abril y mayo de 2013. Esta investigación se centra en Twitter por ser la red social que concentra gran parte de los debates sobre televisión (Gallego, 2013). Para ello se plantean las siguientes hipótesis de partida: 1- No existe paralelismo entre los cinco programas más vistos en televisión con aquellos que se sitúan entre los cinco con mayor audiencia social del mismo día. 2- El éxito de un programa en audiencia social no depende exclusivamente de su formato. Para alcanzar los objetivos de la investigación se estudian los datos de audiencia real procedentes de Kantar Media, así como los de impacto social facilitados Tuitele y Global-In-Media.

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In this paper, a novel approach for exploiting multitemporal remote sensing data focused on real-time monitoring of agricultural crops is presented. The methodology is defined in a dynamical system context using state-space techniques, which enables the possibility of merging past temporal information with an update for each new acquisition. The dynamic system context allows us to exploit classical tools in this domain to perform the estimation of relevant variables. A general methodology is proposed, and a particular instance is defined in this study based on polarimetric radar data to track the phenological stages of a set of crops. A model generation from empirical data through principal component analysis is presented, and an extended Kalman filter is adapted to perform phenological stage estimation. Results employing quad-pol Radarsat-2 data over three different cereals are analyzed. The potential of this methodology to retrieve vegetation variables in real time is shown.