942 resultados para 291605 Processor Architectures


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Sensor networks represent an attractive tool to observe the physical world. Networks of tiny sensors can be used to detect a fire in a forest, to monitor the level of pollution in a river, or to check on the structural integrity of a bridge. Application-specific deployments of static-sensor networks have been widely investigated. Commonly, these networks involve a centralized data-collection point and no sharing of data outside the organization that owns it. Although this approach can accommodate many application scenarios, it significantly deviates from the pervasive computing vision of ubiquitous sensing where user applications seamlessly access anytime, anywhere data produced by sensors embedded in the surroundings. With the ubiquity and ever-increasing capabilities of mobile devices, urban environments can help give substance to the ubiquitous sensing vision through Urbanets, spontaneously created urban networks. Urbanets consist of mobile multi-sensor devices, such as smart phones and vehicular systems, public sensor networks deployed by municipalities, and individual sensors incorporated in buildings, roads, or daily artifacts. My thesis is that "multi-sensor mobile devices can be successfully programmed to become the underpinning elements of an open, infrastructure-less, distributed sensing platform that can bring sensor data out of their traditional close-loop networks into everyday urban applications". Urbanets can support a variety of services ranging from emergency and surveillance to tourist guidance and entertainment. For instance, cars can be used to provide traffic information services to alert drivers to upcoming traffic jams, and phones to provide shopping recommender services to inform users of special offers at the mall. Urbanets cannot be programmed using traditional distributed computing models, which assume underlying networks with functionally homogeneous nodes, stable configurations, and known delays. Conversely, Urbanets have functionally heterogeneous nodes, volatile configurations, and unknown delays. Instead, solutions developed for sensor networks and mobile ad hoc networks can be leveraged to provide novel architectures that address Urbanet-specific requirements, while providing useful abstractions that hide the network complexity from the programmer. This dissertation presents two middleware architectures that can support mobile sensing applications in Urbanets. Contory offers a declarative programming model that views Urbanets as a distributed sensor database and exposes an SQL-like interface to developers. Context-aware Migratory Services provides a client-server paradigm, where services are capable of migrating to different nodes in the network in order to maintain a continuous and semantically correct interaction with clients. Compared to previous approaches to supporting mobile sensing urban applications, our architectures are entirely distributed and do not assume constant availability of Internet connectivity. In addition, they allow on-demand collection of sensor data with the accuracy and at the frequency required by every application. These architectures have been implemented in Java and tested on smart phones. They have proved successful in supporting several prototype applications and experimental results obtained in ad hoc networks of phones have demonstrated their feasibility with reasonable performance in terms of latency, memory, and energy consumption.

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This paper presents a simple hybrid computer technique to study the transient behaviour of queueing systems. This method is superior to stand-alone analog or digital solution because the hardware requirement is excessive for analog technique whereas computation time is appreciable in the latter case. By using a hybrid computer one can share the analog hardware thus requiring fewer integrators. The digital processor can store the values, play them back at required time instants and change the coefficients of differential equations. By speeding up the integration on the analog computer it is feasible to solve a large number of these equations very fast. Hybrid simulation is even superior to the analytic technique because in the latter case it is difficult to solve time-varying differential equations.

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Wireless network access is gaining increased heterogeneity in terms of the types of IP capable access technologies. The access network heterogeneity is an outcome of incremental and evolutionary approach of building new infrastructure. The recent success of multi-radio terminals drives both building a new infrastructure and implicit deployment of heterogeneous access networks. Typically there is no economical reason to replace the existing infrastructure when building a new one. The gradual migration phase usually takes several years. IP-based mobility across different access networks may involve both horizontal and vertical handovers. Depending on the networking environment, the mobile terminal may be attached to the network through multiple access technologies. Consequently, the terminal may send and receive packets through multiple networks simultaneously. This dissertation addresses the introduction of IP Mobility paradigm into the existing mobile operator network infrastructure that have not originally been designed for multi-access and IP Mobility. We propose a model for the future wireless networking and roaming architecture that does not require revolutionary technology changes and can be deployed without unnecessary complexity. The model proposes a clear separation of operator roles: (i) access operator, (ii) service operator, and (iii) inter-connection and roaming provider. The separation allows each type of an operator to have their own development path and business models without artificial bindings with each other. We also propose minimum requirements for the new model. We present the state of the art of IP Mobility. We also present results of standardization efforts in IP-based wireless architectures. Finally, we present experimentation results of IP-level mobility in various wireless operator deployments.

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With the recent increase in interest in service-oriented architectures (SOA) and Web services, developing applications with the Web services paradigm has become feasible. Web services are self-describing, platform-independent computational elements. New applications can be assembled from a set of previously created Web services, which are composed together to make a service that uses its components to perform a certain task. This is the idea of service composition. To bring service composition to a mobile phone, I have created Interactive Service Composer for mobile phones. With Interactive Service Composer, the user is able to build service compositions on his mobile phone, consisting of Web services or services that are available from the mobile phone itself. The service compositions are reusable and can be saved in the phone's memory. Previously saved compositions can also be used in new compositions. While developing applications for mobile phones has been possible for some time, the usability of the solutions is not the same as when developing for desktop computers. When developing for mobile phones, the developer has to more carefully consider the decisions he is going to make with the program he is developing. With the lack of processing power and memory, the applications cannot function as well as on desktop PCs. On the other hand, this does not remove the appeal of developing applications for mobile devices.

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The Distributed Network Protocol v3.0 (DNP3) is one of the most widely used protocols to control national infrastructure. The move from point-to-point serial connections to Ethernet-based network architectures, allowing for large and complex critical infrastructure networks. However, networks and con- figurations change, thus auditing tools are needed to aid in critical infrastructure network discovery. In this paper we present a series of intrusive techniques used for reconnaissance on DNP3 critical infrastructure. Our algorithms will discover DNP3 outstation slaves along with their DNP3 addresses, their corresponding master, and class object configurations. To validate our presented DNP3 reconnaissance algorithms and demonstrate it’s practicality, we present an implementation of a software tool using a DNP3 plug-in for Scapy. Our implementation validates the utility of our DNP3 reconnaissance technique. Our presented techniques will be useful for penetration testing, vulnerability assessments and DNP3 network discovery.

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Real-time scheduling algorithms, such as Rate Monotonic and Earliest Deadline First, guarantee that calculations are performed within a pre-defined time. As many real-time systems operate on limited battery power, these algorithms have been enhanced with power-aware properties. In this thesis, 13 power-aware real-time scheduling algorithms for processor, device and system-level use are explored.

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Stochastic volatility models are of fundamental importance to the pricing of derivatives. One of the most commonly used models of stochastic volatility is the Heston Model in which the price and volatility of an asset evolve as a pair of coupled stochastic differential equations. The computation of asset prices and volatilities involves the simulation of many sample trajectories with conditioning. The problem is treated using the method of particle filtering. While the simulation of a shower of particles is computationally expensive, each particle behaves independently making such simulations ideal for massively parallel heterogeneous computing platforms. In this paper, we present our portable Opencl implementation of the Heston model and discuss its performance and efficiency characteristics on a range of architectures including Intel cpus, Nvidia gpus, and Intel Many-Integrated-Core (mic) accelerators.

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An Autonomous Line Scanning Unit (ALSU) for completely autonomous detection of call originations in the SPC Telephone Switching System is described. Through its own memories, ALSU maintains an up-to-date record of subscribers' statuses, detects call originations, performs 'hit timing check' and informs the Switching System of the identity of calling subscribers. The ALSU needs minimum interaction with the Central Processor, resulting in increased call handling capacity

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Emerging embedded applications are based on evolving standards (e.g., MPEG2/4, H.264/265, IEEE802.11a/b/g/n). Since most of these applications run on handheld devices, there is an increasing need for a single chip solution that can dynamically interoperate between different standards and their derivatives. In order to achieve high resource utilization and low power dissipation, we propose REDEFINE, a polymorphic ASIC in which specialized hardware units are replaced with basic hardware units that can create the same functionality by runtime re-composition. It is a ``future-proof'' custom hardware solution for multiple applications and their derivatives in a domain. In this article, we describe a compiler framework and supporting hardware comprising compute, storage, and communication resources. Applications described in high-level language (e.g., C) are compiled into application substructures. For each application substructure, a set of compute elements on the hardware are interconnected during runtime to form a pattern that closely matches the communication pattern of that particular application. The advantage is that the bounded CEs are neither processor cores nor logic elements as in FPGAs. Hence, REDEFINE offers the power and performance advantage of an ASIC and the hardware reconfigurability and programmability of that of an FPGA/instruction set processor. In addition, the hardware supports custom instruction pipelining. Existing instruction-set extensible processors determine a sequence of instructions that repeatedly occur within the application to create custom instructions at design time to speed up the execution of this sequence. We extend this scheme further, where a kernel is compiled into custom instructions that bear strong producer-consumer relationship (and not limited to frequently occurring sequences of instructions). Custom instructions, realized as hardware compositions effected at runtime, allow several instances of the same to be active in parallel. A key distinguishing factor in majority of the emerging embedded applications is stream processing. To reduce the overheads of data transfer between custom instructions, direct communication paths are employed among custom instructions. In this article, we present the overview of the hardware-aware compiler framework, which determines the NoC-aware schedule of transports of the data exchanged between the custom instructions on the interconnect. The results for the FFT kernel indicate a 25% reduction in the number of loads/stores, and throughput improves by log(n) for n-point FFT when compared to sequential implementation. Overall, REDEFINE offers flexibility and a runtime reconfigurability at the expense of 1.16x in power and 8x in area when compared to an ASIC. REDEFINE implementation consumes 0.1x the power of an FPGA implementation. In addition, the configuration overhead of the FPGA implementation is 1,000x more than that of REDEFINE.

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This paper reports the design of an input-triggered polymorphic ASIC for H.264 baseline decoder. Hardware polymorphism is achieved by selectively reusing hardware resources at system and module level. Complete design is done using ESL design tools following a methodology that maintains consistency in testing and verification throughout the design flow. The proposed design can support frame sizes from QCIF to 1080p.

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Context: Pheochromocytomas and paragangliomas (PPGLs) are heritable neoplasms that can be classified into gene-expression subtypes corresponding to their underlying specific genetic drivers. Objective: This study aimed to develop a diagnostic and research tool (Pheo-type) capable of classifying PPGL tumors into gene-expression subtypes that could be used to guide and interpret genetic testing, determine surveillance programs, and aid in elucidation of PPGL biology. Design: A compendium of published microarray data representing 205 PPGL tumors was used for the selection of subtype-specific genes that were then translated to the Nanostring gene-expression platform. A support vector machine was trained on the microarray dataset and then tested on an independent Nanostring dataset representing 38 familial and sporadic cases of PPGL of known genotype (RET, NF1, TMEM127, MAX, HRAS, VHL, and SDHx). Different classifier models involving between three and six subtypes were compared for their discrimination potential. Results: A gene set of 46 genes and six endogenous controls was selected representing six known PPGL subtypes; RTK1–3 (RET, NF1, TMEM127, and HRAS), MAX-like, VHL, and SDHx. Of 38 test cases, 34 (90%) were correctly predicted to six subtypes based on the known genotype to gene-expression subtype association. Removal of the RTK2 subtype from training, characterized by an admixture of tumor and normal adrenal cortex, improved the classification accuracy (35/38). Consolidation of RTK and pseudohypoxic PPGL subtypes to four- and then three-class architectures improved the classification accuracy for clinical application. Conclusions: The Pheo-type gene-expression assay is a reliable method for predicting PPGL genotype using routine diagnostic tumor samples.

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Due to their unique size- and shape-dependent physical and chemical properties, highly hierarchically-ordered nanostructures have attracted great attention with a view to application in emerging technologies, such as novel energy generation, harvesting, and storage devices. The question of how to get controllable ensembles of nanostructures, however, still remains a challenge. This concept paper first summarizes and clarifies the concept of the two-step self-assembly approach for the synthesis of hierarchically-ordered nanostructures with complex morphology. Based on the preparation processes, two-step self-assembly can be classified into two typical types, namely, two-step self-assembly with two discontinuous processes and two-step self-assembly completed in one-pot solutions with two continuous processes. Compared to the conventional one-step self-assembly, the two-step self-assembly approach allows the combination of multiple synthetic techniques and the realization of complex nanostructures with hierarchically-ordered multiscale structures. Moreover, this approach also allows the self-assembly of heterostructures or hybrid nanomaterials in a cost-effective way. It is expected that widespread application of two-step self-assembly will give us a new way to fabricate multifunctional nanostructures with deliberately designed architectures. The concept of two-step self-assembly can also be extended to syntheses including more than two chemical/physical reaction steps (multiple-step self-assembly).

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Three-dimensional (3D) hierarchical nanoscale architectures comprised of building blocks, with specifically engineered morphologies, are expected to play important roles in the fabrication of 'next generation' microelectronic and optoelectronic devices due to their high surface-to-volume ratio as well as opto-electronic properties. Herein, a series of well-defined 3D hierarchical rutile TiO2 architectures (HRT) were successfully prepared using a facile hydrothermal method without any surfactant or template, simply by changing the concentration of hydrochloric acid used in the synthesis. The production of these materials provides, to the best of our knowledge, the first identified example of a ledgewise growth mechanism in a rutile TiO2 structure. Also for the first time, a Dye-sensitized Solar Cell (DSC) combining a HRT is reported in conjunction with a high-extinction-coefficient metal-free organic sensitizer (D149), achieving a conversion efficiency of 5.5%, which is superior to ones employing P25 (4.5%), comparable to state-of-the-art commercial transparent titania anatase paste (5.8%). Further to this, an overall conversion efficiency 8.6% was achieved when HRT was used as the light scattering layer, a considerable improvement over the commercial transparent/reflector titania anatase paste (7.6%), a significantly smaller gap in performance than has been seen previously.

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Superhydrophobic and superhydrophilic surfaces have been extensively investigated due to their importance for industrial applications. It has been reported, however, that superhydrophobic surfaces are very sensitive to heat, ultraviolet (UV) light, and electric potential, which interfere with their long-term durability. In this study, we introduce a novel approach to achieve robust superhydrophobic thin films by designing architecture-defined complex nanostructures. A family of ZnO hollow microspheres with controlled constituent architectures in the morphologies of 1D nanowire networks, 2D nanosheet stacks, and 3D mesoporous nanoball blocks, respectively, was synthesized via a two-step self-assembly approach, where the oligomers or the constituent nanostructures with specially designed structures are first formed from surfactant templates, and then further assembled into complex morphologies by the addition of a second co-surfactant. The thin films composed of two-step synthesized ZnO hollow microspheres with different architectures presented superhydrophobicities with contact angles of 150°-155°, superior to the contact angle of 103° for one-step synthesized ZnO hollow microspheres with smooth and solid surfaces. Moreover, the robust superhydrophobicity was further improved by perfluorinated silane surface modification. The perfluorinated silane treated ZnO hollow microsphere thin films maintained excellent hydrophobicity even after 75 h of UV irradiation. The realization of environmentally durable superhydrophobic surfaces provides a promising solution for their long-term service under UV or strong solar light irradiations.

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It is a challenge to increase the visible-light photoresponses of wide-gap metal oxides. In this study, we proposed a new strategy to enhance the visible-light photoresponses of wide-gap semiconductors by deliberately designing a multi-scale nanostructure with controlled architecture. Hollow ZnO microspheres with constituent units in the shape of one-dimensional (1D) nanowire networks, 2D nanosheet stacks, and 3D mesoporous nanoball blocks are synthesized via an approach of two-step assembly, where the oligomers or the constituent nanostructures with specially designed structures are first formed, and then further assembled into complex morphologies. Through deliberate designing of constituent architectures allowing multiple visible-light scattering, reflections, and dispersion inside the multiscale nanostructures, enhanced wide range visible-light photoresponses of the ZnO hollow microspheres were successfully achieved. Compared to the one-step synthesized ZnO hollow microspheres, where no nanostructured constituents were produced, the ZnO hollow microspheres with 2D nanosheet stacks presented a 50 times higher photocurrent in the visible-light range (λ > 420 nm). The nanostructure induced visible-light photoresponse enhancement gives a direction to the development of novel photosensitive materials.