875 resultados para Running speed


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‘Temporally urgent’ reactions are extremely rapid, spatially precise movements that are evoked following discrete stimuli. The involvement of primary motor cortex (M1) and its relationship to stimulus intensity in such reactions is not well understood. Continuous theta burst stimulation (cTBS) suppresses focal regions of the cortex and can assess the involvement of motor cortex in speed of processing. The primary objective of this study was to explore the involvement of M1 in speed of processing with respect to stimulus intensity. Thirteen healthy young adults participated in this experiment. Behavioral testing consisted of a simple button press using the index finger following median nerve stimulation of the opposite limb, at either high or low stimulus intensity. Reaction time was measured by the onset of electromyographic activity from the first dorsal interosseous (FDI) muscle of each limb. Participants completed a 30 min bout of behavioral testing prior to, and 15 min following, the delivery of cTBS to the motor cortical representation of the right FDI. The effect of cTBS on motor cortex was measured by recording the average of 30 motor evoked potentials (MEPs) just prior to, and 5 min following, cTBS. Paired t-tests revealed that, of thirteen participants, five demonstrated a significant attenuation, three demonstrated a significant facilitation and five demonstrated no significant change in MEP amplitude following cTBS. Of the group that demonstrated attenuated MEPs, there was a biologically significant interaction between stimulus intensity and effect of cTBS on reaction time and amplitude of muscle activation. This study demonstrates the variability of potential outcomes associated with the use of cTBS and further study on the mechanisms that underscore the methodology is required. Importantly, changes in motor cortical excitability may be an important determinant of speed of processing following high intensity stimulation.

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We use images of high spatial and temporal resolution, obtained using both ground- and space-based instrumentation, to investigate the role magnetic field inclination angles play in the propagation characteristics of running penumbral waves in the solar chromosphere. Analysis of a near-circular sunspot, close to the center of the solar disk, reveals a smooth rise in oscillatory period as a function of distance from the umbral barycenter. However, in one directional quadrant, corresponding to the north direction, a pronounced kink in the period-distance diagram is found. Utilizing a combination of the inversion of magnetic Stokes vectors and force-free field extrapolations, we attribute this behavior to the cut-off frequency imposed by the magnetic field geometry in this location. A rapid, localized inclination of the magnetic field lines in the north direction results in a faster increase in the dominant periodicity due to an accelerated reduction in the cut-off frequency. For the first time, we reveal how the spatial distribution of dominant wave periods, obtained with one of the highest resolution solar instruments currently available, directly reflects the magnetic geometry of the underlying sunspot, thus opening up a wealth of possibilities in future magnetohydrodynamic seismology studies. In addition, the intrinsic relationships we find between the underlying magnetic field geometries connecting the photosphere to the chromosphere, and the characteristics of running penumbral waves observed in the upper chromosphere, directly supports the interpretation that running penumbral wave phenomena are the chromospheric signature of upwardly propagating magneto-acoustic waves generated in the photosphere.

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First principles calculations with molecular dynamics are
utilized to simulate a simplified electrical double layer formed in the
active electric potential region during the electrocatalytic oxidation of
ethanol on Pd electrodes running in an alkaline electrolyte. Our
simulations provide an atomic level insight into how ethanol oxidation
occurs in fuel cells: New mechanisms in the presence of the simplified
electrical double layer are found to be different from the traditional
ones; through concerted-like dehydrogenation paths, both acetaldehyde
and acetate are produced in such a way as to avoid a variety of
intermediates, which is consistent with the experimental data obtained
from in situ FTIR spectroscopy. Our work shows that adsorbed OH on
the Pd electrode rather than Pd atoms is the active center for the
reactions; the dissociation of the C−H bond is facilitated by the
adsorption of an OH− anion on the surface, resulting in the formation
of water. Our calculations demonstrate that water dissociation rather than H desorption is the main channel through which
electrical current is generated on the Pd electrode. The effects of the inner Helmholtz layer and the outer Helmholtz layer are
decoupled, with only the inner Helmholtz layer being found to have a significant impact on the mechanistics of the reaction. Our
results provide atomic level insight into the significance of the simplified electrical double layer in electrocatalysis, which may be
of general importance.

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In this paper, we explore various arithmetic units for possible use in high-speed, high-yield ALUs operated at scaled supply voltage with adaptive clock stretching. We demonstrate that careful logic optimization of the existing arithmetic units (to create hybrid units) indeed make them further amenable to supply voltage scaling. Such hybrid units result from mixing right amount of fast arithmetic into the slower ones. Simulations on different hybrid adder and multipliers in BPTM 70 nm technology show 18%-50% improvements in power compared to standard adders with only 2%-8% increase in die-area at iso-yield. These optimized datapath units can be used to construct voltage scalable robust ALUs that can operate at high clock frequency with minimal performance degradation due to occasional clock stretching. © 2009 IEEE.

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A fully homomorphic encryption (FHE) scheme is envisioned as a key cryptographic tool in building a secure and reliable cloud computing environment, as it allows arbitrary evaluation of a ciphertext without revealing the plaintext. However, existing FHE implementations remain impractical due to very high time and resource costs. To the authors’ knowledge, this paper presents the first hardware implementation of a full encryption primitive for FHE over the integers using FPGA technology. A large-integer multiplier architecture utilising Integer-FFT multiplication is proposed, and a large-integer Barrett modular reduction module is designed incorporating the proposed multiplier. The encryption primitive used in the integer-based FHE scheme is designed employing the proposed multiplier and modular reduction modules. The designs are verified using the Xilinx Virtex-7 FPGA platform. Experimental results show that a speed improvement factor of up to 44 is achievable for the hardware implementation of the FHE encryption scheme when compared to its corresponding software implementation. Moreover, performance analysis shows further speed improvements of the integer-based FHE encryption primitives may still be possible, for example through further optimisations or by targeting an ASIC platform.

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Conversion of xylose to l-lactate was carried out by Lactococcus lactis IO-1 using an electrodialysis bioprocess (ED-BP). At 50 g l -1 xylose, the ED-BP was already complete in half the time (32 h) taken by the control culture without electrodialysis (>60 h). At 80 g l -1 xylose, the control culture was unable to consume >50 g l -1 xylose, whereas the ED-BP consumed 75 g l -1 xylose in 45 h. Thus, the simultaneous removal of lactate and acetate by ED-BP was associated with high-speed l-lactate production, increased xylose consumption and an increased l-lactate production. Copyright (C) 1998 Elsevier Science B.V.

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Fully Homomorphic Encryption (FHE) is a recently developed cryptographic technique which allows computations on encrypted data. There are many interesting applications for this encryption method, especially within cloud computing. However, the computational complexity is such that it is not yet practical for real-time applications. This work proposes optimised hardware architectures of the encryption step of an integer-based FHE scheme with the aim of improving its practicality. A low-area design and a high-speed parallel design are proposed and implemented on a Xilinx Virtex-7 FPGA, targeting the available DSP slices, which offer high-speed multiplication and accumulation. Both use the Comba multiplication scheduling method to manage the large multiplications required with uneven sized multiplicands and to minimise the number of read and write operations to RAM. Results show that speed up factors of 3.6 and 10.4 can be achieved for the encryption step with medium-sized security parameters for the low-area and parallel designs respectively, compared to the benchmark software implementation on an Intel Core2 Duo E8400 platform running at 3 GHz.

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Very high speed and low area hardware architectures of the SHACAL-1 encryption algorithm are presented in this paper. The SHACAL algorithm was a submission to the New European Schemes for Signatures, Integrity and Encryption (NESSIE) project and it is based on the SHA-1 hash algorithm. To date, there have been no performance metrics published on hardware implementations of this algorithm. A fully pipelined SHACAL-1 encryption architecture is described in this paper and when implemented on a Virtex-II X2V4000 FPGA device, it runs at a throughput of 17 Gbps. A fully pipelined decryption architecture achieves a speed of 13 Gbps when implemented on the same device. In addition, iterative architectures of the algorithm are presented. The SHACAL-1 decryption algorithm is derived and also presented in this paper, since it was not provided in the submission to NESSIE. © Springer-Verlag Berlin Heidelberg 2003.

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Turbogenerating is a form of turbocompounding whereby a Turbogenerator is placed in the exhaust stream of an internal combustion engine. The Turbogenerator converts a portion of the expelled energy in the exhaust gas into electricity which can then be used to supplement the crankshaft power. Previous investigations have shown how the addition of a Turbogenerator can increase the system efficiency by up to 9%. However, these investigations pertain to the engine system operating at one fixed engine speed. The purpose of this paper is to investigate how the system and in particular the Turbogenerator operate during engine speed transients. On turbocharged engines, turbocharger lag is an issue. With the addition of a Turbogenerator, these issues can be somewhat alleviated. This is done by altering the speed at which the Turbogenerator operates during the engine’s speed transient. During the transients, the Turbogenerator can be thought to act in a similar manner to a variable geometry turbine where its speed can cause a change in the turbocharger turbine’s pressure ratio. This paper shows that by adding a Turbogenerator to a turbocharged engine the transient performance can be enhanced. This enhancement is shown by comparing the turbogenerated engine to a similar turbocharged engine. When comparing the two engines, it can be seen that the addition of a Turbogenerator can reduce the time taken to reach full power by up to 7% whilst at the same time, improve overall efficiency by 7.1% during the engine speed transient.

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Flow processing is a fundamental element of stateful traffic classification and it has been recognized as an essential factor for delivering today’s application-aware network operations and security services. The basic function within a flow processing engine is to search and maintain a flow table, create new flow entries if no entry matches and associate each entry with flow states and actions for future queries. Network state information on a per-flow basis must be managed in an efficient way to enable Ethernet frame transmissions at 40 Gbit/s (Gbps) and 100 Gbps in the near future. This paper presents a hardware solution of flow state management for implementing large-scale flow tables on popular computer memories using DDR3 SDRAMs. Working with a dedicated flow lookup table at over 90 million lookups per second, the proposed system is able to manage 512-bit state information at run time.

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The dynamics of predator-prey pursuit appears complex, making the development of a framework explaining predator and prey strategies problematic. We develop a model for terrestrial, cursorial predators to examine how animal mass modulates predator and prey trajectories and affects best strategies for both parties. We incorporated the maximum speed-mass relationship with an explanation of why larger animals should have greater turn radii; the forces needed to turn scale linearly with mass whereas the maximum forces an animal can exert scale to a 2/3 power law. This clarifies why in a meta-analysis, we found a preponderance of predator/prey mass ratios that minimized the turn radii of predators compared to their prey. It also explained why acceleration data from wild cheetahs pursuing different prey showed different cornering behaviour with prey type. The outcome of predator prey pursuits thus depends critically on mass effects and the ability of animals to time turns precisely.