FPGA-based object detection using classification circuits

Dans l'apprentissage machine, la classification est le processus d’assigner une nouvelle observation à une certaine catégorie. Les classifieurs qui mettent en œuvre des algorithmes de classification ont été largement étudié au cours des dernières décennies. Les classifieurs traditionnels sont basés sur des algorithmes tels que le SVM et les réseaux de neurones, et sont généralement exécutés par des logiciels sur CPUs qui fait que le système souffre d’un manque de performance et d’une forte consommation d'énergie. Bien que les GPUs puissent être utilisés pour accélérer le calcul de certains classifieurs, leur grande consommation de puissance empêche la technologie d'être mise en œuvre sur des appareils portables tels que les systèmes embarqués. Pour rendre le système de classification plus léger, les classifieurs devraient être capable de fonctionner sur un système matériel plus compact au lieu d'un groupe de CPUs ou GPUs, et les classifieurs eux-mêmes devraient être optimisés pour ce matériel. Dans ce mémoire, nous explorons la mise en œuvre d'un classifieur novateur sur une plate-forme matérielle à base de FPGA. Le classifieur, conçu par Alain Tapp (Université de Montréal), est basé sur une grande quantité de tables de recherche qui forment des circuits arborescents qui effectuent les tâches de classification. Le FPGA semble être un élément fait sur mesure pour mettre en œuvre ce classifieur avec ses riches ressources de tables de recherche et l'architecture à parallélisme élevé. Notre travail montre que les FPGAs peuvent implémenter plusieurs classifieurs et faire les classification sur des images haute définition à une vitesse très élevée.

Design, Fabrication and Characterization of Passive and Active Polymer Photonic Devices

The rapid developments in fields such as fibre optic communication engineering and integrated optical electronics have expanded the interest and have increased the expectations about guided wave optics, in which optical waveguides and optical fibres play a central role. The technology of guided wave photonics now plays a role in generating information (guided-wave sensors) and processing information (spectral analysis, analog-to-digital conversion and other optical communication schemes) in addition to its original application of transmitting information (fibre optic communication). Passive and active polymer devices have generated much research interest recently because of the versatility of the fabrication techniques and the potential applications in two important areas – short distant communication network and special functionality optical devices such as amplifiers, switches and sensors. Polymer optical waveguides and fibres are often designed to have large cores with 10-1000 micrometer diameter to facilitate easy connection and splicing. Large diameter polymer optical fibres being less fragile and vastly easier to work with than glass fibres, are attractive in sensing applications. Sensors using commercial plastic optical fibres are based on ideas already used in silica glass sensors, but exploiting the flexible and cost effective nature of the plastic optical fibre for harsh environments and throw-away sensors. In the field of Photonics, considerable attention is centering on the use of polymer waveguides and fibres, as they have a great potential to create all-optical devices. By attaching organic dyes to the polymer system we can incorporate a variety of optical functions. Organic dye doped polymer waveguides and fibres are potential candidates for solid state gain media. High power and high gain optical amplification in organic dye-doped polymer waveguide amplifier is possible due to extremely large emission cross sections of dyes. Also, an extensive choice of organic dye dopants is possible resulting in amplification covering a wide range in the visible region.

Analysis and Testing of a Novel Oadm Based on FBG and Machzehnder Interferometer

A novel optical add-drop multiplexer (OADM) based on the Mach-Zelauler interferometer (MZI) and the fiber Bragg grating (FBG) is proposed for the first tittle to the authors ' knowledge. In the structure, the Mach-Zehnder interferometer acts as an optical switch. The principle of the OADM is analyzed in this paper. The OADM can add/drop one of the multi-input channels or pass the channel directly by adjusting the difference of the two arms of the interferometer. The channel isolation is more than 20 dB

Investigations on broadband planar monopole and slot radiators and their suitability for UWB applications

In recent years, there is a visible trend for products/services which demand seamless integration of cellular networks, WLANs and WPANs. This is a strong indication for the inclusion of high speed short range wireless technology in future applications. In this context UWB radio has a significant role to play as an extension/complement to existing cellular/access technology. In the present work, we have investigated two major types of wide band planar antennas: Monopole and Slot. Four novel compact broadband antennas, suitable for poratble applications, are designed and characterized, namely 1. Elliptical monopole 2. Inverted cone monopole 3. Koch fractal slot 4. Wide band slot The performance of these designs have been studied using standard simulation tools used in industry/academia and they have been experimentally verified. Antenna design guidelines are also deduced by accounting the resonances in each structure. In addition to having compact sized, high efficiency and broad bandwidth antennas, one of the major criterion in the design of impulse-UWB systems have been the transmission of narrow band pulses with minimum distortion. The key challenge is not only to design a broad band antenna with constant and stable gain but to maintain a flat group delay or linear phase response in the frequency domain or excellent transient response in time domain. One of the major contributions of the thesis lies in the analysis of the frequency and time-domain response of the designed UWB antennas to confirm their suitability for portable pulsed-UWB systems. Techniques to avoid narrowband interference by engraving narrow slot resonators on the antenna is also proposed and their effect on a nano-second pulse have been investigated.

Ultra-wideband slot antenna for wireless USB dongle applications

An ultra-wideband (UWB) printed slot antenna, suitable for integration with the printed circuit board (PCB) of a wireless universal serial-bus (WUSB) dongle is presented. The design comprises a near-rectangular slot fed by a coplanar waveguide printed on a PCB of width 20 mm. The proposed design has a large bandwidth covering the 3.1-10.6 GHz UWB band, unaffected by the ground length, and omnidirectional radiation patterns. A linear phase response throughout the band further confirms its suitability for high-speed wireless connectivity.

An Approach Towards The Development Of An Efficient Symmetric Key Encryption Scheme

n the recent years protection of information in digital form is becoming more important. Image and video encryption has applications in various fields including Internet communications, multimedia systems, medical imaging, Tele-medicine and military communications. During storage as well as in transmission, the multimedia information is being exposed to unauthorized entities unless otherwise adequate security measures are built around the information system. There are many kinds of security threats during the transmission of vital classified information through insecure communication channels. Various encryption schemes are available today to deal with information security issues. Data encryption is widely used to protect sensitive data against the security threat in the form of “attack on confidentiality”. Secure transmission of information through insecure communication channels also requires encryption at the sending side and decryption at the receiving side. Encryption of large text message and image takes time before they can be transmitted, causing considerable delay in successive transmission of information in real-time. In order to minimize the latency, efficient encryption algorithms are needed. An encryption procedure with adequate security and high throughput is sought in multimedia encryption applications. Traditional symmetric key block ciphers like Data Encryption Standard (DES), Advanced Encryption Standard (AES) and Escrowed Encryption Standard (EES) are not efficient when the data size is large. With the availability of fast computing tools and communication networks at relatively lower costs today, these encryption standards appear to be not as fast as one would like. High throughput encryption and decryption are becoming increasingly important in the area of high-speed networking. Fast encryption algorithms are needed in these days for high-speed secure communication of multimedia data. It has been shown that public key algorithms are not a substitute for symmetric-key algorithms. Public key algorithms are slow, whereas symmetric key algorithms generally run much faster. Also, public key systems are vulnerable to chosen plaintext attack. In this research work, a fast symmetric key encryption scheme, entitled “Matrix Array Symmetric Key (MASK) encryption” based on matrix and array manipulations has been conceived and developed. Fast conversion has been achieved with the use of matrix table look-up substitution, array based transposition and circular shift operations that are performed in the algorithm. MASK encryption is a new concept in symmetric key cryptography. It employs matrix and array manipulation technique using secret information and data values. It is a block cipher operated on plain text message (or image) blocks of 128 bits using a secret key of size 128 bits producing cipher text message (or cipher image) blocks of the same size. This cipher has two advantages over traditional ciphers. First, the encryption and decryption procedures are much simpler, and consequently, much faster. Second, the key avalanche effect produced in the ciphertext output is better than that of AES.

Studies on Latex Compounding

The main objective of the present study was to explore ways of making latex products more cost effective and versatile. Polyethylene glycol was identified as a surface active agent in latex compounds which improves the filler-polymer interaction and also distributes the filler more uniformly. The use of such surface active agents can develop filled latex products with improved mechanical properties at a lower cost. In this study dispersions of carbon black and silica were successfully added to NR latex under high speed stirring without destabilizing latex.

Investigations On The Development Of An Ann Model & Visual Manipulation Approach For 2-D Dft Computation In Image Processing

This thesis is an outcome of the investigations carried out on the development of an Artificial Neural Network (ANN) model to implement 2-D DFT at high speed. A new definition of 2-D DFT relation is presented. This new definition enables DFT computation organized in stages involving only real addition except at the final stage of computation. The number of stages is always fixed at 4. Two different strategies are proposed. 1) A visual representation of 2-D DFT coefficients. 2) A neural network approach. The visual representation scheme can be used to compute, analyze and manipulate 2D signals such as images in the frequency domain in terms of symbols derived from 2x2 DFT. This, in turn, can be represented in terms of real data. This approach can help analyze signals in the frequency domain even without computing the DFT coefficients. A hierarchical neural network model is developed to implement 2-D DFT. Presently, this model is capable of implementing 2-D DFT for a particular order N such that ((N))4 = 2. The model can be developed into one that can implement the 2-D DFT for any order N upto a set maximum limited by the hardware constraints. The reported method shows a potential in implementing the 2-D DF T in hardware as a VLSI / ASIC

Design and development of compact printed ultra wide band antennas

In recent years, there is a visible trend for products/services which demand seamless integration of cellular networks, WLANs and WPANs. This is a strong indication for the inclusion of high speed short range wireless technology in future applications. In this context UWB radio has a significant role to play as an extension/complement to existing cellular/access technology. In the present work, three major types of ultra wide band planar antennas are investigated: Monopole and Slot. Three novel compact UWB antennas, suitable for poratble applications, are designed and characterized, namely 1) Ground modified monopole 2) Serrated monopole 3) Triangular slot The performance of these designs have been studied using standard simulation tools used in industry/academia and they have been experimentally verified. Antenna design guidelines are also deduced by accounting the resonances in each structure. In addition to having compact sized, high efficiency and broad bandwidth antennas, one of the major criterion in the design of impulse-UWB systems have been the transmission of narrow band pulses with minimum distortion. The key challenge is not only to design a broad band antenna with constant and stable gain but to maintain a flat group delay or linear phase response in the frequency domain or excellent transient response in time domain. One of the major contributions of the thesis lies in the analysis of the frequency and timedomain response of the designed UWB antennas to confirm their suitability for portable pulsed-UWB systems. Techniques to avoid narrowband interference by engraving narrow slot resonators on the antenna is also proposed and their effect on a nano-second pulse have been investigated

Environmental Influences on the Frequency and Intensity of North Indian Ocean Tropical Cyclones

Tropical cyclones genesis, movement and intensification are highly dependent on its environment both oceanic and atmospheric. This thesis has made a detailed study on the environmental factors related to tropical cyclones of North Indian Ocean basin. This ocean basin has produced only 6% of the global tropical cyclones annually but it has caused maximum loss of human life associated with the strong winds, heavy rain and particularly storm surges that accompany severe cyclones as they strike the heavily populated coastal areas. Atmospheric factors studied in the thesis are the moisture content of the atmosphere, instability of the atmosphere that produces thunderstorms which are the main source of energy for the tropical cyclone, vertical wind shear to which cyclones are highly sensitive and the Sub-Tropical westerly Jetsteram and its Asian high speed center. The oceanic parameters studied are sea surface temperature and heat storage in the top layer of the ocean. A major portion of the thesis has dealt with the three temporal variabilities of tropical cyclone frequency namely intra-seasonal (mainly the influence of Madden Julian Oscillation), inter- annual (the relation with El Nino Southern Oscillation) and decadal variabilities. Regarding decadal variability, a prominent four decade oscillation in the frequency of both tropical cyclones and monsoon depressions unique to the Indian Ocean basin has been brought out. The thesis consists of 9 chapters.

Polyphase Implementation of Non-recursive Comb Decimators for Sigma-Delta A/D Converters

In a sigma-delta analog to digital (A/D) As most of the sigma-delta ADC applications require converter, the most computationally intensive block is decimation filters with linear phase characteristics, the decimation filter and its hardware implementation symmetric Finite Impulse Response (FIR) filters are may require millions of transistors. Since these widely used for implementation. But the number of FIR converters are now targeted for a portable application, filter coefficients will be quite large for implementing a a hardware efficient design is an implicit requirement. narrow band decimation filter. Implementing decimation In this effect, this paper presents a computationally filter in several stages reduces the total number of filter efficient polyphase implementation of non-recursive coefficients, and hence reduces the hardware complexity cascaded integrator comb (CIC) decimators for and power consumption [2]. Sigma-Delta Converters (SDCs). The SDCs are The first stage of decimation filter can be operating at high oversampling frequencies and hence implemented very efficiently using a cascade of integrators require large sampling rate conversions. The filtering and comb filters which do not require multiplication or and rate reduction are performed in several stages to coefficient storage. The remaining filtering is performed reduce hardware complexity and power dissipation. either in single stage or in two stages with more complex The CIC filters are widely adopted as the first stage of FIR or infinite impulse response (IIR) filters according to decimation due to its multiplier free structure. In this the requirements. The amount of passband aliasing or research, the performance of polyphase structure is imaging error can be brought within prescribed bounds by compared with the CICs using recursive and increasing the number of stages in the CIC filter. The non-recursive algorithms in terms of power, speed and width of the passband and the frequency characteristics area. This polyphase implementation offers high speed outside the passband are severely limited. So, CIC filters operation and low power consumption. The polyphase are used to make the transition between high and low implementation of 4th order CIC filter with a sampling rates. Conventional filters operating at low decimation factor of '64' and input word length of sampling rate are used to attain the required transition '4-bits' offers about 70% and 37% of power saving bandwidth and stopband attenuation. compared to the corresponding recursive and Several papers are available in literature that deals non-recursive implementations respectively. The same with different implementations of decimation filter polyphase CIC filter can operate about 7 times faster architecture for sigma-delta ADCs. Hogenauer has than the recursive and about 3.7 times faster than the described the design procedures for decimation and non-recursive CIC filters.

Performance analysis of FIR digital filter design: RNS versus traditional

Residue Number System (RNS) based Finite Impulse Response (FIR) digital filters and traditional FIR filters. This research is motivated by the importance of an efficient filter implementation for digital signal processing. The comparison is done in terms of speed and area requirement for various filter specifications. RNS based FIR filters operate more than three times faster and consumes only about 60% of the area than traditional filter when number of filter taps is more than 32. The area for RNS filter is increasing at a lesser rate than that for traditional resulting in lower power consumption. RNS is a nonweighted number system without carry propogation between different residue digits.This enables simultaneous parallel processing on all the digits resulting in high speed addition and multiplication in the RNS domain

RNS based programmable multi-mode decimation filter for WCDMA and WiMAX

The recent trends envisage multi-standard architectures as a promising solution for the future wireless transceivers to attain higher system capacities and data rates. The computationally intensive decimation filter plays an important role in channel selection for multi-mode systems. An efficient reconfigurable implementation is a key to achieve low power consumption. To this end, this paper presents a dual-mode Residue Number System (RNS) based decimation filter which can be programmed for WCDMA and 802.16e standards. Decimation is done using multistage, multirate finite impulse response (FIR) filters. These FIR filters implemented in RNS domain offers high speed because of its carry free operation on smaller residues in parallel channels. Also, the FIR filters exhibit programmability to a selected standard by reconfiguring the hardware architecture. The total area is increased only by 24% to include WiMAX compared to a single mode WCDMA transceiver. In each mode, the unused parts of the overall architecture is powered down and bypassed to attain power saving. The performance of the proposed decimation filter in terms of critical path delay and area are tabulated.

Dual-mode RNS based programmable decimation filter for WCDMA and WLANa

The recent trends envisage multi-standard architectures as a promising solution for the future wireless transceivers. The computationally intensive decimation filter plays an important role in channel selection for multi-mode systems. An efficient reconfigurable implementation is a key to achieve low power consumption. To this end, this paper presents a dual-mode Residue Number System (RNS) based decimation filter which can be programmed for WCDMA and 802.11a standards. Decimation is done using multistage, multirate finite impulse response (FIR) filters. These FIR filters implemented in RNS domain offers high speed because of its carry free operation on smaller residues in parallel channels. Also, the FIR filters exhibit programmability to a selected standard by reconfiguring the hardware architecture. The total area is increased only by 33% to include WLANa compared to a single mode WCDMA transceiver. In each mode, the unused parts of the overall architecture is powered down and bypassed to attain power saving. The performance of the proposed decimation filter in terms of critical path delay and area are tabulated

Quick Addition of Decimals Using Reversible Conservative Logic

In recent years, reversible logic has emerged as one of the most important approaches for power optimization with its application in low power CMOS, nanotechnology and quantum computing. This research proposes quick addition of decimals (QAD) suitable for multi-digit BCD addition, using reversible conservative logic. The design makes use of reversible fault tolerant Fredkin gates only. The implementation strategy is to reduce the number of levels of delay there by increasing the speed, which is the most important factor for high speed circuits.