Gene-chip technology and its applications

Gene Chips are finding extensive use in animal and plant science. Generally microarrays are of two kind, cDNA or oligonucleotide. cDNA microarrays were developed at Stanford University, whereas oligonucleotide were developed by Affymetrix. The construction of cDNA or oligonucleotide on a glass slide helps to compare the gene expression level of treated and control samples by labeling mRNA with green (Cy3) and red (Cy5) dyes. The hybridized gene chip emit fluorescence whose intensity and colour can be measured. RNA labeling can be done directly or indirectly. Indirect method involves amino allyle modified dUTP instead of pre-labelled nucleotide. Hybridization of gene chip generally occurs in a minimum volume possible and to ensure the hetroduplex formation, a ten fold more DNA is spotted on slide than in the solutions. A confocal or semi confocal laser technologies coupled with CCD camera are used for image acquisition. For standardization, house keeping genes are used or cDNA are spotted in gene chip that are not present in treated or control samples. Moreover, statistical analysis (image analysis) and cluster analysis softwares have been developed by Stanford University. The gene-chip technology has many applications like expression analysis, gene expression signatures (molecular phenotypes) and promoter regulatory element co-expression.

Optimizing layer-by-layer deposition of interpolymer complexes on solid substrates using Biacore

The layer-by-layer deposition of polymers onto surfaces allows the fabrication of multilayered materials for a wide range of applications, from drug delivery to biosensors. This work describes the analysis of complex formation between poly(acrylic acid) and methylcellulose in aqueous solutions using Biacore, a surface plasmon resonance analytical technique, traditionally used to examine biological interactions. This technique characterized the layer-by-layer deposition of these polymers on the surface of a Biacore sensor chip. The results were subsequently used to optimize the experimental conditions for sequential layer deposition on glass slides. The role of the solution pH and poly(acrylic acid) molecular weight on the formation of interpolymer multilayered coatings was researched, and showed that the optimal deposition of the polymer complexes was achieved at pHs ≤2.5 with a poly(acrylic acid) molecular weight of 450 kDa.

Fine-grained multi-phase array designs

Hybrid multiprocessor architectures which combine re-configurable computing and multiprocessors on a chip are being proposed to transcend the performance of standard multi-core parallel systems. Both fine-grained and coarse-grained parallel algorithm implementations are feasible in such hybrid frameworks. A compositional strategy for designing fine-grained multi-phase regular processor arrays to target hybrid architectures is presented in this paper. The method is based on deriving component designs using classical regular array techniques and composing the components into a unified global design. Effective designs with phase-changes and data routing at run-time are characteristics of these designs. In order to describe the data transfer between phases, the concept of communication domain is introduced so that the producer–consumer relationship arising from multi-phase computation can be treated in a unified way as a data routing phase. This technique is applied to derive new designs of multi-phase regular arrays with different dataflow between phases of computation.

Genes driving potato tuber initiation and growth: identification based on transcriptional changes using the POCI array

The increasing amount of available expressed gene sequence data makes whole-transcriptome analysis of certain crop species possible. Potato currently has the second largest number of publicly available expressed sequence tag (EST) sequences among the Solanaceae. Most of these ESTs, plus other proprietary sequences, were combined and used to generate a unigene assembly. The set of 246,182 sequences produced 46,345 unigenes, which were used to design a 44K 60-mer oligo array (Potato Oligo Chip Initiative: POCI). In this study, we attempt to identify genes controlling and driving the process of tuber initiation and growth by implementing large-scale transcriptional changes using the newly developed POCI array. Major gene expression profiles could be identified exhibiting differential expression at key developmental stages. These profiles were associated with functional roles in cell division and growth. A subset of genes involved in the regulation of the cell cycle, based on their Gene Ontology classification, exhibit a clear transient upregulation at tuber onset indicating increased cell division during these stages. The POCI array allows the study of potato gene expression on a much broader level than previously possible and will greatly enhance analysis of transcriptional control mechanisms in a wide range of potato research areas. POCI sequence and annotation data are publicly available through the POCI database (http://pgrc.ipk-gatersleben.de/poci).

Patterning and detailed study of human hNT astrocytes on parylene-C/silicon dioxide substrates to the single cell level

It is estimated that the adult human brain contains 100 billion neurons with 5–10 times as many astrocytes. Although it has been generally considered that the astrocyte is a simple supportive cell to the neuron, recent research has revealed new functionality of the astrocyte in the form of information transfer to neurons of the brain. In our previous work we developed a protocol to pattern the hNT neuron (derived from the human teratocarcinoma cell line (hNT)) on parylene-C/SiO2 substrates. In this work, we report how we have managed to pattern hNT astrocytes, on parylene-C/SiO2 substrates to single cell resolution. This article disseminates the nanofabrication and cell culturing steps necessary for the patterning of such cells. In addition, it reports the necessary strip lengths and strip width dimensions of parylene-C that encourage high degrees of cellular coverage and single cell isolation for this cell type. The significance in patterning the hNT astrocyte on silicon chip is that it will help enable single cell and network studies into the undiscovered functionality of this interesting cell, thus, contributing to closer pathological studies of the human brain.

First human hNT neurons patterned on parylene-C/silicon dioxide substrates: Combining an accessible cell line and robust patterning technology for the study of the pathological adult human brain

In this communication, we describe a new method which has enabled the first patterning of human neurons (derived from the human teratocarcinoma cell line (hNT)) on parylene-C/silicon dioxide substrates. We reveal the details of the nanofabrication processes, cell differentiation and culturing protocols necessary to successfully pattern hNT neurons which are each key aspects of this new method. The benefits in patterning human neurons on silicon chip using an accessible cell line and robust patterning technology are of widespread value. Thus, using a combined technology such as this will facilitate the detailed study of the pathological human brain at both the single cell and network level.

Guided growth of neurons and glia using microfabricated patterns of parylene-C on a SiO2 background

This paper describes a simple technique for the patterning of glia and neurons. The integration of neuronal patterning to Multi-Electrode Arrays (MEAs), planar patch clamp and silicon based ‘lab on a chip’ technologies necessitates the development of a microfabrication-compatible method, which will be reliable and easy to implement. In this study a highly consistent, straightforward and cost effective cell patterning scheme has been developed. It is based on two common ingredients: the polymer parylene-C and horse serum. Parylene-C is deposited and photo-lithographically patterned on silicon oxide (SiO2) surfaces. Subsequently, the patterns are activated via immersion in horse serum. Compared to non-activated controls, cells on the treated samples exhibited a significantly higher conformity to underlying parylene stripes. The immersion time of the patterns was reduced from 24 to 3 h without compromising the technique. X-ray photoelectron spectroscopy (XPS) analysis of parylene and SiO2 surfaces before and after immersion in horse serum and gel based eluant analysis suggests that the quantity and conformation of proteins on the parylene and SiO2 substrates might be responsible for inducing glial and neuronal patterning.

First human hNT astrocytes patterned to single cell resolution on parylene-C/Silicon dioxide substrates

In our previous work we developed a successful protocol to pattern the human hNT neuron (derived from the human teratocarcinoma cell line (hNT)) on parylene-C/SiO2 substrates. This communication, reports how we have successfully managed to pattern the supportive cell to the neuron, the hNT astrocyte, on such substrates. Here we disseminate the nanofabrication, cell differentiation and cell culturing protocols necessary to successfully pattern the first human hNT astrocytes to single cell resolution on parylene-C/SiO2 substrates. This is performed for varying parylene strip widths providing excellent contrast to the SiO2 substrate and elegant single cell isolation at 10μm strip widths. The breakthrough in patterning human cells on a silicon chip has widespread implications and is valuable as a platform technology as it enables a detailed study of the human brain at the cellular and network level.

Performance Improvement of Tomographic Image Reconstruction Based on DSP Processors

This paper presents the use of a multiprocessor architecture for the performance improvement of tomographic image reconstruction. Image reconstruction in computed tomography (CT) is an intensive task for single-processor systems. We investigate the filtered image reconstruction suitability based on DSPs organized for parallel processing and its comparison with the Message Passing Interface (MPI) library. The experimental results show that the speedups observed for both platforms were increased in the same direction of the image resolution. In addition, the execution time to communication time ratios (Rt/Rc) as a function of the sample size have shown a narrow variation for the DSP platform in comparison with the MPI platform, which indicates its better performance for parallel image reconstruction.

Fabrication and integration of planar electrodes for contactless conductivity detection on polyester-toner electrophoresis microchips

In this report, we describe the microfabrication and integration of planar electrodes for contactless conductivity detection on polyester-toner (PT) electrophoresis microchips using toner masks. Planar electrodes were fabricated by three simple steps: (i) drawing and laser-printing the electrode geometry on polyester films, (ii) sputtering deposition onto substrates, and (iii) removal of toner layer by a lift-off process. The polyester film with anchored electrodes was integrated to PT electrophoresis microchannels by lamination at 120 degrees C in less than 1 min. The electrodes were designed in an antiparallel configuration with 750 mu m width and 750 gm gap between them. The best results were recorded with a frequency of 400 kHz and 10 V-PP using a sinusoidal wave. The analytical performance of the proposed microchip was evaluated by electrophoretic separation of potassium, sodium and lithium in 150 mu m wide x 6 mu m deep microchannels. Under an electric field of 250 V/cm the analytes were successfully separated in less than 90 s with efficiencies ranging from 7000 to 13 000 plates. The detection limits (S/N = 3) found for K+, Na+, and Li+ were 3.1, 4.3, and 7.2 mu mol/L, respectively. Besides the low-cost and instrumental simplicity, the integrated PT chip eliminates the problem of manual alignment and gluing of the electrodes, permitting more robustness and better reproducibility, therefore, more suitable for mass production of electrophoresis microchips.

BEE COLONIES APPLIED TO MULTIPROCESSOR SCHEDULING

In order to achieve the high performance, we need to have an efficient scheduling of a parallelprogram onto the processors in multiprocessor systems that minimizes the entire executiontime. This problem of multiprocessor scheduling can be stated as finding a schedule for ageneral task graph to be executed on a multiprocessor system so that the schedule length can be minimize [10]. This scheduling problem is known to be NP- Hard.In multi processor task scheduling, we have a number of CPU’s on which a number of tasksare to be scheduled that the program’s execution time is minimized. According to [10], thetasks scheduling problem is a key factor for a parallel multiprocessor system to gain betterperformance. A task can be partitioned into a group of subtasks and represented as a DAG(Directed Acyclic Graph), so the problem can be stated as finding a schedule for a DAG to beexecuted in a parallel multiprocessor system so that the schedule can be minimized. Thishelps to reduce processing time and increase processor utilization. The aim of this thesis workis to check and compare the results obtained by Bee Colony algorithm with already generatedbest known results in multi processor task scheduling domain.

Implementação e avaliação de máquinas de comitê em um ambiente com múltiplos processadores embarcados em um único chip

The number of applications based on embedded systems grows significantly every year, even with the fact that embedded systems have restrictions, and simple processing units, the performance of these has improved every day. However the complexity of applications also increase, a better performance will always be necessary. So even such advances, there are cases, which an embedded system with a single unit of processing is not sufficient to achieve the information processing in real time. To improve the performance of these systems, an implementation with parallel processing can be used in more complex applications that require high performance. The idea is to move beyond applications that already use embedded systems, exploring the use of a set of units processing working together to implement an intelligent algorithm. The number of existing works in the areas of parallel processing, systems intelligent and embedded systems is wide. However works that link these three areas to solve any problem are reduced. In this context, this work aimed to use tools available for FPGA architectures, to develop a platform with multiple processors to use in pattern classification with artificial neural networks

Metodologia para adaptação de microarquiteturas microprogramadas soft-core à uma ISA padrão: estudo do impacto sobre a complexidade de hardware para o padrão MIPS

In academia, it is common to create didactic processors, facing practical disciplines in the area of Hardware Computer and can be used as subjects in software platforms, operating systems and compilers. Often, these processors are described without ISA standard, which requires the creation of compilers and other basic software to provide the hardware / software interface and hinder their integration with other processors and devices. Using reconfigurable devices described in a HDL language allows the creation or modification of any microarchitecture component, leading to alteration of the functional units of data path processor as well as the state machine that implements the control unit even as new needs arise. In particular, processors RISP enable modification of machine instructions, allowing entering or modifying instructions, and may even adapt to a new architecture. This work, as the object of study addressing educational soft-core processors described in VHDL, from a proposed methodology and its application on two processors with different complexity levels, shows that it s possible to tailor processors for a standard ISA without causing an increase in the level hardware complexity, ie without significant increase in chip area, while its level of performance in the application execution remains unchanged or is enhanced. The implementations also allow us to say that besides being possible to replace the architecture of a processor without changing its organization, RISP processor can switch between different instruction sets, which can be expanded to toggle between different ISAs, allowing a single processor become adaptive hybrid architecture, which can be used in embedded systems and heterogeneous multiprocessor environments

Effects of Milling on Surface Integrity of Low-Carbon Steel

This work measured the effect of milling parameters on the surface integrity of low-carbon alloy steel. The Variance Analysis showed that only depth of cut did not influence on the workpiece roughness and the Pearson's Coefficient indicated that cutting speed was more influent than tool feed. All cutting parameters introduced tensile residual stress in workpiece surface. The chip formation mechanism depended specially on cutting speed and influenced on the roughness and residual stress of workpiece.