931 resultados para Module drivers
Resumo:
Older adults make up an increasing propordon of automobile drivers in Australia. Despite the fact that older drivers generally drive much less than younger drivers, there is a disdnct increase in accidents, fatalides and injuries in drivers over age 65 (per actual kilometres driven). Accurate means of screening older adults to idendfy those at increased risk of motor vehicle accidents have proved elusive. Neuropsychological assessment and clinical examinadon are not well-correlated with accident risk. On-road tesdng, which is more highly correlated with accident risk, is expensive and dme-consuming, as well as being less suitable as a screening process. Hazard percepdon methods have been used as an effecdve screening method for idendfying younger adults at increased risk of accidents. A brief video-based hazard percepdon screening test involving footage of genuine traffic hazards for use on older individuals will be presented.
Resumo:
Grid connected PhotoVoltaic (PV) inverters fall into three broad categories — Central, String and Module Integrated Converers (MICs). MICs offer any avantaes in performance and flexibility, but are at a cost disadvantage. Two alternative novel approaches proposed by the author — cascaded dc-dc MICs and bypass dc-dc MICs — integrate a simple non-isolated intelligent dc-dc converter with each PV module to provide the advantages of dc-ac MICs at a lower cost. A suitable universal 150W 5A dc-dc converter design is presented based on two interleaved MOSFET half bridges. Testing shows Zero Voltage Switching (ZVS) keeps losses under 1W for bi-directional power flows up to 15W between two adjacent 12V PV modules for the bypass application, and efficiencies over 94% for most of the operational power range for the cascaded converter application. Based on the experimental results, potential optimizations to further reduce losses are discussed.
Resumo:
A specialised reconfigurable architecture for telecommunication base-band processing is augmented with testing resources. The routing network is linked via virtual wire hardware modules to reduce the area occupied by connecting buses. The number of switches within the routing matrices is also minimised, which increases throughput without sacrificing flexibility. The testing algorithm was developed to systematically search for faults in the processing modules and the flexible high-speed routing network within the architecture. The testing algorithm starts by scanning the externally addressable memory space and testing the master controller. The controller then tests every switch in the route-through switch matrix by making loops from the shared memory to each of the switches. The local switch matrix is also tested in the same way. Next the local memory is scanned. Finally, pre-defined test vectors are loaded into local memory to check the processing modules. This algorithm scans all possible paths within the interconnection network exhaustively and reports all faults. Strategies can be inserted to bypass minor faults