Logarithmical hopping encoding: a low computational complexity algorithm for image compression

LHE (logarithmical hopping encoding) is a computationally efficient image compression algorithm that exploits the Weber–Fechner law to encode the error between colour component predictions and the actual value of such components. More concretely, for each pixel, luminance and chrominance predictions are calculated as a function of the surrounding pixels and then the error between the predictions and the actual values are logarithmically quantised. The main advantage of LHE is that although it is capable of achieving a low-bit rate encoding with high quality results in terms of peak signal-to-noise ratio (PSNR) and image quality metrics with full-reference (FSIM) and non-reference (blind/referenceless image spatial quality evaluator), its time complexity is O( n) and its memory complexity is O(1). Furthermore, an enhanced version of the algorithm is proposed, where the output codes provided by the logarithmical quantiser are used in a pre-processing stage to estimate the perceptual relevance of the image blocks. This allows the algorithm to downsample the blocks with low perceptual relevance, thus improving the compression rate. The performance of LHE is especially remarkable when the bit per pixel rate is low, showing much better quality, in terms of PSNR and FSIM, than JPEG and slightly lower quality than JPEG-2000 but being more computationally efficient.

Output Impedance Correction Circuit (OICC): A New Concept to Improve the Dynamic Response of DC/DC Converters with Additional Energy Path

El desarrollo da las nuevas tecnologías permite a los ingenieros llevar al límite el funcionamiento de los circuitos integrados (Integrated Circuits, IC). Las nuevas generaciones de procesadores, DSPs o FPGAs son capaces de procesar la información a una alta velocidad, con un alto consumo de energía, o esperar en modo de baja potencia con el mínimo consumo posible. Esta gran variación en el consumo de potencia y el corto tiempo necesario para cambiar de un nivel al otro, afecta a las especificaciones del Módulo de Regulador de Tensión (Voltage Regulated Module, VRM) que alimenta al IC. Además, las características adicionales obligatorias, tales como adaptación del nivel de tensión (Adaptive Voltage Positioning, AVP) y escalado dinámico de la tensión (Dynamic Voltage Scaling, DVS), imponen requisitos opuestas en el diseño de la etapa de potencia del VRM. Para poder soportar las altas variaciones de los escalones de carga, el condensador de filtro de salida del VRM se ha de sobredimensionar, penalizando la densidad de energía y el rendimiento durante la operación de DVS. Por tanto, las actuales tendencias de investigación se centran en mejorar la respuesta dinámica del VRM, mientras se reduce el tamaño del condensador de salida. La reducción del condensador de salida lleva a menor coste y una prolongación de la vida del sistema ya que se podría evitar el uso de condensadores voluminosos, normalmente implementados con condensadores OSCON. Una ventaja adicional es que reduciendo el condensador de salida, el DVS se puede realizar más rápido y con menor estrés de la etapa de potencia, ya que la cantidad de carga necesaria para cambiar la tensión de salida es menor. El comportamiento dinámico del sistema con un control lineal (Control Modo Tensión, VMC, o Control Corriente de Pico, Peak Current Mode Control, PCMC,…) está limitado por la frecuencia de conmutación del convertidor y por el tamaño del filtro de salida. La reducción del condensador de salida se puede lograr incrementando la frecuencia de conmutación, así como incrementando el ancho de banda del sistema, y/o aplicando controles avanzados no-lineales. Usando esos controles, las variables del estado se saturan para conseguir el nuevo régimen permanente en un tiempo mínimo, así como el filtro de salida, más específicamente la pendiente de la corriente de la bobina, define la respuesta de la tensión de salida. Por tanto, reduciendo la inductancia de la bobina de salida, la corriente de bobina llega más rápido al nuevo régimen permanente, por lo que una menor cantidad de carga es tomada del condensador de salida durante el tránsito. El inconveniente de esa propuesta es que el rendimiento del sistema es penalizado debido al incremento de pérdidas de conmutación y las corrientes RMS. Para conseguir tanto la reducción del condensador de salida como el alto rendimiento del sistema, mientras se satisfacen las estrictas especificaciones dinámicas, un convertidor multifase es adoptado como estándar para aplicaciones VRM. Para asegurar el reparto de las corrientes entre fases, el convertidor multifase se suele implementar con control de modo de corriente. Para superar la limitación impuesta por el filtro de salida, la segunda posibilidad para reducir el condensador de salida es aplicar alguna modificación topológica (Topologic modifications) de la etapa básica de potencia para incrementar la pendiente de la corriente de bobina y así reducir la duración de tránsito. Como el transitorio se ha reducido, una menor cantidad de carga es tomada del condensador de salida bajo el mismo escalón de la corriente de salida, con lo cual, el condensador de salida se puede reducir para lograr la misma desviación de la tensión de salida. La tercera posibilidad para reducir el condensador de salida del convertidor es introducir un camino auxiliar de energía (additional energy path, AEP) para compensar el desequilibrio de la carga del condensador de salida reduciendo consecuentemente la duración del transitorio y la desviación de la tensión de salida. De esta manera, durante el régimen permanente, el sistema tiene un alto rendimiento debido a que el convertidor principal con bajo ancho de banda es diseñado para trabajar con una frecuencia de conmutación moderada para conseguir requisitos estáticos. Por otro lado, el comportamiento dinámico durante los transitorios es determinado por el AEP con un alto ancho de banda. El AEP puede ser implementado como un camino resistivo, como regulador lineal (Linear regulator, LR) o como un convertidor conmutado. Las dos primeras implementaciones proveen un mayor ancho de banda, acosta del incremento de pérdidas durante el transitorio. Por otro lado, la implementación del convertidor computado presenta menor ancho de banda, limitado por la frecuencia de conmutación, aunque produce menores pérdidas comparado con las dos anteriores implementaciones. Dependiendo de la aplicación, la implementación y la estrategia de control del sistema, hay una variedad de soluciones propuestas en el Estado del Arte (State-of-the-Art, SoA), teniendo diferentes propiedades donde una solución ofrece más ventajas que las otras, pero también unas desventajas. En general, un sistema con AEP ideal debería tener las siguientes propiedades: 1. El impacto del AEP a las pérdidas del sistema debería ser mínimo. A lo largo de la operación, el AEP genera pérdidas adicionales, con lo cual, en el caso ideal, el AEP debería trabajar por un pequeño intervalo de tiempo, solo durante los tránsitos; la otra opción es tener el AEP constantemente activo pero, por la compensación del rizado de la corriente de bobina, se generan pérdidas innecesarias. 2. El AEP debería ser activado inmediatamente para minimizar la desviación de la tensión de salida. Para conseguir una activación casi instantánea, el sistema puede ser informado por la carga antes del escalón o el sistema puede observar la corriente del condensador de salida, debido a que es la primera variable del estado que actúa a la perturbación de la corriente de salida. De esa manera, el AEP es activado con casi cero error de la tensión de salida, logrando una menor desviación de la tensión de salida. 3. El AEP debería ser desactivado una vez que el nuevo régimen permanente es detectado para evitar los transitorios adicionales de establecimiento. La mayoría de las soluciones de SoA estiman la duración del transitorio, que puede provocar un transitorio adicional si la estimación no se ha hecho correctamente (por ejemplo, si la corriente de bobina del convertidor principal tiene un nivel superior o inferior al necesitado, el regulador lento del convertidor principal tiene que compensar esa diferencia una vez que el AEP es desactivado). Otras soluciones de SoA observan las variables de estado, asegurando que el sistema llegue al nuevo régimen permanente, o pueden ser informadas por la carga. 4. Durante el transitorio, como mínimo un subsistema, o bien el convertidor principal o el AEP, debería operar en el lazo cerrado. Implementando un sistema en el lazo cerrado, preferiblemente el subsistema AEP por su ancho de banda elevado, se incrementa la robustez del sistema a los parásitos. Además, el AEP puede operar con cualquier tipo de corriente de carga. Las soluciones que funcionan en el lazo abierto suelen preformar el control de balance de carga con mínimo tiempo, así reducen la duración del transitorio y tienen un impacto menor a las pérdidas del sistema. Por otro lado, esas soluciones demuestran una alta sensibilidad a las tolerancias y parásitos de los componentes. 5. El AEP debería inyectar la corriente a la salida en una manera controlada, así se reduce el riesgo de unas corrientes elevadas y potencialmente peligrosas y se incrementa la robustez del sistema bajo las perturbaciones de la tensión de entrada. Ese problema suele ser relacionado con los sistemas donde el AEP es implementado como un convertidor auxiliar. El convertidor auxiliar es diseñado para una potencia baja, con lo cual, los dispositivos elegidos son de baja corriente/potencia. Si la corriente no es controlada, bajo un pico de tensión de entrada provocada por otro parte del sistema (por ejemplo, otro convertidor conectado al mismo bus), se puede llegar a un pico en la corriente auxiliar que puede causar la perturbación de tensión de salida e incluso el fallo de los dispositivos del convertidor auxiliar. Sin embargo, cuando la corriente es controlada, usando control del pico de corriente o control con histéresis, la corriente auxiliar tiene el control con prealimentación (feed-forward) de tensión de entrada y la corriente es definida y limitada. Por otro lado, si la solución utiliza el control de balance de carga, el sistema puede actuar de forma deficiente si la tensión de entrada tiene un valor diferente del nominal, provocando que el AEP inyecta/toma más/menos carga que necesitada. 6. Escalabilidad del sistema a convertidores multifase. Como ya ha sido comentado anteriormente, para las aplicaciones VRM por la corriente de carga elevada, el convertidor principal suele ser implementado como multifase para distribuir las perdidas entre las fases y bajar el estrés térmico de los dispositivos. Para asegurar el reparto de las corrientes, normalmente un control de modo corriente es usado. Las soluciones de SoA que usan VMC son limitadas a la implementación con solo una fase. Esta tesis propone un nuevo método de control del flujo de energía por el AEP y el convertidor principal. El concepto propuesto se basa en la inyección controlada de la corriente auxiliar al nodo de salida donde la amplitud de la corriente es n-1 veces mayor que la corriente del condensador de salida con las direcciones apropiadas. De esta manera, el AEP genera un condensador virtual cuya capacidad es n veces mayor que el condensador físico y reduce la impedancia de salida. Como el concepto propuesto reduce la impedancia de salida usando el AEP, el concepto es llamado Output Impedance Correction Circuit (OICC) concept. El concepto se desarrolla para un convertidor tipo reductor síncrono multifase con control modo de corriente CMC (incluyendo e implementación con una fase) y puede operar con la tensión de salida constante o con AVP. Además, el concepto es extendido a un convertidor de una fase con control modo de tensión VMC. Durante la operación, el control de tensión de salida de convertidor principal y control de corriente del subsistema OICC están siempre cerrados, incrementando la robustez a las tolerancias de componentes y a los parásitos del cirquito y permitiendo que el sistema se pueda enfrentar a cualquier tipo de la corriente de carga. Según el método de control propuesto, el sistema se puede encontrar en dos estados: durante el régimen permanente, el sistema se encuentra en el estado Idle y el subsistema OICC esta desactivado. Por otro lado, durante el transitorio, el sistema se encuentra en estado Activo y el subsistema OICC está activado para reducir la impedancia de salida. El cambio entre los estados se hace de forma autónoma: el sistema entra en el estado Activo observando la corriente de condensador de salida y vuelve al estado Idle cunado el nuevo régimen permanente es detectado, observando las variables del estado. La validación del concepto OICC es hecha aplicándolo a un convertidor tipo reductor síncrono con dos fases y de 30W cuyo condensador de salida tiene capacidad de 140μF, mientras el factor de multiplicación n es 15, generando en el estado Activo el condensador virtual de 2.1mF. El subsistema OICC es implementado como un convertidor tipo reductor síncrono con PCMC. Comparando el funcionamiento del convertidor con y sin el OICC, los resultados demuestran que se ha logrado una reducción de la desviación de tensión de salida con factor 12, tanto con funcionamiento básico como con funcionamiento AVP. Además, los resultados son comparados con un prototipo de referencia que tiene la misma etapa de potencia y un condensador de salida físico de 2.1mF. Los resultados demuestran que los dos sistemas tienen el mismo comportamiento dinámico. Más aun, se ha cuantificado el impacto en las pérdidas del sistema operando bajo una corriente de carga pulsante y bajo DVS. Se demuestra que el sistema con OICC mejora el rendimiento del sistema, considerando las pérdidas cuando el sistema trabaja con la carga pulsante y con DVS. Por lo último, el condensador de salida de sistema con OICC es mucho más pequeño que el condensador de salida del convertidor de referencia, con lo cual, por usar el concepto OICC, la densidad de energía se incrementa. En resumen, las contribuciones principales de la tesis son: • El concepto propuesto de Output Impedance Correction Circuit (OICC), • El control a nivel de sistema basado en el método usado para cambiar los estados de operación, • La implementación del subsistema OICC en lazo cerrado conjunto con la implementación del convertidor principal, • La cuantificación de las perdidas dinámicas bajo la carga pulsante y bajo la operación DVS, y • La robustez del sistema bajo la variación del condensador de salida y bajo los escalones de carga consecutiva. ABSTRACT Development of new technologies allows engineers to push the performance of the integrated circuits to its limits. New generations of processors, DSPs or FPGAs are able to process information with high speed and high consumption or to wait in low power mode with minimum possible consumption. This huge variation in power consumption and the short time needed to change from one level to another, affect the specifications of the Voltage Regulated Module (VRM) that supplies the IC. Furthermore, additional mandatory features, such as Adaptive Voltage Positioning (AVP) and Dynamic Voltage Scaling (DVS), impose opposite trends on the design of the VRM power stage. In order to cope with high load-step amplitudes, the output capacitor of the VRM power stage output filter is drastically oversized, penalizing power density and the efficiency during the DVS operation. Therefore, the ongoing research trend is directed to improve the dynamic response of the VRM while reducing the size of the output capacitor. The output capacitor reduction leads to a smaller cost and longer life-time of the system since the big bulk capacitors, usually implemented with OSCON capacitors, may not be needed to achieve the desired dynamic behavior. An additional advantage is that, by reducing the output capacitance, dynamic voltage scaling (DVS) can be performed faster and with smaller stress on the power stage, since the needed amount of charge to change the output voltage is smaller. The dynamic behavior of the system with a linear control (Voltage mode control, VMC, Peak Current Mode Control, PCMC,…) is limited by the converter switching frequency and filter size. The reduction of the output capacitor can be achieved by increasing the switching frequency of the converter, thus increasing the bandwidth of the system, and/or by applying advanced non-linear controls. Applying nonlinear control, the system variables get saturated in order to reach the new steady-state in a minimum time, thus the output filter, more specifically the output inductor current slew-rate, determines the output voltage response. Therefore, by reducing the output inductor value, the inductor current reaches faster the new steady state, so a smaller amount of charge is taken from the output capacitor during the transient. The drawback of this approach is that the system efficiency is penalized due to increased switching losses and RMS currents. In order to achieve both the output capacitor reduction and high system efficiency, while satisfying strict dynamic specifications, a Multiphase converter system is adopted as a standard for VRM applications. In order to ensure the current sharing among the phases, the multiphase converter is usually implemented with current mode control. In order to overcome the limitation imposed by the output filter, the second possibility to reduce the output capacitor is to apply Topologic modifications of the basic power stage topology in order to increase the slew-rate of the inductor current and, therefore, reduce the transient duration. Since the transient is reduced, smaller amount of charge is taken from the output capacitor under the same load current, thus, the output capacitor can be reduced to achieve the same output voltage deviation. The third possibility to reduce the output capacitor of the converter is to introduce an additional energy path (AEP) to compensate the charge unbalance of the output capacitor, consequently reducing the transient time and output voltage deviation. Doing so, during the steady-state operation the system has high efficiency because the main low-bandwidth converter is designed to operate at moderate switching frequency, to meet the static requirements, whereas the dynamic behavior during the transients is determined by the high-bandwidth auxiliary energy path. The auxiliary energy path can be implemented as a resistive path, as a Linear regulator, LR, or as a switching converter. The first two implementations provide higher bandwidth, at the expense of increasing losses during the transient. On the other hand, the switching converter implementation presents lower bandwidth, limited by the auxiliary converter switching frequency, though it produces smaller losses compared to the two previous implementations. Depending on the application, the implementation and the control strategy of the system, there is a variety of proposed solutions in the State-of-the-Art (SoA), having different features where one solution offers some advantages over the others, but also some disadvantages. In general, an ideal additional energy path system should have the following features: 1. The impact on the system losses should be minimal. During its operation, the AEP generates additional losses, thus ideally, the AEP should operate for a short period of time, only when the transient is occurring; the other option is to have the AEP constantly on, but due to the inductor current ripple compensation at the output, unnecessary losses are generated. 2. The AEP should be activated nearly instantaneously to prevent bigger output voltage deviation. To achieve near instantaneous activation, the converter system can be informed by the load prior to the load-step or the system can observe the output capacitor current, which is the first system state variable that reacts on the load current perturbation. In this manner, the AEP is turned on with near zero output voltage error, providing smaller output voltage deviation. 3. The AEP should be deactivated once the new steady state is reached to avoid additional settling transients. Most of the SoA solutions estimate duration of the transient which may cause additional transient if the estimation is not performed correctly (e.g. if the main converter inductor current has higher or lower value than needed, the slow regulator of the main converter needs to compensate the difference after the AEP is deactivated). Other SoA solutions are observing state variables, ensuring that the system reaches the new steady state or they are informed by the load. 4. During the transient, at least one subsystem, either the main converter or the AEP, should be in closed-loop. Implementing a closed loop system, preferably the AEP subsystem, due its higher bandwidth, increases the robustness under system tolerances and circuit parasitic. In addition, the AEP can operate with any type of load. The solutions that operate in open loop usually perform minimum time charge balance control, thus reducing the transient length and minimizing the impact on the losses, however they are very sensitive to tolerances and parasitics. 5. The AEP should inject current at the output in a controlled manner, thus reducing the risk of high and potentially damaging currents and increasing robustness on the input voltage deviation. This issue is mainly related to the systems where AEP is implemented as auxiliary converter. The auxiliary converter is designed for small power and, as such, the MOSFETs are rated for small power/currents. If the current is not controlled, due to the some unpredicted spike in input voltage caused by some other part of the system (e.g. different converter), it may lead to a current spike in auxiliary current which will cause the perturbation of the output voltage and even failure of the switching components of auxiliary converter. In the case when the current is controlled, using peak CMC or Hysteretic Window CMC, the auxiliary converter has inherent feed-forwarding of the input voltage in current control and the current is defined and limited. Furthermore, if the solution employs charge balance control, the system may perform poorly if the input voltage has different value than the nominal, causing that AEP injects/extracts more/less charge than needed. 6. Scalability of the system to multiphase converters. As commented previously, in VRM applications, due to the high load currents, the main converters are implemented as multiphase to redistribute losses among the modules, lowering temperature stress of the components. To ensure the current sharing, usually a Current Mode Control (CMC) is employed. The SoA solutions that are implemented with VMC are limited to a single stage implementation. This thesis proposes a novel control method of the energy flow through the AEP and the main converter system. The proposed concept relays on a controlled injection of the auxiliary current at the output node where the instantaneous current value is n-1 times bigger than the output capacitor current with appropriate directions. Doing so, the AEP creates an equivalent n times bigger virtual capacitor at the output, thus reducing the output impedance. Due to the fact that the proposed concept reduces the output impedance using the AEP, it has been named the Output Impedance Correction Circuit (OICC) concept. The concept is developed for a multiphase CMC synchronous buck converter (including a single phase implementation), operating with a constant output voltage and with AVP feature. Further, it is extended to a single phase VMC synchronous buck converter. During the operation, the main converter voltage loop and the OICC subsystem capacitor current loop is constantly closed, increasing the robustness under system tolerances and circuit parasitic and allowing the system to operate with any load-current shape or pattern. According to the proposed control method, the system operates in two states: during the steady-state the system is in the Idle state and the OICC subsystem is deactivated, while during the load-step transient the system is in the Active state and the OICC subsystem is activated in order to reduce the output impedance. The state changes are performed autonomously: the system enters in the Active state by observing the output capacitor current and it returns back to the Idle state when the steady-state operation is detected by observing the state variables. The validation of the OICC concept has been done by applying it to a 30W two phase synchronous buck converter with 140μF output capacitor and with the multiplication factor n equal to 15, generating during the Active state equivalent output capacitor of 2.1mF. The OICC subsystem is implemented as single phase PCMC synchronous buck converter. Comparing the converter operation with and without the OICC the results demonstrate that the 12 times reduction of the output voltage deviation is achieved, for both basic operation and for the AVP operation. Furthermore, the results have been compared to a reference prototype which has the same power stage and a fiscal output capacitor of 2.1mF. The results show that the two systems have the same dynamic behavior. Moreover, an impact on the system losses under the pulsating load and DVS operation has been quantified and it has been demonstrated that the OICC system has improved the system efficiency, considering the losses when the system operates with the pulsating load and the DVS operation. Lastly, the output capacitor of the OICC system is much smaller than the reference design output capacitor, therefore, by applying the OICC concept the power density can be increased. In summary, the main contributions of the thesis are: • The proposed Output Impedance Correction Circuit (OICC) concept, • The system level control based on the used approach to change the states of operation, • The OICC subsystem closed-loop implementation, together with the main converter implementation, • The dynamic losses under the pulsating load and the DVS operation quantification, and • The system robustness on the capacitor impedance variation and consecutive load-steps.

Age regression from soft aligned face images using low computational resources

The initial step in most facial age estimation systems consists of accurately aligning a model to the output of a face detector (e.g. an Active Appearance Model). This fitting process is very expensive in terms of computational resources and prone to get stuck in local minima. This makes it impractical for analysing faces in resource limited computing devices. In this paper we build a face age regressor that is able to work directly on faces cropped using a state-of-the-art face detector. Our procedure uses K nearest neighbours (K-NN) regression with a metric based on a properly tuned Fisher Linear Discriminant Analysis (LDA) projection matrix. On FG-NET we achieve a state-of-the-art Mean Absolute Error (MAE) of 5.72 years with manually aligned faces. Using face images cropped by a face detector we get a MAE of 6.87 years in the same database. Moreover, most of the algorithms presented in the literature have been evaluated on single database experiments and therefore, they report optimistically biased results. In our cross-database experiments we get a MAE of roughly 12 years, which would be the expected performance in a real world application.

Low dimensionality of supraspinally induced force fields

Recent experiments using electrical and N-methyl-d-aspartate microstimulation of the spinal cord gray matter and cutaneous stimulation of the hindlimb of spinalized frogs have provided evidence for a modular organization of the frog’s spinal cord circuitry. A “module” is a functional unit in the spinal cord circuitry that generates a specific motor output by imposing a specific pattern of muscle activation. The output of a module can be characterized as a force field: the collection of the isometric forces generated at the ankle over different locations in the leg’s workspace. Different modules can be combined independently so that their force fields linearly sum. The goal of this study was to ascertain whether the force fields generated by the activation of supraspinal structures could result from combinations of a small number of modules. We recorded a set of force fields generated by the electrical stimulation of the vestibular nerve in seven frogs, and we performed a principal component analysis to study the dimensionality of this set. We found that 94% of the total variation of the data is explained by the first five principal components, a result that indicates that the dimensionality of the set of fields evoked by vestibular stimulation is low. This result is compatible with the hypothesis that vestibular fields are generated by combinations of a small number of spinal modules.

TAT peptide on the surface of liposomes affords their efficient intracellular delivery even at low temperature and in the presence of metabolic inhibitors

To achieve an efficient intracellular drug and DNA delivery, attempts were made to target microparticulate drug carriers into cytoplasm bypassing the endocytotic pathway. TAT peptides derived from the HIV-1 TAT protein facilitate intracellular delivery of proteins and small colloidal particles. We demonstrated that relatively large drug carriers, such as 200-nm liposomes, can also be delivered into cells by TAT peptide attached to the liposome surface. Liposomes were fluorescently labeled with membranotropic rhodamine-phosphatidylethanolamine or by entrapping FITC-dextran. Incubation of fluorescent TAT liposomes with mouse Lewis lung carcinoma cells, human breast tumor BT20 cells, and rat cardiac myocyte H9C2 results in intracellular localization of certain liposomes. Steric hindrances for TAT peptide⋅cell interaction (attachment of TAT directly to the liposome surface without spacer or the presence of a high MW polyethylene glycol on the liposome surface) abolish liposome internalization, evidencing the importance of direct contact of TAT peptide with the cell surface. Low temperature or metabolic inhibitors, sodium azide or iodoacetamide, have little influence on the translocation of TAT liposomes into cells, confirming the energy-independent character of this process. The approach may have important implications for drug delivery directly into cell cytoplasm.

Joining forces - Combining cognition-targeted motor control training with group or individual pain physiology education: A successful treatment for chronic low back pain

Chronic unremittent low back pain (LBP) is characterised by cognitive barriers to treatment. Combining a motor control training approach with individualised education about pain physiology is effective in this group of patients. This randomized comparative trial (i) evaluates an approach to motor control acquisition and training that considers the complexities of the relationship between pain and motor output, and (ii) compares the efficacy and cost of individualized and group pain physiology education. After an "ongoing usual treatment" period, patients participated in a 4-week motor control and pain physiology education program. Patients received four one-hour individualized education sessions (IE) or one 4-hour group lecture (GE). Both groups reduced pain (numerical rating scale) and disability (Roland Morris Disability Questionnaire). IE showed bigger decreases, which were maintained at 12 months (P < 0.05 for all). The combined motor control and education approach is effective. Although group education imparts a lesser effect, it may be more cost-efficient. [ABSTRACT FROM AUTHOR]

Hip strategy for balance control in quiet standing is reduced in people with low back pain

Study Design. Quiet stance on supporting bases with different lengths and with different visual inputs were tested in 24 study participants with chronic low back pain (LBP) and 24 matched control subjects. Objectives. To evaluate postural adjustment strategies and visual dependence associated with LBP. Summary of Background Data. Various studies have identified balance impairments in patients with chronic LBP, with many possible causes suggested. Recent evidence indicates that study participants with LBP have impaired trunk muscle control, which may compromise the control of trunk and hip movement during postural adjustments ( e. g., hip strategy). As balance on a short base emphasizes the utilization of the hip strategy for balance control, we hypothesized that patients with LBP might have difficulties standing on short bases. Methods. Subjects stood on either flat surface or short base with different visual inputs. A task was counted as successful if balance was maintained for 70 seconds during bilateral stance and 30 seconds during unilateral stance. The number of successful tasks, horizontal shear force, and center-of-pressure motion were evaluated. Results. The hip strategy was reduced with increased visual dependence in study participants with LBP. The failure rate was more than 4 times that of the controls in the bilateral standing task on short base with eyes closed. Analysis of center-of-pressure motion also showed that they have inability to initiate and control a hip strategy. Conclusions. The inability to control a hip strategy indicates a deficit of postural control and is hypothesized to result from altered muscle control and proprioceptive impairment.

Effects of pravastatin on coronary events in 2073 patients with low levels of both low-density lipoprotein cholesterol and high-density lipoprotein cholesterol: results from the LIPID study

Aims Fibrates or nicotinic acid are usually recommended for secondary prevention of coronary heart disease in patients with low plasma levels of both low-density tipoprotein cholesterol (LDL-C) less than or equal to140 mg/dL (less than or equal to3.6 mmol/L) and high-density lipoprotein cholesterol (HDL-C) less than or equal to40 mg/dL (less than or equal to1.03 mmol/L). The LIPID trial, a randomised, placebo-controlled trial in 9014 patients at 87 centres in Australia and New Zealand, provided an opportunity to investigate the effects of an HMG-CoA reductase inhibitor in patients with tow LDL-C and tow HDL-C. Methods and results Participants in this post hoc substudy were 2073 patients aged 31-75 years with baseline LDL-C less than or equal to140 mg/dL (less than or equal to3.6 mmoL/L), HDL-C less than or equal to40 mg/dL (less than or equal to1.03 mmol/L), and triglyceride less than or equal to300 mg/dL (less than or equal to3.4 mmol/L). The relative risk reduction with pravastatin treatment was 27% for major coronary events (95% Cl 8-42%), 27% for coronary heart disease mortality (95% CI 0-47%), 21% for all-cause mortality (95% Cl 0-38%), and 51% for stroke (95% CI 24-69%). The number needed to treat to prevent a major coronary event over 6 years was 22. Conclusions Treatment with pravastatin in patients with both low LDL-C and low HDL-C significantly reduced major coronary events, stroke, and all-cause mortality. The level of HDL-C is crucial to the risk of recurrent CHD events and, consequently, the benefit of lowering LDL-C. (C) 2004 Published by Elsevier Ltd on behalf of The European Society of Cardiology.

No relationship between low-density lipoproteins and endothelial function in hemodialysis patients

Background: Relationships between low-density lipoprotein cholesterol and endothelial function in hemodialysis patients have yet to be investigated. Furthermore, current reporting of endothelial function data using flow-mediated dilatation has recognised limitations. The aims of the study were to determine the relationship between low-density lipoproteins and endothelial function in hemodialysis patients and to investigate the validity of determining the area under the curve for data collected during the flow-mediated dilatation technique. Methods: Brachial artery responses to reactive hyperemia (endothelial-dependent) and glyceryl trinitrate (endothelial-independent) were assessed in 19 hemodialysis patients using high-resolution ultrasound. Lipid profiles and other factors known to effect brachial artery reactivity were also measured prior to the flow-mediated dilatation technique. Results: There were no significant relationships between serum low-density lipoproteins and endothelial-dependent or -independent vasodilation using absolute change (mm), relative change (%), time to peak change (s) or area under the curve (mm(.)s). In hemodialysis patients with atherosclerosis, area under the curve analysis showed a significantly (p < 0.05) decreased endothelial-dependent response (mean +/- S.D.: 19.2 +/- 17.4) compared to non-atherosclerotic patients (42.3 +/- 28.6). However, when analysing these data using absolute change, relative change or time to peak dilatation, there were no significant differences between the two groups. Conclusions: In summary, there was no relationship between low-density lipoproteins and endothelial function in hemodialysis patients. In addition, area under the curve analysis of flow-mediated vasodilatation data may be a useful method of determining the temporal vascular response during the procedure. (c) 2004 Elsevier Ireland Ltd. All rights reserved.

Subcellular localization determines MAP kinase signal output

The Raf-MEK-ERK MAP kinase cascade transmits signals from activated receptors into the cell to regulate proliferation and differentiation. The cascade is controlled by the Ras GTPase, which recruits Raf from the cytosol to the plasma membrane for activation. In turn, MEK, ERK, and scaffold proteins translocate to the plasma membrane for activation. Here, we examine the input-output properties of the Raf-MEK-ERK MAP kinase module in mammalian cells activated in different cellular contexts. We show that the MAP kinase module operates as a molecular switch in vivo but that the input sensitivity of the module is determined by subcellular location. Signal output from the module is sensitive to low-level input only when it is activated at the plasma membrane. This is because the threshold for activation is low at the plasma membrane, whereas the threshold for activation is high in the cytosol. Thus, the circuit configuration of the module at the plasma membrane generates maximal outputs from low-level analog inputs, allowing cells to process and respond appropriately to physiological stimuli. These results reveal the engineering logic behind the recruitment of elements of the module from the cytosol to the membrane for activation.

Low-complexity low-PAR transmission for MIMO-DSL

This letter considers clip-limited transmission over multiple-input multiple-output digital subscriber lines (MIMO-DSL). We show that a recent low complexity, low peak-to-average-ratio (PAR) single-input modulation technique can be applied to the case of multiple cross-talking channels in a bonded-DSL system. Unfortunately however the direct initialization procedure is computationally infeasible. In this paper, we provide a novel low-complexity initialization procedure. Simulations confirm that the proposed approach has superior performance in clip-limited conditions, compared with both discrete matrix multitone and vectored discrete multitone.

Covariation and interference between physiological reflexes: Eye-blink startle cardiac defense, and skin conductance

Comparative studies of autonomic and somatic reflexes, such as cardiac defense and motor startle, are rare. However, examination of the pattern of covariation, independence, or interference among physiological reflexes may help to clarify their functional significance and elucidate their complex modulation by psychological factors. Here we report the results of a study that examined the pattern of interference of eye-blink startle on subsequent cardiac defense. Participants were 63 students (31 women) distributed into three groups according to the sensory modality of the eliciting stimulus during the startle trials: acoustic high intensity (105 dB), acoustic low intensity (65 dB), and visual modality. Startle trials consisted of 12 presentations of the eliciting stimulus with a duration of 50 ms, instantaneous risetime, and a variable inter-stimulus interval of 16 – 20 s.Defense trials began 20 s after the last startle trial and consisted, for all groups, of 3 presentations of the high intensity acoustic stimulus with a duration of 500 ms and an inter-stimulus interval of 215 s. Results showed a clear interference of the startle trials on the subsequent defense trials when both types of trials shared identical sensory modality (acoustic) independently of intensity: the expected pattern of cardiac defense in the first trial only appeared in the visual modality. Similar interference effects were observed in the skin conductance response. Subjective reactivity to the defense stimulus did not detect differences between conditions.

A comparison of the effect of high- and low-dose fentanyl on the incidence of postoperative cognitive dysfunction after coronary artery bypass surgery in the elderly

Background. Postoperative cognitive dysfunction (POCD) after coronary artery bypass graft surgery is a common complication for which, despite many clinical investigations, no definitive etiology has been found. The current use of both high and low-dose fentanyl as anesthetic techniques allowed us to investigate the effect of fentanyl on the incidence of POCD. Methods. Three hundred fifty patients scheduled to undergo elective coronary artery bypass graft surgery were randomized to receive either high-dose fentanyl (50 mu g/kg) or low-dose fentanyl (10 mu g/kg) as the basis of the anesthetic. All patients underwent neuropsychological testing before surgery and at 1 week, 3 months, and 12 months after surgery. Results. One hundred sixty-eight patients in the low-dose group and 158 patients in the high-dose group were included in the final analysis. Neuropsychological testing was performed on 88%, 93%, and 92% of patients at 1 week, 3 months, and 12 months, respectively. There was no difference between group mean scores at any of the three testing times. Analysis of individual patients by the 20% rule did not detect any differences between groups. The one SD rule, which has fewer false-positive results, detected significantly more patients with POCD in the low-dose group than in the high-dose group at 1 week (23.6% vs. 13.7%; P = 0.03) but not at the other testing times. Patients with POCD spent an average of 1.2 days longer in the hospital than those without POCD (P = 0.021). Conclusions: High-dose fentanyl is not associated with a difference in the incidence of POCD at 3 or 12 months after surgery. Low-dose fentanyl leads to shorter postoperative ventilation times and may be associated with a greater incidence of POCD 1 week after surgery. Early POCD is associated with an increased duration of stay in the hospital.

Typical performance of low-density parity-check codes over general symmetric channels

Typical performance of low-density parity-check (LDPC) codes over a general binary-input output-symmetric memoryless channel is investigated using methods of statistical mechanics. The binary-input additive-white-Gaussian-noise channel and the binary-input Laplace channel are considered as specific channel noise models.

Extended-range, low coherence dual wavelength interferometry using a superfluorescent fibre source and chirped fibre Bragg gratings

We describe an all-fibre, passive scheme for making extended range interferometric measurements based on the dual wavelength technique. The coherence tuned interferometer network is illuminated with a single superfluorescent fibre source at 1.55 µm and the two wavelengths are synthesised at the output by means of chirped fibre Bragg gratings. We demonstrate an unambiguous sensing range of 270 µm, with a dynamic range of 2.7 × 10 5.