pH-changes during intracoronal bleaching: An in vivo study

Objectives: This study aimed to measure pH changes during 14 days intracoronal bleaching with hydrogen peroxide/sodium perborate and carbamide peroxide/sodium perborate. Materials and methods: Twenty patients presenting endodontically treated central maxillary incisors with color alterations were divided in two groups (n = 10): Group CP + SP: 37% carbamide peroxide + sodium perborate paste; Group HP + SP: 30% hydrogen peroxide + sodium perborate paste. The pH values were measured using a digital microprocessor at different times: Baseline, 2, 7 and 14 days. Data were analyzed with two-way ANOVA followed by Tukey's test (α = 0.05). Results: ANOVA showed p < 0.00 which indicated significant difference between the groups. The mean values (± sd) and the results of the Tukey's test were: HP + SP/14 days-7.98 (±0.58)a; HP + SP/7 days-8.59 (±0.18)b; HP + SP/2 days-8.83 (±0.32)bc; HP + SP/Baseline-8.83 (±0.01)bc; CP + SP/Baseline-8.89 (±0.01)bc; CP + SP/14 days-9.11 (±0.58)cd; CP + SP/7 days-9.54 (±0.16)de; CP + SP/2 days-9.66 (±0.08) de. The group HP + SP resulted in significantly lower pH values compared with group CP + SP. Conclusion: It can be concluded that both associations showed alkaline pH values; however, there was significant reduction in the pH values of the 30% hydrogen peroxide associated with sodium perborate after 14 days. Clinical Significance: The association of hydrogen peroxide and carbamide peroxide with sodium perborate paste presented alkaline characteristics during the 14-day evaluated period. Thus, regarding pH changes, both associations can be considered safe as intracoronal bleaching agents.

High tech garbage can help engineering colleges to improve hands-on education

This paper presents a discussion on the potential use of high tech garbage, including electronic waste (e-waste), as a source of mechanisms, sensors and actuators, that can be adapted to improve the reality of microprocessor systems labs, at low cost. By means of some examples, it is shown that entire subsystems withdrawn of high tech equipments can be easily integrated into existing laboratory infrastructure. As examples, first a precision positioning mechanism is presented, which was taken from a discarded commercial ink jet printer and interfaced with a microprocessor board used in the laboratory classes. Secondly, a read/write head and its positioning mechanism has been withdrawn of a retired CD/DVD drive and again interfaced with the microprocessor board. Students who have been using these new experiments strongly approve their inclusion in the lab schedules. © 2011 IEEE.

Avaliação da eficiência de isolantes térmicos por reflexão, utilizados como subcoberturas

Pós-graduação em Agronomia (Energia na Agricultura) - FCA

A imagem digital da TV na copa do mundo de 2010

Pós-graduação em Comunicação - FAAC

Desenvolvimento de um conjunto de modelagem de alta resolução para os métodos eletromagnéticos indutivos

A Modelagem Eletromagnética Analógica tem sido uma poderosa ferramenta no estudo das respostas eletromagnéticas de uma grande variedade das técnicas de levantamentos e de modelos geológicos. Nas aplicações de métodos eletromagnéticos nas investigações de contaminação no subsolo, recentemente em grande demanda, são obtidas anomalias muito baixas (da ordem de 0,01% do campo primário). Com o objetivo de estudar em laboratório os problemas de levantamentos eletromagnéticos para alvos de baixo número de indução, um conjunto de modelagem em escala reduzida de alta sensibilidade, foi projetado e construído. Este conjunto opera na faixa de freqüência de 1 kHz até 1 MHz com excelente linearidade. O transdutor de transmissão gera suficiente densidade de fluxo magnético com corrente de até 3 App (pico a pico) circulando nele. O sistema de recepção, isto é, o conjunto de bobinas receptoras mais o pré-amplificador acoplado apresenta sensibilidade 3 V/A/m na freqüência de 10 kHz com inclinação de 20 dB/dec de freqüência. A alta sensibilidade do sistema de recepção combinada com a boa capacidade de geração do sistema transmissor, permite alcançar a resolução de 0,025% do campo primário. O conjunto dispõe ainda, de um sistema mecânico que permite posicionar o sistema de transdutores (transmissor e receptor) em posições arbitrárias com resolução de 1 mm e precisão de 0,05 mm. A precisão no deslocamento linear do sistema de sonda numa linha de 1715 mm de comprimento é alcançada por meio de um motor de passo controlado por um microcontrolador, que é rigidamente acoplado a um fuso que converte o movimento angular do motor em movimento linear. Com este conjunto, é possível simular uma grande variedade de técnicas de levantamentos eletromagnéticos no formato Slingram, isto é, dipolo-dipolo. Além da boa resolução mecânica e boa resolução de medida eletromagnética do conjunto, todo o processo de controle e aquisição de dados é operacionalizado por meio de um computador mestre.

Internal Combustion Engine's Throttle Control as a Motivational Theme for Teaching Microprocessors Systems Lab Classes

The increased fuel economy and driveability of modern internal combustion engine vehicles (ICEVs) are the result of the application of advanced digital electronics to control the operation of the internal combustion engine (ICE). Microprocessors (and micro controllers) play a key role in the engine control, by precisely controlling the amount of both air and fuel admitted into the cylinders. Air intake is controlled by utilizing a throttle valve equipped with a motor and gear mechanism as actuator, and a sensor enabling the measurement of the angular position of the blades. This paperwork presents a lab setup that allows students to control the throttle position using a microcontroller that runs a program developed by them. A commercial throttle body has been employed, whereas a power amplifier and a microcontroller board have been hand assembled to complete the experimental setup. This setup, while based in a high-tech, microprocessor-based solution for a real-world, engine operation optimization problem, has the potential to engage students around a hands-on multidisciplinary lab activity and ignite their interest in learning fundamental and advanced topics of microprocessors systems.

A novel strategy for building interoperable MPI environment in heterogeneous high performance systems

Breakthrough advances in microprocessor technology and efficient power management have altered the course of development of processors with the emergence of multi-core processor technology, in order to bring higher level of processing. The utilization of many-core technology has boosted computing power provided by cluster of workstations or SMPs, providing large computational power at an affordable cost using solely commodity components. Different implementations of message-passing libraries and system softwares (including Operating Systems) are installed in such cluster and multi-cluster computing systems. In order to guarantee correct execution of message-passing parallel applications in a computing environment other than that originally the parallel application was developed, review of the application code is needed. In this paper, a hybrid communication interfacing strategy is proposed, to execute a parallel application in a group of computing nodes belonging to different clusters or multi-clusters (computing systems may be running different operating systems and MPI implementations), interconnected with public or private IP addresses, and responding interchangeably to user execution requests. Experimental results demonstrate the feasibility of this proposed strategy and its effectiveness, through the execution of benchmarking parallel applications.

Tecniche di progettazione tollerante alle variazioni per circuiti digitali in tecnologie nanometriche

The digital electronic market development is founded on the continuous reduction of the transistors size, to reduce area, power, cost and increase the computational performance of integrated circuits. This trend, known as technology scaling, is approaching the nanometer size. The lithographic process in the manufacturing stage is increasing its uncertainty with the scaling down of the transistors size, resulting in a larger parameter variation in future technology generations. Furthermore, the exponential relationship between the leakage current and the threshold voltage, is limiting the threshold and supply voltages scaling, increasing the power density and creating local thermal issues, such as hot spots, thermal runaway and thermal cycles. In addiction, the introduction of new materials and the smaller devices dimension are reducing transistors robustness, that combined with high temperature and frequently thermal cycles, are speeding up wear out processes. Those effects are no longer addressable only at the process level. Consequently the deep sub-micron devices will require solutions which will imply several design levels, as system and logic, and new approaches called Design For Manufacturability (DFM) and Design For Reliability. The purpose of the above approaches is to bring in the early design stages the awareness of the device reliability and manufacturability, in order to introduce logic and system able to cope with the yield and reliability loss. The ITRS roadmap suggests the following research steps to integrate the design for manufacturability and reliability in the standard CAD automated design flow: i) The implementation of new analysis algorithms able to predict the system thermal behavior with the impact to the power and speed performances. ii) High level wear out models able to predict the mean time to failure of the system (MTTF). iii) Statistical performance analysis able to predict the impact of the process variation, both random and systematic. The new analysis tools have to be developed beside new logic and system strategies to cope with the future challenges, as for instance: i) Thermal management strategy that increase the reliability and life time of the devices acting to some tunable parameter,such as supply voltage or body bias. ii) Error detection logic able to interact with compensation techniques as Adaptive Supply Voltage ASV, Adaptive Body Bias ABB and error recovering, in order to increase yield and reliability. iii) architectures that are fundamentally resistant to variability, including locally asynchronous designs, redundancy, and error correcting signal encodings (ECC). The literature already features works addressing the prediction of the MTTF, papers focusing on thermal management in the general purpose chip, and publications on statistical performance analysis. In my Phd research activity, I investigated the need for thermal management in future embedded low-power Network On Chip (NoC) devices.I developed a thermal analysis library, that has been integrated in a NoC cycle accurate simulator and in a FPGA based NoC simulator. The results have shown that an accurate layout distribution can avoid the onset of hot-spot in a NoC chip. Furthermore the application of thermal management can reduce temperature and number of thermal cycles, increasing the systemreliability. Therefore the thesis advocates the need to integrate a thermal analysis in the first design stages for embedded NoC design. Later on, I focused my research in the development of statistical process variation analysis tool that is able to address both random and systematic variations. The tool was used to analyze the impact of self-timed asynchronous logic stages in an embedded microprocessor. As results we confirmed the capability of self-timed logic to increase the manufacturability and reliability. Furthermore we used the tool to investigate the suitability of low-swing techniques in the NoC system communication under process variations. In this case We discovered the superior robustness to systematic process variation of low-swing links, which shows a good response to compensation technique as ASV and ABB. Hence low-swing is a good alternative to the standard CMOS communication for power, speed, reliability and manufacturability. In summary my work proves the advantage of integrating a statistical process variation analysis tool in the first stages of the design flow.

Risk analysis of tractor rollover in the normal operation in field

Tractor rollover represent a primary cause of death or serious injury in agriculture and despite the mandatory Roll-Over Protective Structures (ROPS), that reduced the number of injuries, tractor accidents are still of great concern. Because of their versatility and wide use many studies on safety are concerned with the stability of tractors, but they often prefer controlled tests or laboratory tests. The evaluation of tractors working in field, instead, is a very complex issue because the rollover could be influenced by the interaction among operator, tractor and environment. Recent studies are oriented towards the evaluation of the actual working conditions developing prototypes for driver assistance and data acquisition. Currently these devices are produced and sold by manufacturers. A warning device was assessed in this study with the aim to evaluate its performance and to collect data on different variables influencing the dynamics of tractors in field by monitoring continuously the working conditions of tractors operating at the experimental farm of the Bologna University. The device consists of accelerometers, gyroscope, GSM/GPRS, GPS for geo-referencing and a transceiver for the automatic recognition of tractor-connected equipment. A microprocessor processes data and provides information, through a dedicated algorithm requiring data on the geometry of the tested tractor, on the level of risk for the operator in terms of probable loss of stability and suggests corrective measures to reduce the potential instability of the tractor.

ATP modeling of internal transformer faults for relay performance testing

Transformers are very important elements of any power system. Unfortunately, they are subjected to through-faults and abnormal operating conditions which can affect not only the transformer itself but also other equipment connected to the transformer. Thus, it is essential to provide sufficient protection for transformers as well as the best possible selectivity and sensitivity of the protection. Nowadays microprocessor-based relays are widely used to protect power equipment. Current differential and voltage protection strategies are used in transformer protection applications and provide fast and sensitive multi-level protection and monitoring. The elements responsible for detecting turn-to-turn and turn-to-ground faults are the negative-sequence percentage differential element and restricted earth-fault (REF) element, respectively. During severe internal faults current transformers can saturate and slow down the speed of relay operation which affects the degree of equipment damage. The scope of this work is to develop a modeling methodology to perform simulations and laboratory tests for internal faults such as turn-to-turn and turn-to-ground for two step-down power transformers with capacity ratings of 11.2 MVA and 290 MVA. The simulated current waveforms are injected to a microprocessor relay to check its sensitivity for these internal faults. Saturation of current transformers is also studied in this work. All simulations are performed with the Alternative Transients Program (ATP) utilizing the internal fault model for three-phase two-winding transformers. The tested microprocessor relay is the SEL-487E current differential and voltage protection relay. The results showed that the ATP internal fault model can be used for testing microprocessor relays for any percentage of turns involved in an internal fault. An interesting observation from the experiments was that the SEL-487E relay is more sensitive to turn-to-turn faults than advertized for the transformers studied. The sensitivity of the restricted earth-fault element was confirmed. CT saturation cases showed that low accuracy CTs can be saturated with a high percentage of turn-to-turn faults, where the CT burden will affect the extent of saturation. Recommendations for future work include more accurate simulation of internal faults, transformer energization inrush, and other scenarios involving core saturation, using the newest version of the internal fault model. The SEL-487E relay or other microprocessor relays should again be tested for performance. Also, application of a grounding bank to the delta-connected side of a transformer will increase the zone of protection and relay performance can be tested for internal ground faults on both sides of a transformer.

Vertical distribution of large particulate matter in the Western Mediterranean Sea

The relationship between mesoscale hydrodynamics and the distribution of large particulate matter (LPM, particles larger than 200 ?m) in the first 1000 m of the Western Mediterranean basin was studied with a microprocessor-driven CTD-video package, the Underwater Video Profiler (UVP). Observations made during the last decade showed that, in late spring and summer, LPM concentration was high in the coastal part of the Western Mediterranean basin at the shelf break and near the continental slope (computed maximum: 149 ?g C/l between 0 and 100 m near the Spanish coast of the Gibraltar Strait). LPM concentration decreased further offshore into the central Mediterranean Sea where, below 100 m, it remained uniformly low, ranging from 2 to 4 ?g C/l. However, a strong variability was observed in the different mesoscale structures such as the Almeria-Oran jet in the Alboran Sea or the Algerian eddies. LPM concentration was up to one order of magnitude higher in fronts and eddies than in the adjacent oligotrophic Mediterranean waters (i.e. 35 vs. 8 ?g C/l in the Alboran Sea or 16 vs. 3 ?g C/l in a small shear cyclonic eddy). Our observations suggest that LPM spatial heterogeneity generated by the upper layer mesoscale hydrodynamics extends into deeper layers. Consequently, the superficial mesoscale dynamics may significantly contribute to the biogeochemical cycling between the upper and meso-pelagic layers.

(Supplement) Groundwater quality in Lahore Pakistan: emphasis on Arsenic and Fluoride levels

The dataset provides detailed information on the study that was conducted in Lahore's 7 major towns. The sample was taken from 472 tubewells and analyzed for major cations and anions using APHA 2012 techniques as explained herein. Besides, E.coli determination was done to check for microbial contamination. The data includes results from PHREEQC modeling of As(III)/ As(V) species and saturation indices as well as Aquachem's computed hydrochemical water facies. The WHO (2011) and EPA standards included in Aquachem identified the parameters that where in violation. Bicarbonates dominated the groundwater types with 50.21% of the samples exceeding the EPA maximum permissible limit of 250 mg/L in drinking water. Similarly, 30.51% of the samples had TDS values greater than 500 mg/L while 85.38 % of the samples exceed 10 µg/L threshold limit value of arsenic. Also, instances of high magnesium hazard values were observed which requires constant assessment if the groundwater is used for irrigation. Higher than 50% MH values are detrimental to crops which may reduce the expected yields. The membrane filtration technique using m-Endo Agar indicated that 3.59% samples had TNC (too numerous to count) values for E.coli while 5.06% showed values higher than 0 cfu/ 100 ml acceptable value in drinking water. Any traces of E-coli in a groundwater sample indicate recent fecal contamination. Such outcomes signify presence of enteric pathogens. If the groundwater is not properly dosed with disinfectants it may cause harm to human health. It is concluded that more studies are needed and proper groundwater management implement to safeguard the lives of communities that depend solely on groundwater in the city.

Fault Tolerance Analysis and Self-Healing Strategy of Autonomous, Evolvable Hardware Systems

This paper presents an analysis of the fault tolerance achieved by an autonomous, fully embedded evolvable hardware system, which uses a combination of partial dynamic reconfiguration and an evolutionary algorithm (EA). It demonstrates that the system may self-recover from both transient and cumulative permanent faults. This self-adaptive system, based on a 2D array of 16 (4×4) Processing Elements (PEs), is tested with an image filtering application. Results show that it may properly recover from faults in up to 3 PEs, that is, more than 18% cumulative permanent faults. Two fault models are used for testing purposes, at PE and CLB levels. Two self-healing strategies are also introduced, depending on whether fault diagnosis is available or not. They are based on scrubbing, fitness evaluation, dynamic partial reconfiguration and in-system evolutionary adaptation. Since most of these adaptability features are already available on the system for its normal operation, resource cost for self-healing is very low (only some code additions in the internal microprocessor core)

Novel Inductor‐less Conversion Strategy Based on Multiphase Transformer‐Coupled Converters: Analysis, Design and Applications

There are many the requirements that modern power converters should fulfill. Most of the applications where these converters are used, demand smaller converters with high efficiency, improved power density and a fast dynamic response. For instance, loads like microprocessors demand aggressive current steps with very high slew rates (100A/mus and higher); besides, during these load steps, the supply voltage of the microprocessor should be kept within tight limits in order to ensure its correct performance. The accomplishment of these requirements is not an easy task; complex solutions like advanced topologies - such as multiphase converters- as well as advanced control strategies are often needed. Besides, it is also necessary to operate the converter at high switching frequencies and to use capacitors with high capacitance and low ESR. Improving the dynamic response of power converters does not rely only on the control strategy but also the power topology should be suited to enable a fast dynamic response. Moreover, in later years, a fast dynamic response does not only mean accomplishing fast load steps but output voltage steps are gaining importance as well. At least, two applications that require fast voltage changes can be named: Low power microprocessors. In these devices, the voltage supply is changed according to the workload and the operating frequency of the microprocessor is changed at the same time. An important reduction in voltage dependent losses can be achieved with such changes. This technique is known as Dynamic Voltage Scaling (DVS). Another application where important energy savings can be achieved by means of changing the supply voltage are Radio Frequency Power Amplifiers. For example, RF architectures based on ‘Envelope Tracking’ and ‘Envelope Elimination and Restoration’ techniques can take advantage of voltage supply modulation and accomplish important energy savings in the power amplifier. However, in order to achieve these efficiency improvements, a power converter with high efficiency and high enough bandwidth (hundreds of kHz or even tens of MHz) is necessary in order to ensure an adequate supply voltage. The main objective of this Thesis is to improve the dynamic response of DC-DC converters from the point of view of the power topology. And the term dynamic response refers both to the load steps and the voltage steps; it is also interesting to modulate the output voltage of the converter with a specific bandwidth. In order to accomplish this, the question of what is it that limits the dynamic response of power converters should be answered. Analyzing this question leads to the conclusion that the dynamic response is limited by the power topology and specifically, by the filter inductance of the converter which is found in series between the input and the output of the converter. The series inductance is the one that determines the gain of the converter and provides the regulation capability. Although the energy stored in the filter inductance enables the regulation and the capability of filtering the output voltage, it imposes a limitation which is the concern of this Thesis. The series inductance stores energy and prevents the current from changing in a fast way, limiting the slew rate of the current through this inductor. Different solutions are proposed in the literature in order to reduce the limit imposed by the filter inductor. Many publications proposing new topologies and improvements to known topologies can be found in the literature. Also, complex control strategies are proposed with the objective of improving the dynamic response in power converters. In the proposed topologies, the energy stored in the series inductor is reduced; examples of these topologies are Multiphase converters, Buck converter operating at very high frequency or adding a low impedance path in parallel with the series inductance. Control techniques proposed in the literature, focus on adjusting the output voltage as fast as allowed by the power stage; examples of these control techniques are: hysteresis control, V 2 control, and minimum time control. In some of the proposed topologies, a reduction in the value of the series inductance is achieved and with this, the energy stored in this magnetic element is reduced; less stored energy means a faster dynamic response. However, in some cases (as in the high frequency Buck converter), the dynamic response is improved at the cost of worsening the efficiency. In this Thesis, a drastic solution is proposed: to completely eliminate the series inductance of the converter. This is a more radical solution when compared to those proposed in the literature. If the series inductance is eliminated, the regulation capability of the converter is limited which can make it difficult to use the topology in one-converter solutions; however, this topology is suitable for power architectures where the energy conversion is done by more than one converter. When the series inductor is eliminated from the converter, the current slew rate is no longer limited and it can be said that the dynamic response of the converter is independent from the switching frequency. This is the main advantage of eliminating the series inductor. The main objective, is to propose an energy conversion strategy that is done without series inductance. Without series inductance, no energy is stored between the input and the output of the converter and the dynamic response would be instantaneous if all the devices were ideal. If the energy transfer from the input to the output of the converter is done instantaneously when a load step occurs, conceptually it would not be necessary to store energy at the output of the converter (no output capacitor COUT would be needed) and if the input source is ideal, the input capacitor CIN would not be necessary. This last feature (no CIN with ideal VIN) is common to all power converters. However, when the concept is actually implemented, parasitic inductances such as leakage inductance of the transformer and the parasitic inductance of the PCB, cannot be avoided because they are inherent to the implementation of the converter. These parasitic elements do not affect significantly to the proposed concept. In this Thesis, it is proposed to operate the converter without series inductance in order to improve the dynamic response of the converter; however, on the other side, the continuous regulation capability of the converter is lost. It is said continuous because, as it will be explained throughout the Thesis, it is indeed possible to achieve discrete regulation; a converter without filter inductance and without energy stored in the magnetic element, is capable to achieve a limited number of output voltages. The changes between these output voltage levels are achieved in a fast way. The proposed energy conversion strategy is implemented by means of a multiphase converter where the coupling of the phases is done by discrete two-winding transformers instead of coupledinductors since transformers are, ideally, no energy storing elements. This idea is the main contribution of this Thesis. The feasibility of this energy conversion strategy is first analyzed and then verified by simulation and by the implementation of experimental prototypes. Once the strategy is proved valid, different options to implement the magnetic structure are analyzed. Three different discrete transformer arrangements are studied and implemented. A converter based on this energy conversion strategy would be designed with a different approach than the one used to design classic converters since an additional design degree of freedom is available. The switching frequency can be chosen according to the design specifications without penalizing the dynamic response or the efficiency. Low operating frequencies can be chosen in order to favor the efficiency; on the other hand, high operating frequencies (MHz) can be chosen in order to favor the size of the converter. For this reason, a particular design procedure is proposed for the ‘inductorless’ conversion strategy. Finally, applications where the features of the proposed conversion strategy (high efficiency with fast dynamic response) are advantageus, are proposed. For example, in two-stage power architectures where a high efficiency converter is needed as the first stage and there is a second stage that provides the fine regulation. Another example are RF power amplifiers where the voltage is modulated following an envelope reference in order to save power; in this application, a high efficiency converter, capable of achieving fast voltage steps is required. The main contributions of this Thesis are the following: The proposal of a conversion strategy that is done, ideally, without storing energy in the magnetic element. The validation and the implementation of the proposed energy conversion strategy. The study of different magnetic structures based on discrete transformers for the implementation of the proposed energy conversion strategy. To elaborate and validate a design procedure. To identify and validate applications for the proposed energy conversion strategy. It is important to remark that this work is done in collaboration with Intel. The particular features of the proposed conversion strategy enable the possibility of solving the problems related to microprocessor powering in a different way. For example, the high efficiency achieved with the proposed conversion strategy enables it as a good candidate to be used for power conditioning, as a first stage in a two-stage power architecture for powering microprocessors.

Design of a remote controlled hovercraft

Este informe trata el diseño, desarrollo y construcción de un aerodeslizador de pequeño tamaño, equipado con control remoto que permite al usuario actuar sobre la velocidad y dirección del mismo. Este proyecto podrá ser utilizado en un futuro como base para el desarrollo de aplicaciones más complejas. Un aerodeslizador es un medio de transporte cuyo chasis se eleva sobre el suelo por medio de un motor impulsor que hincha una falda colocada en la parte inferior del mismo. Además, uno o más motores se colocan en la parte trasera del vehículo para propulsarlo. El hecho de que el aerodeslizador no este en contacto directo con la tierra, hace que pueda moverse tanto por tierra como sobre el agua o hielo y que sea capaz de superar pequeños obstáculos. Por otra parte, este hecho se convierte a su vez en un problema debido a que su fuerza de rozamiento al desplazarse es muy pequeña, lo que provoca que sea muy difícil de frenar, y tienda a girar por sí mismo debido a la inercia del movimiento y a las fuerzas provocadas por las corrientes de aire debajo del chasis. Sin embargo, para este proyecto no se ha colocado una falda debajo del mismo, debido a que su diseño es bastante complicado, por lo tanto la fricción con el suelo es menor, aumentando los problemas detallados con anterioridad. El proyecto consta de dos partes, mando a distancia y aerodeslizador, que se conectan a través de antenas de radiofrecuencia (RF). El diseño y desarrollo de cada una ha sido realizado de manera separada exceptuando la parte de las comunicaciones entre ambas. El mando a distancia se divide en tres partes. La primera está compuesta por la interfaz de usuario y el circuito que genera las señales analógicas correspondientes a sus indicaciones. La interfaz de usuario la conforman tres potenciómetros: uno rotatorio y dos deslizantes. El rotatorio se utiliza para controlar la dirección de giro del aerodeslizador, mientras que cada uno de los deslizantes se emplea para controlar la fuerza del motor impulsor y del propulsor respectivamente. En los tres casos los potenciómetros se colocan en el circuito de manera que actúan como divisores de tensión controlables. La segunda parte se compone de un microcontrolador de la familia PSoC. Esta familia de microcontroladores se caracteriza por tener una gran adaptabilidad a la aplicación en la que se quieran utilizar debido a la posibilidad de elección de los periféricos, tanto analógicos como digitales, que forman parte del microcontrolador. Para el mando a distancia se configura con tres conversores A/D que se encargan de transformar las señales procedentes de los potenciómetros, tres amplificadores programables para trabajar con toda la escala de los conversores, un LCD que se utiliza para depurar el código en C con el que se programa y un módulo SPI que es la interfaz que conecta el microcontrolador con la antena. Además, se utilizan cuatro pines externos para elegir el canal de transmisión de la antena. La tercera parte es el módulo transceptor de radio frecuencia (RF) QFM-TRX1-24G, que en el mando a distancia funciona como transmisor. Éste utiliza codificación Manchester para asegurar bajas tasas de error. Como alimentación para los circuitos del mando a distancia se utilizan cuatro pilas AA de 1,5 voltios en serie. En el aerodeslizador se pueden distinguir cinco partes. La primera es el módulo de comunicaciones, que utiliza el mismo transceptor que en el mando a distancia, pero esta vez funciona como receptor y por lo tanto servirá como entrada de datos al sistema haciendo llegar las instrucciones del usuario. Este módulo se comunica con el siguiente, un microcontrolador de la familia PSoC, a través de una interfaz SPI. En este caso el microcontrolador se configura con: un modulo SPI, un LCD utilizado para depurar el código y tres módulos PWM (2 de 8 bits y uno de 16 bits) para controlar los motores y el servo del aerodeslizador. Además, se utilizan cuatro pines externos para seleccionar el canal de recepción de datos. La tercera y cuarta parte se pueden considerar conjuntamente. Ambas están compuestas por el mismo circuito electrónico basado en transistores MOSFET. A la puerta de cada uno de los transistores llega una señal PWM de 100 kilohercios que proviene del microcontrolador, que se encarga de controlar el modo de funcionamiento de los transistores, que llevan acoplado un disipador de calor para evitar que se quemen. A su vez, los transistores hacen funcionar al dos ventiladores, que actúan como motores, el impulsor y el propulsor del aerodeslizador. La quinta y última parte es un servo estándar para modelismo. El servo está controlado por una señal PWM, en la que la longitud del pulso positivo establece la posición de la cabeza del servo, girando en uno u otra dirección según las instrucciones enviadas desde el mando a distancia por el usuario. Para el aerodeslizador se han utilizado dos fuentes de alimentación diferentes: una compuesta por 4 pilas AA de 1,5 voltios en serie que alimentarán al microcontrolador y al servo, y 4 baterías de litio recargables de 3,2 voltios en serie que alimentan el circuito de los motores. La última parte del proyecto es el montaje y ensamblaje final de los dispositivos. Para el chasis del aerodeslizador se ha utilizado una cubierta rectangular de poli-estireno expandido, habitualmente encontrado en el embalaje de productos frágiles. Este material es bastante ligero y con una alta resistencia a los golpes, por lo que es ideal para el propósito del proyecto. En el chasis se han realizado dos agujeros: uno circular situado en el centro del mismo en el se introduce y se ajusta con pegamento el motor impulsor, y un agujero con la forma del servo, situado en uno del los laterales estrechos del rectángulo, en el que se acopla el mismo. El motor propulsor está adherido al cabezal giratorio del servo de manera que rota a la vez que él, haciendo girar al aerodeslizador. El resto de circuitos electrónicos y las baterías se fijan al chasis mediante cinta adhesiva y pegamento procurando en todo momento repartir el peso de manera homogénea por todo el chasis para aumentar la estabilidad del aerodeslizador. SUMMARY: In this final year project a remote controlled hovercraft was designed using mainly technology that is well known by students in the embedded systems programme. This platform could be used to develop further and more complex projects. The system was developed dividing the work into two parts: remote control and hovercraft. The hardware was of the hovercraft and the remote control was designed separately; however, the software was designed at the same time since it was needed to develop the communication system. The result of the project was a remote control hovercraft which has a user friendly interface. The system was designed based on microprocessor technologies and uses common remote control technologies. The system has been designed with technology commonly used by the students in Metropolia University so that it can be readily understood in order to develop other projects based on this platform.