Power management techniques in an FPGA-Based WSN node for high performance application

In this work, the power management techniques implemented in a high-performance node for Wireless Sensor Networks (WSN) based on a RAM-based FPGA are presented. This new node custom architecture is intended for high-end WSN applications that include complex sensor management like video cameras, high compute demanding tasks such as image encoding or robust encryption, and/or higher data bandwidth needs. In the case of these complex processing tasks, yet maintaining low power design requirements, it can be shown that the combination of different techniques such as extensive HW algorithm mapping, smart management of power islands to selectively switch on and off components, smart and low-energy partial reconfiguration, an adequate set of save energy modes and wake up options, all combined, may yield energy results that may compete and improve energy usage of typical low power microcontrollers used in many WSN node architectures. Actually, results show that higher complexity tasks are in favor of HW based platforms, while the flexibility achieved by dynamic and partial reconfiguration techniques could be comparable to SW based solutions.

Wake-up architecture for Wireless sensor nodes based on ultra low power FPGA

In this work a novel wake-up architecture for wireless sensor nodes based on ultra low power FPGA is presented. A simple wake up messaging mechanism for data gathering applications is proposed. The main goal of this work is to evaluate the utilization of low power configurable devices to take advantage of their speed, flexibility and low power consumption compared with traditional approaches, based on ASICs or microcontrollers, for frame decoding and data control. A test bed based on infrared communications has been built to validate the messaging mechanism and the processing architecture.

FPGA-Based Wireless Sensor Node Architecture for High Performance Applications

While for years traditional wireless sensor nodes have been based on ultra-low power microcontrollers with sufficient but limited computing power, the complexity and number of tasks of today’s applications are constantly increasing. Increasing the node duty cycle is not feasible in all cases, so in many cases more computing power is required. This extra computing power may be achieved by either more powerful microcontrollers, though more power consumption or, in general, any solution capable of accelerating task execution. At this point, the use of hardware based, and in particular FPGA solutions, might appear as a candidate technology, since though power use is higher compared with lower power devices, execution time is reduced, so energy could be reduced overall. In order to demonstrate this, an innovative WSN node architecture is proposed. This architecture is based on a high performance high capacity state-of-the-art FPGA, which combines the advantages of the intrinsic acceleration provided by the parallelism of hardware devices, the use of partial reconfiguration capabilities, as well as a careful power-aware management system, to show that energy savings for certain higher-end applications can be achieved. Finally, comprehensive tests have been done to validate the platform in terms of performance and power consumption, to proof that better energy efficiency compared to processor based solutions can be achieved, for instance, when encryption is imposed by the application requirements.

Learning Probabilistic Features for Robotic Navigation Using Laser Sensors

SLAM is a popular task used by robots and autonomous vehicles to build a map of an unknown environment and, at the same time, to determine their location within the map. This paper describes a SLAM-based, probabilistic robotic system able to learn the essential features of different parts of its environment. Some previous SLAM implementations had computational complexities ranging from O(Nlog(N)) to O(N2), where N is the number of map features. Unlike these methods, our approach reduces the computational complexity to O(N) by using a model to fuse the information from the sensors after applying the Bayesian paradigm. Once the training process is completed, the robot identifies and locates those areas that potentially match the sections that have been previously learned. After the training, the robot navigates and extracts a three-dimensional map of the environment using a single laser sensor. Thus, it perceives different sections of its world. In addition, in order to make our system able to be used in a low-cost robot, low-complexity algorithms that can be easily implemented on embedded processors or microcontrollers are used.

Connection of Network Sensors to Distributed Information Measurement and Control System for Education and Research

The development of the distributed information measurement and control system for optical spectral research of particle beam and plasma objects and the execution of laboratory works on Physics and Engineering Department of Petrozavodsk State University are described. At the hardware level the system is represented by a complex of the automated workplaces joined into computer network. The key element of the system is the communication server, which supports the multi-user mode and distributes resources among clients, monitors the system and provides secure access. Other system components are formed by equipment servers (CАМАC and GPIB servers, a server for the access to microcontrollers MCS-196 and others) and the client programs that carry out data acquisition, accumulation and processing and management of the course of the experiment as well. In this work the designed by the authors network interface is discussed. The interface provides the connection of measuring and executive devices to the distributed information measurement and control system via Ethernet. This interface allows controlling of experimental parameters by use of digital devices, monitoring of experiment parameters by polling of analog and digital sensors. The device firmware is written in assembler language and includes libraries for Ethernet-, IP-, TCP- и UDP-packets forming.

Development of an open architecture motion control system

A multipurpose open architecture motion control system was developed with three platforms for control and monitoring. The Visual Basic user interface communicated with the operator and gave instructions to the electronic components. The first platform had a BASIC Stamp based controller and three stepping motors. The second platform had a controller, amplifiers and two DC servomotors. The third platform had a DSP module. In this study, each platform was used on machine tools either to move the table or to evaluate the incoming signal. The study indicated that by using advanced microcontrollers, which use high-level languages, motor controllers, DSPs (Digital Signal Processor) and microcomputers, the motion control of different systems could be realized in a short time. Although, the proposed systems had some limitations, their jobs were performed effectively. ^

Sistema detector de vazamentos em instalações prediais de água fria

Building installations of cold water are key parts in any model of housing, are homes or condos. However, these systems are subject to failure, which can range from a leak in a device until faults in the structure of water reservoirs and distribution system. These faults are responsible for great economic and environmental costs. In order to reduce these losses, this work proposes the development of a system able to detect the presence and identify some types of water leaks that may occur. For implementation and testing, consumption model was used in a simulator capable of reproducing a similar behavior to a real model and its consequent failures. The detection of leaks is done based on an expert like model having two detection modules, one active and one passive, which use an array of sensors and actuators (valves) to do the sensing. For testing and implementation has been developed a software capable of coupling the system simulator and detector. From the results it can be seen that the system proposed in this work, as well as functioning satisfactorily, can be easily implemented in microcontrollers or embedded systems due to its simplicity.

Automação residencial microcontrolada para transmissão de dados via rede elétrica

This work deals with the specification and the implementation of a protocol for controlling communication between two programmable interface microcontrollers (PIC), using power line communication (PLC), making communication more secure and economically viable. The Protocol was implemented in C language, with reference to some protocols developed for automotive use. A circuit to test the communication between the PLC and the Protocol was also implemented.

Controllo ultra-low power di un modulatore back-scattering per applicazioni di localizzazione in sistemi RFID

In questa tesi viene elaborata un'applicazione ultra-low power (ULP) basata su microcontrollore, per implementare la procedura di controllo di diversi circuiti di un tag RFID. Il tag preso in considerazione è pensato per lavorare in assenza di batteria, da cui la necessita' di ridurre i consumi di potenza. La sua attivazione deve essere inoltre comandata attraverso un'architettura Wake up Radio (WuR), in cui un segnale di controllo radio indirizza e attiva il circuito. Nello specifico, la rete di decodifica dell'indirizzo è stata realizzata mediante il modulo di comunicazione seriale del microcontrollore. Nel Capitolo 1 verrà introdotto il tema dell'Energy Harvesting. Nel Capitolo 2 verrà illustrata l'architettura del sistema nel suo complesso. Nel Capitolo 3 verrà spiegato dettagliatamente il funzionamento del microcontrollore scelto. Il Capitolo 4 sarà dedicato al firmware implementato per svolgere le operazioni fondamentali imputate al micro per i compiti di controllo. Verrà inoltre introdotto il codice VHDL sviluppato per emulare l'output del modulo WuR mediante un FPGA della famiglia Cyclone II. Nel Capitolo 5 verrà presentata una stima dei consumi del microcontrollore in funzione dei parametri di configurazione del sistema. Verrà inoltre effettuato un confronto con un altro microcontrollore che in alcune condizioni potrebbe rappresentare iun'alternativa valida di progetto. Nei Capitoli 6 e 7 saranno descritti possibili sviluppi futuri e conclusioni del progetto. Le specifiche di progetto rilevanti della tesi sono: 1. minimo consumo energetico possibile del microcontrollore ULP 2. elevata rapidità di risposta per la ricezione dei tag, per garantire la ricezione di un numero maggiore possibile di indirizzi (almeno 20 letture al secondo), in un range di tempo limitato 3. generazione di un segnale PWM a 100KHz di frequenza di commutazione con duty cycle 50% su cui basare una modulazione in back-scattering.

Desenvolvimento de sistema automatizado para o monitoramento da degradação de resíduos de brometo de etídio

Tese (doutorado)—Universidade de Brasília, Instituto de Química, Programa de Pós-Graduação em Química, 2015.