947 resultados para Low-Power Image Sensors


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The aim of the present work is to analyze the histological changes on hamster buccal mucosa caused by the topical use of 7,12-dimethylbenzanthracene (DMBA) and exposition to a 220 μJ/pulse nitrogen laser light (@ 337 nm) at an average power of 2,3 mW. Twenty-one hamsters divided into two experimental groups were treated six times with DMBA. One hamster was kept as control. Group I was composed by ten hamsters and was submitted only to DMBA. Group II, also with ten hamsters, received the same treatment as group I and was exposed to the laser radiation. The time duration of each irradiation section was 10 seconds. All the treatment happened in alternated days. The histological analysis took place twice, after the end of the treatment and after sixty days. Both experimental groups presented dilatation of vessels, thickening of the epithelial tissue and the presence of inflammatory infiltrates. The preliminary results indicates that in group II the number of dilated vessels and its new area are much more significant than in group I.

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A low-voltage low-power 2nd-order CMOS pseudo-differential bump-equalizer is presented. Its topology comprises a bandpass section with adjustable center frequency and quality factor, together with a programmable current amplifier. The basic building blocks are triode-operating transconductors, tunable by means of either a DC voltage or a digitally controlled current divider. The bump-equalizer as part of a battery-operated hearing aid device is designed for a 1.4V-supply and a 0.35μm CMOS fabrication process. The circuit performance is supported by a set of simulation results, which indicates a center frequency from 600Hz to 2.4kHz, 1≤Q≤5, and an adjustable gain within ±6dB at center frequency. The filter dynamic range lies around 40dB. Quiescent consumption is kept below 12μW for any configuration of the filter.

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Electric propulsion is now a succeful method for primary propulsion of deep space long duration missions and for geosyncronous satellite attitude control. Closed Drift Thruster, so called Hall Thruster or SPT (Stationary Plasma Thruster), was primarily conceived in USSR (the ancient Soviet Union) and, since then, it has been developed by space agencies, space research institutes and industries in several countries such as France, USA, Israel, Russian Federation and Brazil. In this work we present the main features of the Permanent Magnet Hall Thruster (PMHT) developed at the Plasma Laboratory of the University of Brasilia. The idea of using an array of permanent magnets, instead of an electromagnet, to produce a radial magnetic field inside the plasma channel of the thruster is very significant. It allows the development of a Hall Thruster with power consumption low enough to be used in small and medium size satellites. Description of a new vacuum chamber used to test the second prototype of the PMHT (PHALL II) will be given. PHALL II has an aluminum plasma chamber and is smaller with 15 cm diameter and will contain rare earth magnets. We will show plasma density and temperature space profiles inside and outside the thruster channel. Ion temperature measurements based on Doppler broadening of spectral lines and ion energy measurements are also shown. Based on the measured plasma parameters we constructed an aptitude figure of the PMHT. It contains the specific impulse, total thrust, propellant flow rate and power consumption necessary for orbit raising of satellites. Based on previous studies of geosyncronous satellite orbit positioning we perform numerical simulations of satellite orbit raising from an altitude of 700 km to 36000 km using a PMHT operating in the 100 mN - 500 mN thrust range. In order to perform these calculations integration techniques were used. The main simulation paraters were orbit raising time, fuel mass, total satellite mass, thrust and exaust velocity. We conclude comparing our results with results obtainned with known space missions performed with Hall Thrusters. © 2008 by the American Institute of Aeronautics and Astronautics, Inc.

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This work presents the evaluation of different power electronic integrated converters suitable for photovoltaic applications, in order to reduce complexity and improve reliability. The rated voltages available in Photovoltaic (PV) modules have usually low values for applications such as regulated output voltages in stand-alone or grid-connected configurations. In these cases, a boost stage or a transformer will be necessary. Transformers have low efficiencies, heavy weights and have been used only when galvanic isolation is mandatory. Furthermore, high-frequency transformers increase the converter complexity. Therefore, the most usual topologies use a boost stage and one inverter stage cascaded. However, the complexity, size, weight, cost and lifetime might be improved considering the integration of both stages. In this context, some integrated converters are analyzed and compared in this paper in order to support future evaluations and trends for low power single-phase inverters for PV systems. Power decoupling, MPPT and Tri-State modulations are also considered. Finally, simulation and experimental results are presented and compared for the analyzed topologies. © 2011 IEEE.

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This work presents the stage integration in power electronics converters as a suitable solution for solar photovoltaic inverters. The rated voltages available in Photovoltaic (PV) modules have usually low values for applications such as regulated output voltages in stand-alone or grid-connected configurations. In these cases, a boost stage or a transformer will be necessary. Transformers have low efficiencies, heavy weights and have been used only when galvanic isolation is mandatory. Furthermore, high-frequency transformers increase the converter complexity. Therefore, the most usual topologies use a boost stage and one inverter stage cascaded. However, the complexity, size, weight, cost and lifetime might be improved considering the integration of both stages. These are the expected features to turn attractive this kind of integrated structures. Therefore, some integrated converters are analyzed and compared in this paper in order to support future evaluations and trends for low power single-phase inverters for PV systems. © 2011 IEEE.

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This paper presents the operational analysis of the single-phase integrated buck-boost inverter. This topology is able to convert the DC input voltage into AC voltage with a high static gain, low harmonic content and acceptable efficiency, all in one single-stage. Main functionality aspects are explained, design procedure, system modeling and control, and also component requirements are detailed. Main simulation results are included, and two prototypes were implemented and experimentally tested, where its results are compared with those corresponding to similar topologies available in literature. © 2012 IEEE.

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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

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This paper describes a CMOS implementation of a linear voltage regulator (LVR) used to power up implanted physiological signal systems, as it is the case of a wireless blood pressure biosensor. The topology is based on a classical structure of a linear low-dropout regulator. The circuit is powered up from an RF link, thus characterizing a passive radio frequency identification (RFID) tag. The LVR was designed to meet important features such as low power consumption and small silicon area, without the need for any external discrete components. The low power operation represents an essential condition to avoid a high-energy RF link, thus minimizing the transmitted power and therefore minimizing the thermal effects on the patient's tissues. The project was implemented in a 0.35-mu m CMOS process, and the prototypes were tested to validate the overall performance. The LVR output is regulated at 1 V and supplies a maximum load current of 0.5 mA at 37 degrees C. The load regulation is 13 mV/mA, and the line regulation is 39 mV/V. The LVR total power consumption is 1.2 mW.

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Multi-Processor SoC (MPSOC) design brings to the foreground a large number of challenges, one of the most prominent of which is the design of the chip interconnection. With a number of on-chip blocks presently ranging in the tens, and quickly approaching the hundreds, the novel issue of how to best provide on-chip communication resources is clearly felt. Scaling down of process technologies has increased process and dynamic variations as well as transistor wearout. Because of this, delay variations increase and impact the performance of the MPSoCs. The interconnect architecture inMPSoCs becomes a single point of failure as it connects all other components of the system together. A faulty processing element may be shut down entirely, but the interconnect architecture must be able to tolerate partial failure and variations and operate with performance, power or latency overhead. This dissertation focuses on techniques at different levels of abstraction to face with the reliability and variability issues in on-chip interconnection networks. By showing the test results of a GALS NoC testchip this dissertation motivates the need for techniques to detect and work around manufacturing faults and process variations in MPSoCs’ interconnection infrastructure. As a physical design technique, we propose the bundle routing framework as an effective way to route the Network on Chips’ global links. For architecture-level design, two cases are addressed: (I) Intra-cluster communication where we propose a low-latency interconnect with variability robustness (ii) Inter-cluster communication where an online functional testing with a reliable NoC configuration are proposed. We also propose dualVdd as an orthogonal way of compensating variability at the post-fabrication stage. This is an alternative strategy with respect to the design techniques, since it enforces the compensation at post silicon stage.

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Progetto di un nodo wireless, alimentato attraverso l'Energy Harvesting, in grado di misurare la temperatura ambiente ed inviarla ad un sistema ricevente che la visualizzerà su uno schermo LCD.

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Wireless Sensor Networks (WSNs) offer a new solution for distributed monitoring, processing and communication. First of all, the stringent energy constraints to which sensing nodes are typically subjected. WSNs are often battery powered and placed where it is not possible to recharge or replace batteries. Energy can be harvested from the external environment but it is a limited resource that must be used efficiently. Energy efficiency is a key requirement for a credible WSNs design. From the power source's perspective, aggressive energy management techniques remain the most effective way to prolong the lifetime of a WSN. A new adaptive algorithm will be presented, which minimizes the consumption of wireless sensor nodes in sleep mode, when the power source has to be regulated using DC-DC converters. Another important aspect addressed is the time synchronisation in WSNs. WSNs are used for real-world applications where physical time plays an important role. An innovative low-overhead synchronisation approach will be presented, based on a Temperature Compensation Algorithm (TCA). The last aspect addressed is related to self-powered WSNs with Energy Harvesting (EH) solutions. Wireless sensor nodes with EH require some form of energy storage, which enables systems to continue operating during periods of insufficient environmental energy. However, the size of the energy storage strongly restricts the use of WSNs with EH in real-world applications. A new approach will be presented, which enables computation to be sustained during intermittent power supply. The discussed approaches will be used for real-world WSN applications. The first presented scenario is related to the experience gathered during an European Project (3ENCULT Project), regarding the design and implementation of an innovative network for monitoring heritage buildings. The second scenario is related to the experience with Telecom Italia, regarding the design of smart energy meters for monitoring the usage of household's appliances.

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Lo sviluppo di nuove tecnologie sempre più innovative e all’avanguardia ha portato ad un processo di costante rivisitazione e miglioramento di sistemi tecnologici già esistenti. L’esempio di Internet risulta, a questo proposito, interessante da analizzare: strumento quotidiano ormai diventato alla portata di tutti, il suo processo di rivisitazione ha portato allo sviluppo dell’Internet Of Things (IoT), neologismo utilizzato per descrivere l'estensione di Internet a tutto ciò che può essere trasformato in un sistema elettronico, controllato attraverso la rete mondiale che oggi può essere facilmente fruibile grazie all’utilizzo di Smartphone sempre più performanti. Lo scopo di questa grande trasformazione è quello di creare una rete ad-hoc (non necessariamente con un accesso diretto alla rete internet tramite protocolli wired o wireless standard) al fine di stabilire un maggior controllo ed una maggiore sicurezza, alla quale è possibile interfacciare oggetti dotati di opportuni sensori di diverso tipo, in maniera tale da condividere dati e ricevere comandi da un operatore esterno. Un possibile scenario applicativo della tecnologia IoT, è il campo dell'efficienza energetica e degli Smart Meter. La possibilità di modificare i vecchi contatori del gas e dell’acqua, tutt’oggi funzionanti grazie ad una tecnologia che possiamo definire obsoleta, trasformandoli in opportuni sistemi di metring che hanno la capacità di trasmettere alla centrale le letture o i dati del cliente, di eseguire operazioni di chiusura e di apertura del servizio, nonché operazioni sulla valutazione dei consumi, permetterebbe al cliente di avere sotto controllo i consumi giornalieri. Per costruire il sistema di comunicazione si è utilizzato il modem Semtech SX1276, che oltre ad essere low-power, possiede due caratteristiche rivoluzionarie e all’avanguardia: utilizza una modulazione del segnale da trasmettere innovativa e una grande capacità di rilevare segnali immersi in forti fonti di rumore ; la possibilità di utilizzare due frequenze di trasmissione diverse, 169 MHz e 868MHz.

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Il compressed sensing è un’innovativa tecnica per l’acquisizione dei dati, che mira all'estrazione del solo contenuto informativo intrinseco di un segnale. Ciò si traduce nella possibilità di acquisire informazione direttamente in forma compressa, riducendo la quantità di risorse richieste per tale operazione. In questa tesi è sviluppata un'architettura hardware per l'acquisizione di segnali analogici basata sul compressed sensing, specializzata al campionamento con consumo di potenza ridotto di segnali biomedicali a basse frequenze. Lo studio è svolto a livello di sistema mediante l'integrazione della modulazione richiesta dal compressed sensing in un convertitore analogico-digitale ad approssimazioni successive, modificandone la logica di controllo. Le prestazioni risultanti sono misurate tramite simulazioni numeriche e circuitali. Queste confermano la possibilità di ridurre la complessità hardware del sistema di acquisizione rispetto allo stato dell'arte, senza alterarne le prestazioni.