Novel sequential methods in dose-finding designs : extensions of the continual reassessment method

Dose-finding trials are a form of clinical data collection process in which the primary objective is to estimate an optimum dose of an investigational new drug when given to a patient. This thesis develops and explores three novel dose-finding design methodologies. All design methodologies presented in this thesis are pragmatic. They use statistical models, incorporate clinicians' prior knowledge efficiently, and prematurely stop a trial for safety or futility reasons. Designing actual dose-finding trials using these methodologies will minimize practical difficulties, improve efficiency of dose estimation, be flexible to stop early and reduce possible patient discomfort or harm.

Incorporating adverse event relatedness into dose-finding clinical trial designs

Dose-finding designs estimate the dose level of a drug based on observed adverse events. Relatedness of the adverse event to the drug has been generally ignored in all proposed design methodologies. These designs assume that the adverse events observed during a trial are definitely related to the drug, which can lead to flawed dose-level estimation. We incorporate adverse event relatedness into the so-called continual reassessment method. Adverse events that have ‘doubtful’ or ‘possible’ relationships to the drug are modelled using a two-parameter logistic model with an additive probability mass. Adverse events ‘probably’ or ‘definitely’ related to the drug are modelled using a cumulative logistic model. To search for the maximum tolerated dose, we use the maximum estimated toxicity probability of these two adverse event relatedness categories. We conduct a simulation study that illustrates the characteristics of the design under various scenarios. This article demonstrates that adverse event relatedness is important for improved dose estimation. It opens up further research pathways into continual reassessment design methodologies.

Passivity-based Trajectory-tracking for Marine Craft with Disturbance Rejection

This paper presents a Hamiltonian model of marine vehicle dynamics in six degrees of freedom in both body-fixed and inertial momentum coordinates. The model in body-fixed coordinates presents a particular structure of the mass matrix that allows the adaptation and application of passivity-based control interconnection and damping assignment design methodologies developed for robust stabilisation of mechanical systems in terms of generalised coordinates. As an example of application, we follow this methodology to design a passivity-based tracking controller with integral action for fully actuated vehicles in six degrees of freedom. We also describe a momentum transformation that allows an alternative model representation that resembles general port-Hamiltonian mechanical systems with a coordinate dependent mass matrix. This can be seen as an enabling step towards the adaptation of the theory of control of port-Hamiltonian systems developed in robotic manipulators and multi-body mechanical systems to the case of marine craft dynamics.

Binary decompositions and acyclic schemes

It is well known that the notions of normal forms and acyclicity capture many practical desirable properties for database schemes. The basic schema design problem is to develop design methodologies that strive toward these ideals. The usual approach is to first normalize the database scheme as far as possible. If the resulting scheme is cyclic, then one tries to transform it into an acyclic scheme. In this paper, we argue in favor of carrying out these two phases of design concurrently. In order to do this efficiently, we need to be able to incrementally analyze the acyclicity status of a database scheme as it is being designed. To this end, we propose the formalism of "binary decompositions". Using this, we characterize design sequences that exactly generate theta-acyclic schemes, for theta = agr,beta. We then show how our results can be put to use in database design. Finally, we also show that our formalism above can be effectively used as a proof tool in dependency theory. We demonstrate its power by showing that it leads to a significant simplification of the proofs of some previous results connecting sets of multivalued dependencies and acyclic join dependencies.

Reliability-based load and resistance factors for soil-nail walls

Existing soil nailing design methodologies are essentially based on limit equilibrium principles that together with a lumped factor of safety or a set of partial factors on the material parameters and loads account for uncertainties in design input parameter values. Recent trends in the development of design procedures for earth retaining structures are towards load and resistance factor design (LRFD). In the present study, a methodology for the use of LRFD in the context of soil-nail walls is proposed and a procedure to determine reliability-based load and resistance factors is illustrated for important strength limit states with reference to a 10 m high soil-nail wall. The need for separate partial factors for each limit state is highlighted, and the proposed factors are compared with those existing in the literature.

DADAISM Project Plan

The DADAISM project brings together researchers from the diverse fields of archaeology, human computer interaction, image processing, image search and retrieval, and text mining to create a rich interactive system to address the problems of researchers finding images relevant to their research. In the age of digital photography, thousands of images are taken of archaeological artefacts. These images could help archaeologists enormously in their tasks of classification and identification if they could be related to one another effectively. They would yield many new insights on a range of archaeological problems. However, these images are currently greatly underutilized for two key reasons. Firstly, the current paradigm for interaction with image collections is basic keyword search or, at best, simple faceted search. Secondly, even if these interactions are possible, the metadata related to the majority of images of archaeological artefacts is scarce in information relating to the content of the image and the nature of the artefact, and is time intensive to enter manually. DADAISM will transform the way in which archaeologists interact with online image collections. It will deploy user-centred design methodologies to create an interactive system that goes well beyond current systems for working with images, and will support archaeologists’ tasks of finding, organising, relating and labelling images as well as other relevant sources of information such as grey literature documents.

Zero carbon manufacturing facility - Towards integrating material, energy, and waste process flows

The increasing pressure on material availability, energy prices, as well as emerging environmental legislation is leading manufacturers to adopt solutions to reduce their material and energy consumption as well as their carbon footprint, thereby becoming more sustainable. Ultimately manufacturers could potentially become zero carbon by having zero net energy demand and zero waste across the supply chain. The literature on zero carbon manufacturing and the technologies that underpin it are growing, but there is little available on how a manufacturer undertakes the transition. Additionally, the work in this area is fragmented and clustered around technologies rather than around processes that link the technologies together. There is a need to better understand material, energy, and waste process flows in a manufacturing facility from a holistic viewpoint. With knowledge of the potential flows, design methodologies can be developed to enable zero carbon manufacturing facility creation. This paper explores the challenges faced when attempting to design a zero carbon manufacturing facility. A broad scope is adopted from legislation to technology and from low waste to consuming waste. A generic material, energy, and waste flow model is developed and presented to show the material, energy, and waste inputs and outputs for the manufacturing system and the supporting facility and, importantly, how they can potentially interact. Finally the application of the flow model in industrial applications is demonstrated to select appropriate technologies and configure them in an integrated way. © 2009 IMechE.

Memory-Centric Hardware Synthesis from Dataflow Models

Generation of hardware architectures directly from dataflow representations is increasingly being considered as research moves toward system level design methodologies. Creation of networks of IP cores to implement actor functionality is a common approach to the problem, but often the memory sub-systems produced using these techniques are inefficiently utilised. This paper explores some of the issues in terms of memory organisation and accesses when developing systems from these high level representations. Using a template matching design study, challenges such as modelling memory reuse and minimising buffer requirements are examined, yielding results with significantly less memory requirements and costly off-chip memory accesses.

SoC memory hierarchy derivation from dataflow graphs

Hardware synthesis from dataflow graphs of signal processing systems is a growing research area as focus shifts to high level design methodologies. For data intensive systems, dataflow based synthesis can lead to an inefficient usage of memory due to the restrictive nature of synchronous dataflow and its inability to easily model data reuse. This paper explores how dataflow graph changes can be used to drive both the on-chip and off-chip memory organisation and how these memory architectures can be mapped to a hardware implementation. By exploiting the data reuse inherent to many image processing algorithms and by creating memory hierarchies, off-chip memory bandwidth can be reduced by a factor of a thousand from the original dataflow graph level specification of a motion estimation algorithm, with a minimal increase in memory size. This analysis is verified using results gathered from implementation of the motion estimation algorithm on a Xilinx Virtex-4 FPGA, where the delay between the memories and processing elements drops from 14.2 ns down to 1.878 ns through the refinement of the memory architecture. Care must be taken when modeling these algorithms however, as inefficiencies in these models can be easily translated into overuse of hardware resources.

The use of process simulation methods in support of organisational learning in availability contracting

Traditional business models in the aerospace industry are based on a conventional supplier to customer relationship based on the design, manufacture and subsequent delivery of the physical product. Service provision, from the manufacturer's perspective, is typically limited to the supply of procedural documentation and the provision of spare parts to the end user as the product passes through the latter stages of its intended lifecycle. Challenging economic and political conditions have resulted in end users re-structuring their core business activities, particularly in the defence sector. This has resulted in the need for original equipment manufacturers (OEMs) to integrate and manage support service activities in partnership with the customer to deliver platform availability. This improves the probability of commercial sustainability for the OEM through shared operational risks while reducing the cost of platform ownership for the customer. The need for OEMs to evolve their design, manufacture and supply strategies by focusing on customer requirements has revealed a need for reconstruction of traditional internal behaviours and design methodologies. Application of organisational learning is now a well recognised principle for innovative companies to achieve long term growth and sustained technical development, and hence, greater market command. It focuses on the process by which the organisation's knowledge and value base changes, leading to improved problem solving ability and capacity for action. From the perspective of availability contracting, knowledge and the processes by which it is generated, used and retained, become primary assets within the learning organisation. This paper will introduce the application of digital methods to asset management by demonstrating how the process of learning can benefit from a digital approach, how product and process design can be integrated within a virtual framework and finally how the approach can be applied in a service context.

Rapid Implementation and Optimisation of DSP Systems on SoPC Heterogeneous Platforms

The emergence of programmable logic devices as processing platforms for digital signal processing applications poses challenges concerning rapid implementation and high level optimization of algorithms on these platforms. This paper describes Abhainn, a rapid implementation methodology and toolsuite for translating an algorithmic expression of the system to a working implementation on a heterogeneous multiprocessor/field programmable gate array platform, or a standalone system on programmable chip solution. Two particular focuses for Abhainn are the automated but configurable realisation of inter-processor communuication fabrics, and the establishment of novel dedicated hardware component design methodologies allowing algorithm level transformation for system optimization. This paper outlines the approaches employed in both these particular instances.

ASIP: developments, challenges and trends

Application Specific Instruction Set Processor (ASIP) becomes an attractive substitute for ASIC as transistor density, logic complexity and market competition boost. Similar to ASIC, ASIP is based on customized and tailored architectures. In this way, ASIP delivers high performances with low overheads on cost and power whilst taking the advantages of high flexibility and fast time-to-market as a processor-based solution. To demonstrate this effective solution for embedded applications, this paper performs an overall investigation on ASIP's developments, challenges, trends in terms of architectures and design methodologies.

Energy versus data integrity trade-offs in embedded high-density logic compatible dynamic memories

Current variation aware design methodologies, tuned for worst-case scenarios, are becoming increasingly pessimistic from the perspective of power and performance. A good example of such pessimism is setting the refresh rate of DRAMs according to the worst-case access statistics, thereby resulting in very frequent refresh cycles, which are responsible for the majority of the standby power consumption of these memories. However, such a high refresh rate may not be required, either due to extremely low probability of the actual occurrence of such a worst-case, or due to the inherent error resilient nature of many applications that can tolerate a certain number of potential failures. In this paper, we exploit and quantify the possibilities that exist in dynamic memory design by shifting to the so-called approximate computing paradigm in order to save power and enhance yield at no cost. The statistical characteristics of the retention time in dynamic memories were revealed by studying a fabricated 2kb CMOS compatible embedded DRAM (eDRAM) memory array based on gain-cells. Measurements show that up to 73% of the retention power can be saved by altering the refresh time and setting it such that a small number of failures is allowed. We show that these savings can be further increased by utilizing known circuit techniques, such as body biasing, which can help, not only in extending, but also in preferably shaping the retention time distribution. Our approach is one of the first attempts to access the data integrity and energy tradeoffs achieved in eDRAMs for utilizing them in error resilient applications and can prove helpful in the anticipated shift to approximate computing.

A comparative study of complex multiple-band noise-shaping sigma-delta modulators for multi-tone input signals

This paper presents a comparative study of complex single-bit and multi-bit sigma-delta modulators that are capable of providing concurrent multiple-band noise-shaping for multi-tone narrow-band input signals. The concepts applied for the three design methodologies are based on the noise transfer functions of complex comb, complex slink and complex multi-notch filters.

Mocrostrip-Fed Compact Dual Band Planar Antenna

The thesis is the outcome of the theoretical and experimental investigations on mocrostrip-fed printed strip monopole antenna.Finite ground plane has been effectively utilized to excite a new resonance near the fundamental mode by introducing another extended strip from the ground plane,without affecting compactness.Further size reduction was achieved by carrying out folding analysis on dual strip antenna and a compact folded dual strip antenna has been designed.Design methodologies for both the compact dual band antennas are presented.The proposed antennas can be used for mobile and WLAN applications due to wide bandwidth,moderate gain and omnidirectional radiation coverage.